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CRC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x4 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x8 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection :

address_offset : 0xC Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

Registers

CRCCR0

CRCCR1

CRCDIR

CRCDIR_BY

CRCDOR

CRCDOR_HA

CRCDOR_BY

CRCSAR


CRCCR0

CRC Control Register0
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CRCCR0 CRCCR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 GPS LMS DORCLR

GPS : CRC Generating Polynomial Switching
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#000 : 000

No calculation is executed.

#001 : 001

8-bit CRC-8 (X8 + X2 + X + 1)

#010 : 010

16-bit CRC-16 (X16 + X15 + X2 + 1)

#011 : 011

16-bit CRC-CCITT (X16 + X12 + X5 + 1)

#100 : 100

32-bit CRC-32 (X32+X26+X23+X22+X16+X12+X11+X10+X8+X7+X5+X4+X2+X+1)

#101 : 101

32-bit CRC-32C (X32+X28+X27+X26+ X25+X23+X22+X20+X19+X18+X14+X13+X11+X10+X9+X8+X6+1)

: others

No calculation is executed.

End of enumeration elements list.

LMS : CRC Calculation Switching
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

Generates CRC for LSB first communication.

#1 : 1

Generates CRC for MSB first communication.

End of enumeration elements list.

DORCLR : CRCDOR Register Clear
bits : 7 - 6 (0 bit)
access : write-only

Enumeration:

#0 : 0

No effect.

#1 : 1

Clears the CRCDOR register.

End of enumeration elements list.


CRCCR1

CRC Control Register1
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CRCCR1 CRCCR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CRCSWR CRCSEN

CRCSWR : Snoop-on-write/read switch bit
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

Snoop-on-read

#1 : 1

Snoop-on-write

End of enumeration elements list.

CRCSEN : Snoop enable bit
bits : 7 - 6 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.


CRCDIR

CRC Data Input Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CRCDIR CRCDIR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CRCDIR

CRCDIR : Calculation input Data (Case of CRC-32, CRC-32C )
bits : 0 - 30 (31 bit)
access : read-write


CRCDIR_BY

CRC Data Input Register (byte access)
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CRCDIR
reset_Mask : 0x0

CRCDIR_BY CRCDIR_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CRCDIR_BY

CRCDIR_BY : Calculation input Data ( Case of CRC-8, CRC-16 or CRC-CCITT )
bits : 0 - 6 (7 bit)
access : read-write


CRCDOR

CRC Data Output Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CRCDOR CRCDOR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CRCDOR

CRCDOR : Calculation output Data (Case of CRC-32, CRC-32C )
bits : 0 - 30 (31 bit)
access : read-write


CRCDOR_HA

CRC Data Output Register (halfword access)
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : CRCDOR
reset_Mask : 0x0

CRCDOR_HA CRCDOR_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CRCDOR_HA

CRCDOR_HA : Calculation output Data (Case of CRC-16 or CRC-CCITT )
bits : 0 - 14 (15 bit)
access : read-write


CRCDOR_BY

CRC Data Output Register(byte access)
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CRCDOR
reset_Mask : 0x0

CRCDOR_BY CRCDOR_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CRCDOR_BY

CRCDOR_BY : Calculation output Data (Case of CRC-8 )
bits : 0 - 6 (7 bit)
access : read-write


CRCSAR

Snoop Address Register
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CRCSAR CRCSAR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CRCSA

CRCSA : snoop address bitSet the I/O register address to snoop
bits : 0 - 12 (13 bit)
access : read-write

Enumeration:

0x0003 : 0x0003

SCI0.TDR

0x0005 : 0x0005

SCI0.RDR

0x0023 : 0x0023

SCI1.TDR

0x0025 : 0x0025

SCI1.RDR

0x0043 : 0x0043

SCI2.TDR

0x0045 : 0x0045

SCI2.RDR

0x0063 : 0x0063

SCI3.TDR

0x0065 : 0x0065

SCI3.RDR

0x0083 : 0x0083

SCI4.TDR

0x0085 : 0x0085

SCI4.RDR

0x00A3 : 0x00A3

SCI5.TDR

0x00A5 : 0x00A5

SCI5.RDR

0x00C3 : 0x00C3

SCI6.TDR

0x00C5 : 0x00C5

SCI6.RDR

0x00E3 : 0x00E3

SCI7.TDR

0x00E5 : 0x00E5

SCI7.RDR

0x0103 : 0x0103

SCI8.TDR

0x0105 : 0x0105

SCI8.RDR

0x0123 : 0x0123

SCI9.TDR

0x0125 : 0x0125

SCI9.RDR

: others

Settings other than above are prohibited.

End of enumeration elements list.



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