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DTC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x4 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :

address_offset : 0xC Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection :

address_offset : 0xE Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

Registers

DTCCR

DTCVBR

DTCST

DTCSTS


DTCCR

DTC Control Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DTCCR DTCCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RRS

RRS : DTC Transfer Information Read Skip Enable.
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Do not skip transfer information read

#1 : 1

Skip transfer information read when vector numbers match

End of enumeration elements list.


DTCVBR

DTC Vector Base Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DTCVBR DTCVBR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DTCVBR

DTCVBR : DTC Vector Base Address.Note: A value cannot be set in the lower-order 10 bits. These bits are fixed to 0.
bits : 0 - 30 (31 bit)
access : read-write


DTCST

DTC Module Start Register
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DTCST DTCST read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DTCST

DTCST : DTC Module Start
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

DTC module stop

#1 : 1

DTC module start

End of enumeration elements list.


DTCSTS

DTC Status Register
address_offset : 0xE Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

DTCSTS DTCSTS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VECN ACT

VECN : DTC-Activating Vector Number MonitoringThese bits indicate the vector number for the activating source when DTC transfer is in progress.The value is only valid if DTC transfer is in progress (the value of the ACT flag is 1)
bits : 0 - 6 (7 bit)
access : read-only

ACT : DTC Active Flag
bits : 15 - 14 (0 bit)
access : read-only

Enumeration:

#0 : 0

DTC transfer operation is not in progress.

#1 : 1

DTC transfer operation is in progress.

End of enumeration elements list.



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