\n

PFS

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x2 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x3 Bytes (0x0)
size : 0x1D byte (0x0)
mem_usage : registers
protection :

address_offset : 0x6 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : registers
protection :

address_offset : 0x7 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : registers
protection :

address_offset : 0x20 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x22 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x23 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x38 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x3A Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x3B Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x40 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x42 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x43 Bytes (0x0)
size : 0x1D byte (0x0)
mem_usage : registers
protection :

address_offset : 0x46 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : registers
protection :

address_offset : 0x47 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : registers
protection :

address_offset : 0x60 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x62 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x63 Bytes (0x0)
size : 0x5 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x66 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x67 Bytes (0x0)
size : 0x5 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x6A Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x6B Bytes (0x0)
size : 0x15 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x6E Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x6F Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x80 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x82 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x83 Bytes (0x0)
size : 0x5 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x86 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x87 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x94 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x96 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x97 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection :

address_offset : 0xA8 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection :

address_offset : 0xAA Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection :

address_offset : 0xAB Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection :

address_offset : 0xC0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :

address_offset : 0xC2 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

address_offset : 0xC3 Bytes (0x0)
size : 0x1D byte (0x0)
mem_usage : registers
protection :

address_offset : 0xC6 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : registers
protection :

address_offset : 0xC7 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : registers
protection :

address_offset : 0xE8 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection :

address_offset : 0xEA Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection :

address_offset : 0xEB Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x100 Bytes (0x0)
size : 0x28 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x102 Bytes (0x0)
size : 0x28 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x103 Bytes (0x0)
size : 0x28 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x128 Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x12A Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x12B Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x140 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x142 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x143 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x160 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x162 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x163 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x16C Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x16E Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x16F Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x180 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection :

address_offset : 0x182 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection :

address_offset : 0x183 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection :

address_offset : 0x1A0 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x1A2 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x1A3 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x1A8 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x1AA Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x1AB Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x1C0 Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x1C2 Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x1C3 Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x1E0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x1E2 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x1E3 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x1E8 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x1EA Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x1EB Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x200 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x202 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x203 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :

Registers

P000PFS

P004PFS

P400PFS

P400PFS_HA

P400PFS_BY

P401PFS

P401PFS_HA

P401PFS_BY

P402PFS

P402PFS_HA

P402PFS_BY

P403PFS

P403PFS_HA

P403PFS_BY

P404PFS

P404PFS_HA

P404PFS_BY

P405PFS

P405PFS_HA

P405PFS_BY

P406PFS

P406PFS_HA

P406PFS_BY

P407PFS

P407PFS_HA

P407PFS_BY

P004PFS_HA

P408PFS

P408PFS_HA

P408PFS_BY

P409PFS

P409PFS_HA

P409PFS_BY

P410PFS

P410PFS_HA

P410PFS_BY

P411PFS

P411PFS_HA

P411PFS_BY

P004PFS_BY

P412PFS

P412PFS_HA

P412PFS_BY

P413PFS

P413PFS_HA

P413PFS_BY

P414PFS

P414PFS_HA

P414PFS_BY

P415PFS

P415PFS_HA

P415PFS_BY

P005PFS

P500PFS

P500PFS_HA

P500PFS_BY

P501PFS

P501PFS_HA

P501PFS_BY

P502PFS

P502PFS_HA

P502PFS_BY

P503PFS

P503PFS_HA

P503PFS_BY

P504PFS

P504PFS_HA

P504PFS_BY

P005PFS_HA

P508PFS

P508PFS_HA

P508PFS_BY

P005PFS_BY

P006PFS

P600PFS

P600PFS_HA

P600PFS_BY

P601PFS

P601PFS_HA

P601PFS_BY

P602PFS

P602PFS_HA

P602PFS_BY

P006PFS_HA

P608PFS

P608PFS_HA

P608PFS_BY

P609PFS

P609PFS_HA

P609PFS_BY

P610PFS

P610PFS_HA

P610PFS_BY

P006PFS_BY

P007PFS

P007PFS_HA

P708PFS

P708PFS_HA

P708PFS_BY

P007PFS_BY

P000PFS_HA

P008PFS

P008PFS_HA

P008PFS_BY

P000PFS_BY

P014PFS

P014PFS_HA

P014PFS_BY

P015PFS

P015PFS_HA

P015PFS_BY

P001PFS

P100PFS

P100PFS_HA

P100PFS_BY

P101PFS

P101PFS_HA

P101PFS_BY

P102PFS

P102PFS_HA

P102PFS_BY

P103PFS

P103PFS_HA

P103PFS_BY

P104PFS

P104PFS_HA

P104PFS_BY

P105PFS

P105PFS_HA

P105PFS_BY

P106PFS

P106PFS_HA

P106PFS_BY

P107PFS

P107PFS_HA

P107PFS_BY

P001PFS_HA

P108PFS

P108PFS_HA

P108PFS_BY

P109PFS

P109PFS_HA

P109PFS_BY

P110PFS

P110PFS_HA

P110PFS_BY

P111PFS

P111PFS_HA

P111PFS_BY

P001PFS_BY

P112PFS

P112PFS_HA

P112PFS_BY

P113PFS

P113PFS_HA

P113PFS_BY

P114PFS

P114PFS_HA

P114PFS_BY

P115PFS

P115PFS_HA

P115PFS_BY

P002PFS

P200PFS

P200PFS_HA

P200PFS_BY

P201PFS

P201PFS_HA

P201PFS_BY

P205PFS

P205PFS_HA

P205PFS_BY

P206PFS

P206PFS_HA

P206PFS_BY

P207PFS

P207PFS_HA

P207PFS_BY

P002PFS_HA

P208PFS

P208PFS_HA

P208PFS_BY

P209PFS

P209PFS_HA

P209PFS_BY

P210PFS

P210PFS_HA

P210PFS_BY

P211PFS

P211PFS_HA

P211PFS_BY

P002PFS_BY

P212PFS

P212PFS_HA

P212PFS_BY

P213PFS

P213PFS_HA

P213PFS_BY

P214PFS

P214PFS_HA

P214PFS_BY

P003PFS

P300PFS

P300PFS_HA

P300PFS_BY

P301PFS

P301PFS_HA

P301PFS_BY

P302PFS

P302PFS_HA

P302PFS_BY

P303PFS

P303PFS_HA

P303PFS_BY

P304PFS

P304PFS_HA

P304PFS_BY

P305PFS

P305PFS_HA

P305PFS_BY

P306PFS

P306PFS_HA

P306PFS_BY

P307PFS

P307PFS_HA

P307PFS_BY

P003PFS_HA

P003PFS_BY


P000PFS

P000 Pin Function Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P000PFS P000PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PODR PIDR PDR Reserved Reserved PCR Reserved NCODR Reserved DSCR Reserved ISEL ASEL PMR Reserved PSEL

PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Low output

#1 : 1

High output

End of enumeration elements list.

PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : 0

Low input

#1 : 1

High input

End of enumeration elements list.

PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Input (Functions as an input pin.)

#1 : 1

Output (Functions as an output pin.)

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disables an input pull-up.

#1 : 1

Enables an input pull-up.

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write

NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

CMOS output

#1 : 1

NMOS open-drain output

End of enumeration elements list.

Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write

DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#00 : 00

Normal drive output

#01 : 01

Middle drive output

#10 : 10

Setting prohibited

#11 : 11

High-drive output

End of enumeration elements list.

Reserved : These bits are read as 00. The write value should be 00.
bits : 12 - 12 (1 bit)
access : read-write

ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write

Enumeration:

#0 : 0

Not used as IRQn input pin

#1 : 1

Used as IRQn input pin

End of enumeration elements list.

ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : 0

Used other than as analog pin

#1 : 1

Used as analog pin

End of enumeration elements list.

PMR : Port Mode Control
bits : 16 - 15 (0 bit)
access : read-write

Enumeration:

#0 : 0

Uses the pin as a general I/O pin.

#1 : 1

Uses the pin as an I/O port for peripheral functions.

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 17 - 22 (6 bit)
access : read-write

PSEL : Port Function Select These bits select the peripheral function. For individual pin functions, see the MPC table
bits : 24 - 27 (4 bit)
access : read-write


P004PFS

P00%s Pin Function Control Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P004PFS P004PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P400PFS

P40%s Pin Function Control Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P400PFS P400PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P400PFS_HA

P40%s Pin Function Control Register
address_offset : 0x102 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P400PFS_HA P400PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P400PFS_BY

P40%s Pin Function Control Register
address_offset : 0x103 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P400PFS_BY P400PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P401PFS

P40%s Pin Function Control Register
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P401PFS P401PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P401PFS_HA

P40%s Pin Function Control Register
address_offset : 0x106 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P401PFS_HA P401PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P401PFS_BY

P40%s Pin Function Control Register
address_offset : 0x107 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P401PFS_BY P401PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P402PFS

P40%s Pin Function Control Register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P402PFS P402PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P402PFS_HA

P40%s Pin Function Control Register
address_offset : 0x10A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P402PFS_HA P402PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P402PFS_BY

P40%s Pin Function Control Register
address_offset : 0x10B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P402PFS_BY P402PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P403PFS

P40%s Pin Function Control Register
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P403PFS P403PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P403PFS_HA

P40%s Pin Function Control Register
address_offset : 0x10E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P403PFS_HA P403PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P403PFS_BY

P40%s Pin Function Control Register
address_offset : 0x10F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P403PFS_BY P403PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P404PFS

P40%s Pin Function Control Register
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P404PFS P404PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P404PFS_HA

P40%s Pin Function Control Register
address_offset : 0x112 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P404PFS_HA P404PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P404PFS_BY

P40%s Pin Function Control Register
address_offset : 0x113 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P404PFS_BY P404PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P405PFS

P40%s Pin Function Control Register
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P405PFS P405PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P405PFS_HA

P40%s Pin Function Control Register
address_offset : 0x116 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P405PFS_HA P405PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P405PFS_BY

P40%s Pin Function Control Register
address_offset : 0x117 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P405PFS_BY P405PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P406PFS

P40%s Pin Function Control Register
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P406PFS P406PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P406PFS_HA

P40%s Pin Function Control Register
address_offset : 0x11A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P406PFS_HA P406PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P406PFS_BY

P40%s Pin Function Control Register
address_offset : 0x11B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P406PFS_BY P406PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P407PFS

P40%s Pin Function Control Register
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P407PFS P407PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P407PFS_HA

P40%s Pin Function Control Register
address_offset : 0x11E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P407PFS_HA P407PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P407PFS_BY

P40%s Pin Function Control Register
address_offset : 0x11F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P407PFS_BY P407PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P004PFS_HA

P00%s Pin Function Control Register
address_offset : 0x12 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0

P004PFS_HA P004PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P408PFS

P40%s Pin Function Control Register
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P408PFS P408PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P408PFS_HA

P40%s Pin Function Control Register
address_offset : 0x122 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P408PFS_HA P408PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P408PFS_BY

P40%s Pin Function Control Register
address_offset : 0x123 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P408PFS_BY P408PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P409PFS

P40%s Pin Function Control Register
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P409PFS P409PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P409PFS_HA

P40%s Pin Function Control Register
address_offset : 0x126 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P409PFS_HA P409PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P409PFS_BY

P40%s Pin Function Control Register
address_offset : 0x127 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0

P409PFS_BY P409PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P410PFS

P4%s Pin Function Control Register
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P410PFS P410PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P410PFS_HA

P4%s Pin Function Control Register
address_offset : 0x12A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0

P410PFS_HA P410PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P410PFS_BY

P4%s Pin Function Control Register
address_offset : 0x12B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0

P410PFS_BY P410PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P411PFS

P4%s Pin Function Control Register
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P411PFS P411PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P411PFS_HA

P4%s Pin Function Control Register
address_offset : 0x12E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0

P411PFS_HA P411PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P411PFS_BY

P4%s Pin Function Control Register
address_offset : 0x12F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0

P411PFS_BY P411PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P004PFS_BY

P00%s Pin Function Control Register
address_offset : 0x13 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0

P004PFS_BY P004PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P412PFS

P4%s Pin Function Control Register
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P412PFS P412PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P412PFS_HA

P4%s Pin Function Control Register
address_offset : 0x132 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0

P412PFS_HA P412PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P412PFS_BY

P4%s Pin Function Control Register
address_offset : 0x133 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0

P412PFS_BY P412PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P413PFS

P4%s Pin Function Control Register
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P413PFS P413PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P413PFS_HA

P4%s Pin Function Control Register
address_offset : 0x136 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0

P413PFS_HA P413PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P413PFS_BY

P4%s Pin Function Control Register
address_offset : 0x137 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0

P413PFS_BY P413PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P414PFS

P4%s Pin Function Control Register
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P414PFS P414PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P414PFS_HA

P4%s Pin Function Control Register
address_offset : 0x13A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0

P414PFS_HA P414PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P414PFS_BY

P4%s Pin Function Control Register
address_offset : 0x13B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0

P414PFS_BY P414PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P415PFS

P4%s Pin Function Control Register
address_offset : 0x13C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P415PFS P415PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P415PFS_HA

P4%s Pin Function Control Register
address_offset : 0x13E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0

P415PFS_HA P415PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P415PFS_BY

P4%s Pin Function Control Register
address_offset : 0x13F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0

P415PFS_BY P415PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P005PFS

P00%s Pin Function Control Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P005PFS P005PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P500PFS

P50%s Pin Function Control Register
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P500PFS P500PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P500PFS_HA

P50%s Pin Function Control Register
address_offset : 0x142 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0

P500PFS_HA P500PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P500PFS_BY

P50%s Pin Function Control Register
address_offset : 0x143 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0

P500PFS_BY P500PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P501PFS

P50%s Pin Function Control Register
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P501PFS P501PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P501PFS_HA

P50%s Pin Function Control Register
address_offset : 0x146 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0

P501PFS_HA P501PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P501PFS_BY

P50%s Pin Function Control Register
address_offset : 0x147 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0

P501PFS_BY P501PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P502PFS

P50%s Pin Function Control Register
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P502PFS P502PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P502PFS_HA

P50%s Pin Function Control Register
address_offset : 0x14A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0

P502PFS_HA P502PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P502PFS_BY

P50%s Pin Function Control Register
address_offset : 0x14B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0

P502PFS_BY P502PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P503PFS

P50%s Pin Function Control Register
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P503PFS P503PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P503PFS_HA

P50%s Pin Function Control Register
address_offset : 0x14E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0

P503PFS_HA P503PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P503PFS_BY

P50%s Pin Function Control Register
address_offset : 0x14F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0

P503PFS_BY P503PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P504PFS

P50%s Pin Function Control Register
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P504PFS P504PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P504PFS_HA

P50%s Pin Function Control Register
address_offset : 0x152 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0

P504PFS_HA P504PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P504PFS_BY

P50%s Pin Function Control Register
address_offset : 0x153 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0

P504PFS_BY P504PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P005PFS_HA

P00%s Pin Function Control Register
address_offset : 0x16 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0

P005PFS_HA P005PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P508PFS

P508 Pin Function Control Register
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P508PFS P508PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P508PFS_HA

P508 Pin Function Control Register
address_offset : 0x162 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P508PFS
reset_Mask : 0x0

P508PFS_HA P508PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P508PFS_BY

P508 Pin Function Control Register
address_offset : 0x163 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P508PFS
reset_Mask : 0x0

P508PFS_BY P508PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P005PFS_BY

P00%s Pin Function Control Register
address_offset : 0x17 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0

P005PFS_BY P005PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P006PFS

P00%s Pin Function Control Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P006PFS P006PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P600PFS

P60%s Pin Function Control Register
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P600PFS P600PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P600PFS_HA

P60%s Pin Function Control Register
address_offset : 0x182 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0

P600PFS_HA P600PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P600PFS_BY

P60%s Pin Function Control Register
address_offset : 0x183 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0

P600PFS_BY P600PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P601PFS

P60%s Pin Function Control Register
address_offset : 0x184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P601PFS P601PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P601PFS_HA

P60%s Pin Function Control Register
address_offset : 0x186 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0

P601PFS_HA P601PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P601PFS_BY

P60%s Pin Function Control Register
address_offset : 0x187 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0

P601PFS_BY P601PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P602PFS

P60%s Pin Function Control Register
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P602PFS P602PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P602PFS_HA

P60%s Pin Function Control Register
address_offset : 0x18A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0

P602PFS_HA P602PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P602PFS_BY

P60%s Pin Function Control Register
address_offset : 0x18B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0

P602PFS_BY P602PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P006PFS_HA

P00%s Pin Function Control Register
address_offset : 0x1A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0

P006PFS_HA P006PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P608PFS

P60%s Pin Function Control Register
address_offset : 0x1A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P608PFS P608PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P608PFS_HA

P60%s Pin Function Control Register
address_offset : 0x1A2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0

P608PFS_HA P608PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P608PFS_BY

P60%s Pin Function Control Register
address_offset : 0x1A3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0

P608PFS_BY P608PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P609PFS

P60%s Pin Function Control Register
address_offset : 0x1A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P609PFS P609PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P609PFS_HA

P60%s Pin Function Control Register
address_offset : 0x1A6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0

P609PFS_HA P609PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P609PFS_BY

P60%s Pin Function Control Register
address_offset : 0x1A7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0

P609PFS_BY P609PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P610PFS

P610 Pin Function Control Register
address_offset : 0x1A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P610PFS P610PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P610PFS_HA

P610 Pin Function Control Register
address_offset : 0x1AA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0

P610PFS_HA P610PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P610PFS_BY

P610 Pin Function Control Register
address_offset : 0x1AB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0

P610PFS_BY P610PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P006PFS_BY

P00%s Pin Function Control Register
address_offset : 0x1B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0

P006PFS_BY P006PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P007PFS

P00%s Pin Function Control Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P007PFS P007PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P007PFS_HA

P00%s Pin Function Control Register
address_offset : 0x1E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0

P007PFS_HA P007PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P708PFS

P708 Pin Function Control Register
address_offset : 0x1E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P708PFS P708PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P708PFS_HA

P708 Pin Function Control Register
address_offset : 0x1E2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0

P708PFS_HA P708PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P708PFS_BY

P708 Pin Function Control Register
address_offset : 0x1E3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0

P708PFS_BY P708PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P007PFS_BY

P00%s Pin Function Control Register
address_offset : 0x1F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0

P007PFS_BY P007PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P000PFS_HA

P000 Pin Function Control Register
address_offset : 0x2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P000PFS
reset_Mask : 0x0

P000PFS_HA P000PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PODR PIDR PDR Reserved Reserved PCR Reserved NCODR Reserved DSCR ISEL ASEL

PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Low output

#1 : 1

High output

End of enumeration elements list.

PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : 0

Low input

#1 : 1

High input

End of enumeration elements list.

PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Input (Functions as an input pin.)

#1 : 1

Output (Functions as an output pin.)

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disables an input pull-up.

#1 : 1

Enables an input pull-up.

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write

NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

CMOS output

#1 : 1

NMOS open-drain output

End of enumeration elements list.

Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write

DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#00 : 00

Normal drive output

#01 : 01

Middle drive output

#10 : 10

Setting prohibited

#11 : 11

High-drive output

End of enumeration elements list.

ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write

Enumeration:

#0 : 0

Not used as IRQn input pin

#1 : 1

Used as IRQn input pin

End of enumeration elements list.

ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : 0

Used other than as analog pin

#1 : 1

Used as analog pin

End of enumeration elements list.


P008PFS

P008 Pin Function Control Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P008PFS P008PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P008PFS_HA

P008 Pin Function Control Register
address_offset : 0x22 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0

P008PFS_HA P008PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P008PFS_BY

P008 Pin Function Control Register
address_offset : 0x23 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0

P008PFS_BY P008PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P000PFS_BY

P000 Pin Function Control Register
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P000PFS
reset_Mask : 0x0

P000PFS_BY P000PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PODR PIDR PDR Reserved Reserved PCR Reserved NCODR

PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Low output

#1 : 1

High output

End of enumeration elements list.

PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : 0

Low input

#1 : 1

High input

End of enumeration elements list.

PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Input (Functions as an input pin.)

#1 : 1

Output (Functions as an output pin.)

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disables an input pull-up.

#1 : 1

Enables an input pull-up.

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write

NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

CMOS output

#1 : 1

NMOS open-drain output

End of enumeration elements list.


P014PFS

P0%s Pin Function Control Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P014PFS P014PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P014PFS_HA

P0%s Pin Function Control Register
address_offset : 0x3A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P014PFS_HA P014PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P014PFS_BY

P0%s Pin Function Control Register
address_offset : 0x3B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P014PFS_BY P014PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P015PFS

P0%s Pin Function Control Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P015PFS P015PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P015PFS_HA

P0%s Pin Function Control Register
address_offset : 0x3E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P015PFS_HA P015PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P015PFS_BY

P0%s Pin Function Control Register
address_offset : 0x3F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P015PFS_BY P015PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P001PFS

P00%s Pin Function Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P001PFS P001PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P100PFS

P100 Pin Function Control Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P100PFS P100PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PODR PIDR PDR Reserved Reserved PCR Reserved NCODR Reserved DSCR EOFR ISEL ASEL PMR Reserved PSEL

PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Low output

#1 : 1

High output

End of enumeration elements list.

PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : 0

Low input

#1 : 1

High input

End of enumeration elements list.

PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Input (Functions as an input pin.)

#1 : 1

Output (Functions as an output pin.)

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disables an input pull-up.

#1 : 1

Enables an input pull-up.

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write

NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

CMOS output

#1 : 1

NMOS open-drain output

End of enumeration elements list.

Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write

DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#00 : 00

Normal drive output

#01 : 01

Middle drive output

#10 : 10

Setting prohibited

#11 : 11

High-drive output

End of enumeration elements list.

EOFR : Event on Falling/Event on Rising
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

#00 : 00

Don’t-care

#01 : 01

Detect rising edge

#10 : 10

Detect falling edge

#11 : 11

Detect both edges

End of enumeration elements list.

ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write

Enumeration:

#0 : 0

Not used as IRQn input pin

#1 : 1

Used as IRQn input pin

End of enumeration elements list.

ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : 0

Used other than as analog pin

#1 : 1

Used as analog pin

End of enumeration elements list.

PMR : Port Mode Control
bits : 16 - 15 (0 bit)
access : read-write

Enumeration:

#0 : 0

Uses the pin as a general I/O pin.

#1 : 1

Uses the pin as an I/O port for peripheral functions.

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 17 - 22 (6 bit)
access : read-write

PSEL : Port Function Select These bits select the peripheral function. For individual pin functions, see the MPC table
bits : 24 - 27 (4 bit)
access : read-write


P100PFS_HA

P100 Pin Function Control Register
address_offset : 0x42 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P100PFS_HA P100PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PODR PIDR PDR Reserved Reserved PCR Reserved NCODR DSCR EOFR ISEL ASEL

PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Low output

#1 : 1

High output

End of enumeration elements list.

PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : 0

Low input

#1 : 1

High input

End of enumeration elements list.

PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Input (Functions as an input pin.)

#1 : 1

Output (Functions as an output pin.)

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disables an input pull-up.

#1 : 1

Enables an input pull-up.

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write

NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

CMOS output

#1 : 1

NMOS open-drain output

End of enumeration elements list.

DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#00 : 00

Normal drive output

#01 : 01

Middle drive output

#10 : 10

Setting prohibited

#11 : 11

High-drive output

End of enumeration elements list.

EOFR : Event on Falling/Event on Rising
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

#00 : 00

Don’t-care

#01 : 01

Detect rising edge

#10 : 10

Detect falling edge

#11 : 11

Detect both edges

End of enumeration elements list.

ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write

Enumeration:

#0 : 0

Not used as IRQn input pin

#1 : 1

Used as IRQn input pin

End of enumeration elements list.

ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : 0

Used other than as analog pin

#1 : 1

Used as analog pin

End of enumeration elements list.


P100PFS_BY

P100 Pin Function Control Register
address_offset : 0x43 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P100PFS_BY P100PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PODR PIDR PDR Reserved Reserved PCR Reserved NCODR

PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Low output

#1 : 1

High output

End of enumeration elements list.

PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : 0

Low input

#1 : 1

High input

End of enumeration elements list.

PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Input (Functions as an input pin.)

#1 : 1

Output (Functions as an output pin.)

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disables an input pull-up.

#1 : 1

Enables an input pull-up.

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write

NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

CMOS output

#1 : 1

NMOS open-drain output

End of enumeration elements list.


P101PFS

P10%s Pin Function Control Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P101PFS P101PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P101PFS_HA

P10%s Pin Function Control Register
address_offset : 0x46 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P101PFS_HA P101PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P101PFS_BY

P10%s Pin Function Control Register
address_offset : 0x47 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P101PFS_BY P101PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P102PFS

P10%s Pin Function Control Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P102PFS P102PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P102PFS_HA

P10%s Pin Function Control Register
address_offset : 0x4A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P102PFS_HA P102PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P102PFS_BY

P10%s Pin Function Control Register
address_offset : 0x4B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P102PFS_BY P102PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P103PFS

P10%s Pin Function Control Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P103PFS P103PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P103PFS_HA

P10%s Pin Function Control Register
address_offset : 0x4E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P103PFS_HA P103PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P103PFS_BY

P10%s Pin Function Control Register
address_offset : 0x4F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P103PFS_BY P103PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P104PFS

P10%s Pin Function Control Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P104PFS P104PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P104PFS_HA

P10%s Pin Function Control Register
address_offset : 0x52 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P104PFS_HA P104PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P104PFS_BY

P10%s Pin Function Control Register
address_offset : 0x53 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P104PFS_BY P104PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P105PFS

P10%s Pin Function Control Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P105PFS P105PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P105PFS_HA

P10%s Pin Function Control Register
address_offset : 0x56 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P105PFS_HA P105PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P105PFS_BY

P10%s Pin Function Control Register
address_offset : 0x57 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P105PFS_BY P105PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P106PFS

P10%s Pin Function Control Register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P106PFS P106PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P106PFS_HA

P10%s Pin Function Control Register
address_offset : 0x5A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P106PFS_HA P106PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P106PFS_BY

P10%s Pin Function Control Register
address_offset : 0x5B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P106PFS_BY P106PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P107PFS

P10%s Pin Function Control Register
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P107PFS P107PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P107PFS_HA

P10%s Pin Function Control Register
address_offset : 0x5E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P107PFS_HA P107PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P107PFS_BY

P10%s Pin Function Control Register
address_offset : 0x5F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0

P107PFS_BY P107PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P001PFS_HA

P00%s Pin Function Control Register
address_offset : 0x6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0

P001PFS_HA P001PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P108PFS

P108 Pin Function Control Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P108PFS P108PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PODR PIDR PDR Reserved Reserved PCR Reserved NCODR Reserved DSCR EOR EOF ISEL ASEL PMR Reserved PSEL

PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Low output

#1 : 1

High output

End of enumeration elements list.

PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : 0

Low input

#1 : 1

High input

End of enumeration elements list.

PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Input (Functions as an input pin.)

#1 : 1

Output (Functions as an output pin.)

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disables an input pull-up.

#1 : 1

Enables an input pull-up.

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write

NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

CMOS output

#1 : 1

NMOS open-drain output

End of enumeration elements list.

Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write

DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#00 : 00

Normal drive output

#01 : 01

Middle drive output

#10 : 10

Setting prohibited

#11 : 11

High-drive output

End of enumeration elements list.

EOR : Event on Rising
bits : 12 - 11 (0 bit)
access : read-write

Enumeration:

#0 : 0

Do not care

#1 : 1

Detect rising edge

End of enumeration elements list.

EOF : Event on Falling
bits : 13 - 12 (0 bit)
access : read-write

Enumeration:

#0 : 0

Do not care

#1 : 1

Detect falling edge

End of enumeration elements list.

ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write

Enumeration:

#0 : 0

Not used as IRQn input pin

#1 : 1

Used as IRQn input pin

End of enumeration elements list.

ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : 0

Used other than as analog pin

#1 : 1

Used as analog pin

End of enumeration elements list.

PMR : Port Mode Control
bits : 16 - 15 (0 bit)
access : read-write

Enumeration:

#0 : 0

Uses the pin as a general I/O pin.

#1 : 1

Uses the pin as an I/O port for peripheral functions.

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 17 - 22 (6 bit)
access : read-write

PSEL : Port Function Select These bits select the peripheral function. For individual pin functions, see the MPC table
bits : 24 - 27 (4 bit)
access : read-write


P108PFS_HA

P108 Pin Function Control Register
address_offset : 0x62 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P108PFS
reset_Mask : 0x0

P108PFS_HA P108PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PODR PIDR PDR Reserved Reserved PCR Reserved NCODR DSCR EOR EOF ISEL ASEL

PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Low output

#1 : 1

High output

End of enumeration elements list.

PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : 0

Low input

#1 : 1

High input

End of enumeration elements list.

PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Input (Functions as an input pin.)

#1 : 1

Output (Functions as an output pin.)

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disables an input pull-up.

#1 : 1

Enables an input pull-up.

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write

NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

CMOS output

#1 : 1

NMOS open-drain output

End of enumeration elements list.

DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#00 : 00

Normal drive output

#01 : 01

Middle drive output

#10 : 10

Setting prohibited

#11 : 11

High-drive output

End of enumeration elements list.

EOR : Event on Rising
bits : 12 - 11 (0 bit)
access : read-write

Enumeration:

#0 : 0

Do not care

#1 : 1

Detect rising edge

End of enumeration elements list.

EOF : Event on Falling
bits : 13 - 12 (0 bit)
access : read-write

Enumeration:

#0 : 0

Do not care

#1 : 1

Detect falling edge

End of enumeration elements list.

ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write

Enumeration:

#0 : 0

Not used as IRQn input pin

#1 : 1

Used as IRQn input pin

End of enumeration elements list.

ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : 0

Used other than as analog pin

#1 : 1

Used as analog pin

End of enumeration elements list.


P108PFS_BY

P108 Pin Function Control Register
address_offset : 0x63 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P108PFS
reset_Mask : 0x0

P108PFS_BY P108PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PODR PIDR PDR Reserved Reserved PCR Reserved NCODR

PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Low output

#1 : 1

High output

End of enumeration elements list.

PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : 0

Low input

#1 : 1

High input

End of enumeration elements list.

PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Input (Functions as an input pin.)

#1 : 1

Output (Functions as an output pin.)

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disables an input pull-up.

#1 : 1

Enables an input pull-up.

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write

NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

CMOS output

#1 : 1

NMOS open-drain output

End of enumeration elements list.


P109PFS

P109 Pin Function Control Register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P109PFS P109PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P109PFS_HA

P109 Pin Function Control Register
address_offset : 0x66 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P109PFS
reset_Mask : 0x0

P109PFS_HA P109PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P109PFS_BY

P109 Pin Function Control Register
address_offset : 0x67 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P109PFS
reset_Mask : 0x0

P109PFS_BY P109PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P110PFS

P110 Pin Function Control Register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P110PFS P110PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PODR PIDR PDR Reserved Reserved PCR Reserved NCODR Reserved DSCR EOR EOF ISEL ASEL PMR Reserved PSEL

PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Low output

#1 : 1

High output

End of enumeration elements list.

PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : 0

Low input

#1 : 1

High input

End of enumeration elements list.

PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Input (Functions as an input pin.)

#1 : 1

Output (Functions as an output pin.)

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disables an input pull-up.

#1 : 1

Enables an input pull-up.

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write

NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

CMOS output

#1 : 1

NMOS open-drain output

End of enumeration elements list.

Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write

DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#00 : 00

Normal drive output

#01 : 01

Middle drive output

#10 : 10

Setting prohibited

#11 : 11

High-drive output

End of enumeration elements list.

EOR : Event on Rising
bits : 12 - 11 (0 bit)
access : read-write

Enumeration:

#0 : 0

Do not care

#1 : 1

Detect rising edge

End of enumeration elements list.

EOF : Event on Falling
bits : 13 - 12 (0 bit)
access : read-write

Enumeration:

#0 : 0

Do not care

#1 : 1

Detect falling edge

End of enumeration elements list.

ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write

Enumeration:

#0 : 0

Not used as IRQn input pin

#1 : 1

Used as IRQn input pin

End of enumeration elements list.

ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : 0

Used other than as analog pin

#1 : 1

Used as analog pin

End of enumeration elements list.

PMR : Port Mode Control
bits : 16 - 15 (0 bit)
access : read-write

Enumeration:

#0 : 0

Uses the pin as a general I/O pin.

#1 : 1

Uses the pin as an I/O port for peripheral functions.

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 17 - 22 (6 bit)
access : read-write

PSEL : Port Function Select These bits select the peripheral function. For individual pin functions, see the MPC table
bits : 24 - 27 (4 bit)
access : read-write


P110PFS_HA

P110 Pin Function Control Register
address_offset : 0x6A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P110PFS
reset_Mask : 0x0

P110PFS_HA P110PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PODR PIDR PDR Reserved Reserved PCR Reserved NCODR DSCR EOR EOF ISEL ASEL

PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Low output

#1 : 1

High output

End of enumeration elements list.

PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : 0

Low input

#1 : 1

High input

End of enumeration elements list.

PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Input (Functions as an input pin.)

#1 : 1

Output (Functions as an output pin.)

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disables an input pull-up.

#1 : 1

Enables an input pull-up.

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write

NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

CMOS output

#1 : 1

NMOS open-drain output

End of enumeration elements list.

DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#00 : 00

Normal drive output

#01 : 01

Middle drive output

#10 : 10

Setting prohibited

#11 : 11

High-drive output

End of enumeration elements list.

EOR : Event on Rising
bits : 12 - 11 (0 bit)
access : read-write

Enumeration:

#0 : 0

Do not care

#1 : 1

Detect rising edge

End of enumeration elements list.

EOF : Event on Falling
bits : 13 - 12 (0 bit)
access : read-write

Enumeration:

#0 : 0

Do not care

#1 : 1

Detect falling edge

End of enumeration elements list.

ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write

Enumeration:

#0 : 0

Not used as IRQn input pin

#1 : 1

Used as IRQn input pin

End of enumeration elements list.

ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : 0

Used other than as analog pin

#1 : 1

Used as analog pin

End of enumeration elements list.


P110PFS_BY

P110 Pin Function Control Register
address_offset : 0x6B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P110PFS
reset_Mask : 0x0

P110PFS_BY P110PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PODR PIDR PDR Reserved Reserved PCR Reserved NCODR

PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Low output

#1 : 1

High output

End of enumeration elements list.

PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : 0

Low input

#1 : 1

High input

End of enumeration elements list.

PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Input (Functions as an input pin.)

#1 : 1

Output (Functions as an output pin.)

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disables an input pull-up.

#1 : 1

Enables an input pull-up.

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write

NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

CMOS output

#1 : 1

NMOS open-drain output

End of enumeration elements list.


P111PFS

P1%s Pin Function Control Register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P111PFS P111PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P111PFS_HA

P1%s Pin Function Control Register
address_offset : 0x6E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0

P111PFS_HA P111PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P111PFS_BY

P1%s Pin Function Control Register
address_offset : 0x6F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0

P111PFS_BY P111PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P001PFS_BY

P00%s Pin Function Control Register
address_offset : 0x7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0

P001PFS_BY P001PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P112PFS

P1%s Pin Function Control Register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P112PFS P112PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P112PFS_HA

P1%s Pin Function Control Register
address_offset : 0x72 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0

P112PFS_HA P112PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P112PFS_BY

P1%s Pin Function Control Register
address_offset : 0x73 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0

P112PFS_BY P112PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P113PFS

P1%s Pin Function Control Register
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P113PFS P113PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P113PFS_HA

P1%s Pin Function Control Register
address_offset : 0x76 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0

P113PFS_HA P113PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P113PFS_BY

P1%s Pin Function Control Register
address_offset : 0x77 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0

P113PFS_BY P113PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P114PFS

P1%s Pin Function Control Register
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P114PFS P114PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P114PFS_HA

P1%s Pin Function Control Register
address_offset : 0x7A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0

P114PFS_HA P114PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P114PFS_BY

P1%s Pin Function Control Register
address_offset : 0x7B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0

P114PFS_BY P114PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P115PFS

P1%s Pin Function Control Register
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P115PFS P115PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P115PFS_HA

P1%s Pin Function Control Register
address_offset : 0x7E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0

P115PFS_HA P115PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P115PFS_BY

P1%s Pin Function Control Register
address_offset : 0x7F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0

P115PFS_BY P115PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P002PFS

P00%s Pin Function Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P002PFS P002PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P200PFS

P200 Pin Function Control Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P200PFS P200PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P200PFS_HA

P200 Pin Function Control Register
address_offset : 0x82 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P200PFS
reset_Mask : 0x0

P200PFS_HA P200PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P200PFS_BY

P200 Pin Function Control Register
address_offset : 0x83 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P200PFS
reset_Mask : 0x0

P200PFS_BY P200PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P201PFS

P201 Pin Function Control Register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P201PFS P201PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PODR PIDR PDR Reserved Reserved PCR Reserved NCODR Reserved DSCR EOR EOF ISEL ASEL PMR Reserved PSEL

PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Low output

#1 : 1

High output

End of enumeration elements list.

PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : 0

Low input

#1 : 1

High input

End of enumeration elements list.

PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Input (Functions as an input pin.)

#1 : 1

Output (Functions as an output pin.)

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disables an input pull-up.

#1 : 1

Enables an input pull-up.

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write

NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

CMOS output

#1 : 1

NMOS open-drain output

End of enumeration elements list.

Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write

DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#00 : 00

Normal drive output

#01 : 01

Middle drive output

#10 : 10

Setting prohibited

#11 : 11

High-drive output

End of enumeration elements list.

EOR : Event on Rising
bits : 12 - 11 (0 bit)
access : read-write

Enumeration:

#0 : 0

Do not care

#1 : 1

Detect rising edge

End of enumeration elements list.

EOF : Event on Falling
bits : 13 - 12 (0 bit)
access : read-write

Enumeration:

#0 : 0

Do not care

#1 : 1

Detect falling edge

End of enumeration elements list.

ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write

Enumeration:

#0 : 0

Not used as IRQn input pin

#1 : 1

Used as IRQn input pin

End of enumeration elements list.

ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : 0

Used other than as analog pin

#1 : 1

Used as analog pin

End of enumeration elements list.

PMR : Port Mode Control
bits : 16 - 15 (0 bit)
access : read-write

Enumeration:

#0 : 0

Uses the pin as a general I/O pin.

#1 : 1

Uses the pin as an I/O port for peripheral functions.

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 17 - 22 (6 bit)
access : read-write

PSEL : Port Function Select These bits select the peripheral function. For individual pin functions, see the MPC table
bits : 24 - 27 (4 bit)
access : read-write


P201PFS_HA

P201 Pin Function Control Register
address_offset : 0x86 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P201PFS
reset_Mask : 0x0

P201PFS_HA P201PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PODR PIDR PDR Reserved Reserved PCR Reserved NCODR DSCR EOR EOF ISEL ASEL

PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Low output

#1 : 1

High output

End of enumeration elements list.

PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : 0

Low input

#1 : 1

High input

End of enumeration elements list.

PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Input (Functions as an input pin.)

#1 : 1

Output (Functions as an output pin.)

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disables an input pull-up.

#1 : 1

Enables an input pull-up.

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write

NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

CMOS output

#1 : 1

NMOS open-drain output

End of enumeration elements list.

DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#00 : 00

Normal drive output

#01 : 01

Middle drive output

#10 : 10

Setting prohibited

#11 : 11

High-drive output

End of enumeration elements list.

EOR : Event on Rising
bits : 12 - 11 (0 bit)
access : read-write

Enumeration:

#0 : 0

Do not care

#1 : 1

Detect rising edge

End of enumeration elements list.

EOF : Event on Falling
bits : 13 - 12 (0 bit)
access : read-write

Enumeration:

#0 : 0

Do not care

#1 : 1

Detect falling edge

End of enumeration elements list.

ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write

Enumeration:

#0 : 0

Not used as IRQn input pin

#1 : 1

Used as IRQn input pin

End of enumeration elements list.

ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : 0

Used other than as analog pin

#1 : 1

Used as analog pin

End of enumeration elements list.


P201PFS_BY

P201 Pin Function Control Register
address_offset : 0x87 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P201PFS
reset_Mask : 0x0

P201PFS_BY P201PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PODR PIDR PDR Reserved Reserved PCR Reserved NCODR

PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Low output

#1 : 1

High output

End of enumeration elements list.

PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : 0

Low input

#1 : 1

High input

End of enumeration elements list.

PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Input (Functions as an input pin.)

#1 : 1

Output (Functions as an output pin.)

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disables an input pull-up.

#1 : 1

Enables an input pull-up.

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write

NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

CMOS output

#1 : 1

NMOS open-drain output

End of enumeration elements list.


P205PFS

P20%s Pin Function Control Register
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P205PFS P205PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P205PFS_HA

P20%s Pin Function Control Register
address_offset : 0x96 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0

P205PFS_HA P205PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P205PFS_BY

P20%s Pin Function Control Register
address_offset : 0x97 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0

P205PFS_BY P205PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P206PFS

P20%s Pin Function Control Register
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P206PFS P206PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P206PFS_HA

P20%s Pin Function Control Register
address_offset : 0x9A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0

P206PFS_HA P206PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P206PFS_BY

P20%s Pin Function Control Register
address_offset : 0x9B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0

P206PFS_BY P206PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P207PFS

P20%s Pin Function Control Register
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P207PFS P207PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P207PFS_HA

P20%s Pin Function Control Register
address_offset : 0x9E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0

P207PFS_HA P207PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P207PFS_BY

P20%s Pin Function Control Register
address_offset : 0x9F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0

P207PFS_BY P207PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P002PFS_HA

P00%s Pin Function Control Register
address_offset : 0xA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0

P002PFS_HA P002PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P208PFS

P20%s Pin Function Control Register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P208PFS P208PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P208PFS_HA

P20%s Pin Function Control Register
address_offset : 0xA2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0

P208PFS_HA P208PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P208PFS_BY

P20%s Pin Function Control Register
address_offset : 0xA3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0

P208PFS_BY P208PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P209PFS

P20%s Pin Function Control Register
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P209PFS P209PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P209PFS_HA

P20%s Pin Function Control Register
address_offset : 0xA6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0

P209PFS_HA P209PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P209PFS_BY

P20%s Pin Function Control Register
address_offset : 0xA7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0

P209PFS_BY P209PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P210PFS

P2%s Pin Function Control Register
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P210PFS P210PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P210PFS_HA

P2%s Pin Function Control Register
address_offset : 0xAA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0

P210PFS_HA P210PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P210PFS_BY

P2%s Pin Function Control Register
address_offset : 0xAB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0

P210PFS_BY P210PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P211PFS

P2%s Pin Function Control Register
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P211PFS P211PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P211PFS_HA

P2%s Pin Function Control Register
address_offset : 0xAE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0

P211PFS_HA P211PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P211PFS_BY

P2%s Pin Function Control Register
address_offset : 0xAF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0

P211PFS_BY P211PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P002PFS_BY

P00%s Pin Function Control Register
address_offset : 0xB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0

P002PFS_BY P002PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P212PFS

P2%s Pin Function Control Register
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P212PFS P212PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P212PFS_HA

P2%s Pin Function Control Register
address_offset : 0xB2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0

P212PFS_HA P212PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P212PFS_BY

P2%s Pin Function Control Register
address_offset : 0xB3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0

P212PFS_BY P212PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P213PFS

P2%s Pin Function Control Register
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P213PFS P213PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P213PFS_HA

P2%s Pin Function Control Register
address_offset : 0xB6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0

P213PFS_HA P213PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P213PFS_BY

P2%s Pin Function Control Register
address_offset : 0xB7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0

P213PFS_BY P213PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P214PFS

P2%s Pin Function Control Register
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P214PFS P214PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P214PFS_HA

P2%s Pin Function Control Register
address_offset : 0xBA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0

P214PFS_HA P214PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P214PFS_BY

P2%s Pin Function Control Register
address_offset : 0xBB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0

P214PFS_BY P214PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P003PFS

P00%s Pin Function Control Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P003PFS P003PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P300PFS

P300 Pin Function Control Register
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P300PFS P300PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P300PFS_HA

P300 Pin Function Control Register
address_offset : 0xC2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P300PFS
reset_Mask : 0x0

P300PFS_HA P300PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P300PFS_BY

P300 Pin Function Control Register
address_offset : 0xC3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P300PFS
reset_Mask : 0x0

P300PFS_BY P300PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P301PFS

P30%s Pin Function Control Register
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P301PFS P301PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P301PFS_HA

P30%s Pin Function Control Register
address_offset : 0xC6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0

P301PFS_HA P301PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P301PFS_BY

P30%s Pin Function Control Register
address_offset : 0xC7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0

P301PFS_BY P301PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P302PFS

P30%s Pin Function Control Register
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P302PFS P302PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P302PFS_HA

P30%s Pin Function Control Register
address_offset : 0xCA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0

P302PFS_HA P302PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P302PFS_BY

P30%s Pin Function Control Register
address_offset : 0xCB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0

P302PFS_BY P302PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P303PFS

P30%s Pin Function Control Register
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P303PFS P303PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P303PFS_HA

P30%s Pin Function Control Register
address_offset : 0xCE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0

P303PFS_HA P303PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P303PFS_BY

P30%s Pin Function Control Register
address_offset : 0xCF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0

P303PFS_BY P303PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P304PFS

P30%s Pin Function Control Register
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P304PFS P304PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P304PFS_HA

P30%s Pin Function Control Register
address_offset : 0xD2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0

P304PFS_HA P304PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P304PFS_BY

P30%s Pin Function Control Register
address_offset : 0xD3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0

P304PFS_BY P304PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P305PFS

P30%s Pin Function Control Register
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P305PFS P305PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P305PFS_HA

P30%s Pin Function Control Register
address_offset : 0xD6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0

P305PFS_HA P305PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P305PFS_BY

P30%s Pin Function Control Register
address_offset : 0xD7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0

P305PFS_BY P305PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P306PFS

P30%s Pin Function Control Register
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P306PFS P306PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P306PFS_HA

P30%s Pin Function Control Register
address_offset : 0xDA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0

P306PFS_HA P306PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P306PFS_BY

P30%s Pin Function Control Register
address_offset : 0xDB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0

P306PFS_BY P306PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P307PFS

P30%s Pin Function Control Register
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P307PFS P307PFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P307PFS_HA

P30%s Pin Function Control Register
address_offset : 0xDE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0

P307PFS_HA P307PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P307PFS_BY

P30%s Pin Function Control Register
address_offset : 0xDF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0

P307PFS_BY P307PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

P003PFS_HA

P00%s Pin Function Control Register
address_offset : 0xE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0

P003PFS_HA P003PFS_HA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

P003PFS_BY

P00%s Pin Function Control Register
address_offset : 0xF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0

P003PFS_BY P003PFS_BY read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0


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