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SMPU

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x10 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x14 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x18 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x30 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x34 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :

Registers

SMPUCTL

SMPUMBIU

SMPUFBIU

SMPUSRAM0

SMPUSRAM1

SMPUP0BIU

SMPUP2BIU

SMPUP6BIU

SMPUEXBIU

SMPUEXBIU2


SMPUCTL

Slave MPU Control Register
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMPUCTL SMPUCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OAD PROTECT Reserved KEY

OAD : Operation after detection
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Non-maskable interrupt.

#1 : 1

Reset

End of enumeration elements list.

PROTECT : Protection of register
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

All Bus Slave register writing is possible.

#1 : 1

All Bus Slave register writing is protected. Read is possible.

End of enumeration elements list.

Reserved : These bits are read as 000000. The write value should be 000000.
bits : 2 - 6 (5 bit)
access : read-write

KEY : Key Code This bit is used to enable or disable writing of the PROTECT and OAD bit.
bits : 8 - 14 (7 bit)
access : write-only

Enumeration:

0xA5 : 0xA5

Writing to the PROTECT and OAD bit is valid, when the KEY bits are written 0xA5.

: others

Writing to the PROTECT and OAD bit is invalid.

End of enumeration elements list.


SMPUMBIU

Access Control Register for MBIU
address_offset : 0x10 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMPUMBIU SMPUMBIU read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Reserved Reserved RPGRPA WPGRPA RPFLI WPFLI RPSRAMHS WPSRAMHS

Reserved : These bits are read as 00. The write value should be 00.
bits : 0 - 0 (1 bit)
access : read-write

Reserved : These bits are read as 00. The write value should be 00.
bits : 0 - 0 (1 bit)
access : read-write

RPGRPA : Master Group A Read protection
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Master group A read of memory protection is disabled.

#1 : 1

Master group A read of memory protection is enabled.

End of enumeration elements list.

WPGRPA : Master Group A Write protection
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

Master group A write of memory protection is disabled.

#1 : 1

Master group A write of memory protection is enabled.

End of enumeration elements list.

RPFLI : Code Flash Memory Read Protection
bits : 12 - 11 (0 bit)
access : read-write

Enumeration:

#0 : 0

Memory protection for code flash memory reads from master group A disabled

#1 : 1

Memory protection for code flash memory reads from master group A enabled

End of enumeration elements list.

WPFLI : Code Flash Memory Write Protection (Note: This bit is read as 1. The write value should be 1.)
bits : 13 - 12 (0 bit)
access : read-write

Enumeration:

#0 : 0

Setting prohibited

#1 : 1

Memory protection for code flash memory writes from master group A enabled

End of enumeration elements list.

RPSRAMHS : SRAMHS Read Protection
bits : 14 - 13 (0 bit)
access : read-write

Enumeration:

#0 : 0

Memory protection for SRAMHS reads from master group A disabled

#1 : 1

Memory protection for SRAMHS reads from master group A enabled

End of enumeration elements list.

WPSRAMHS : SRAMHS Write Protection
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : 0

Memory protection for SRAMHS writes from master group A disabled

#1 : 1

Memory protection for SRAMHS writes from master group A enabled

End of enumeration elements list.


SMPUFBIU

Access Control Register for FBIU
address_offset : 0x14 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMPUFBIU SMPUFBIU read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RPCPU WPCPU RPGRPA WPGRPA Reserved

RPCPU : CPU Read protection
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

CPU read of memory protection is disabled.

#1 : 1

CPU read of memory protection is enabled.

End of enumeration elements list.

WPCPU : CPU Write protection
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

CPU write of memory protection is disabled.

#1 : 1

CPU write of memory protection is enabled.

End of enumeration elements list.

RPGRPA : Master Group A Read protection
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Master group A read of memory protection is disabled.

#1 : 1

Master group A read of memory protection is enabled.

End of enumeration elements list.

WPGRPA : Master Group A Write protection
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

Master group A write of memory protection is disabled.

#1 : 1

Master group A write of memory protection is enabled.

End of enumeration elements list.

Reserved : These bits are read as 000000000000. The write value should be 000000000000.
bits : 4 - 14 (11 bit)
access : read-write


SMPUSRAM0

Access Control Register for SRAM%s
address_offset : 0x18 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMPUSRAM0 SMPUSRAM0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RPCPU WPCPU RPGRPA WPGRPA Reserved

RPCPU : CPU Read protection
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

CPU read of memory protection is disabled.

#1 : 1

CPU read of memory protection is enabled.

End of enumeration elements list.

WPCPU : CPU Write protection
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

CPU write of memory protection is disabled.

#1 : 1

CPU write of memory protection is enabled.

End of enumeration elements list.

RPGRPA : Master Group A Read protection
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Master group A read of memory protection is disabled.

#1 : 1

Master group A read of memory protection is enabled.

End of enumeration elements list.

WPGRPA : Master Group A Write protection
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

Master group A write of memory protection is disabled.

#1 : 1

Master group A write of memory protection is enabled.

End of enumeration elements list.

Reserved : These bits are read as 000000000000. The write value should be 000000000000.
bits : 4 - 14 (11 bit)
access : read-write


SMPUSRAM1

Access Control Register for SRAM%s
address_offset : 0x1C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMPUSRAM1 SMPUSRAM1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RPCPU WPCPU RPGRPA WPGRPA Reserved

RPCPU : CPU Read protection
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

CPU read of memory protection is disabled.

#1 : 1

CPU read of memory protection is enabled.

End of enumeration elements list.

WPCPU : CPU Write protection
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

CPU write of memory protection is disabled.

#1 : 1

CPU write of memory protection is enabled.

End of enumeration elements list.

RPGRPA : Master Group A Read protection
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Master group A read of memory protection is disabled.

#1 : 1

Master group A read of memory protection is enabled.

End of enumeration elements list.

WPGRPA : Master Group A Write protection
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

Master group A write of memory protection is disabled.

#1 : 1

Master group A write of memory protection is enabled.

End of enumeration elements list.

Reserved : These bits are read as 000000000000. The write value should be 000000000000.
bits : 4 - 14 (11 bit)
access : read-write


SMPUP0BIU

Access Control Register for P%sBIU
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMPUP0BIU SMPUP0BIU read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RPCPU WPCPU RPGRPA WPGRPA Reserved

RPCPU : CPU Read protection
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

CPU read of memory protection is disabled.

#1 : 1

CPU read of memory protection is enabled.

End of enumeration elements list.

WPCPU : CPU Write protection
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

CPU write of memory protection is disabled.

#1 : 1

CPU write of memory protection is enabled.

End of enumeration elements list.

RPGRPA : Master Group A Read protection
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Master group A read of memory protection is disabled.

#1 : 1

Master group A read of memory protection is enabled.

End of enumeration elements list.

WPGRPA : Master Group A Write protection
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

Master group A write of memory protection is disabled.

#1 : 1

Master group A write of memory protection is enabled.

End of enumeration elements list.

Reserved : These bits are read as 000000000000. The write value should be 000000000000.
bits : 4 - 14 (11 bit)
access : read-write


SMPUP2BIU

Access Control Register for P%sBIU
address_offset : 0x24 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMPUP2BIU SMPUP2BIU read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RPCPU WPCPU RPGRPA WPGRPA Reserved

RPCPU : CPU Read protection
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

CPU read of memory protection is disabled.

#1 : 1

CPU read of memory protection is enabled.

End of enumeration elements list.

WPCPU : CPU Write protection
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

CPU write of memory protection is disabled.

#1 : 1

CPU write of memory protection is enabled.

End of enumeration elements list.

RPGRPA : Master Group A Read protection
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Master group A read of memory protection is disabled.

#1 : 1

Master group A read of memory protection is enabled.

End of enumeration elements list.

WPGRPA : Master Group A Write protection
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

Master group A write of memory protection is disabled.

#1 : 1

Master group A write of memory protection is enabled.

End of enumeration elements list.

Reserved : These bits are read as 000000000000. The write value should be 000000000000.
bits : 4 - 14 (11 bit)
access : read-write


SMPUP6BIU

Access Control Register for P%sBIU
address_offset : 0x28 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMPUP6BIU SMPUP6BIU read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RPCPU WPCPU RPGRPA WPGRPA Reserved

RPCPU : CPU Read protection
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

CPU read of memory protection is disabled.

#1 : 1

CPU read of memory protection is enabled.

End of enumeration elements list.

WPCPU : CPU Write protection
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

CPU write of memory protection is disabled.

#1 : 1

CPU write of memory protection is enabled.

End of enumeration elements list.

RPGRPA : Master Group A Read protection
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Master group A read of memory protection is disabled.

#1 : 1

Master group A read of memory protection is enabled.

End of enumeration elements list.

WPGRPA : Master Group A Write protection
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

Master group A write of memory protection is disabled.

#1 : 1

Master group A write of memory protection is enabled.

End of enumeration elements list.

Reserved : These bits are read as 000000000000. The write value should be 000000000000.
bits : 4 - 14 (11 bit)
access : read-write


SMPUEXBIU

Access Control Register for EXBIU
address_offset : 0x30 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMPUEXBIU SMPUEXBIU read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RP_CPU WP_CPU RP_GRPA WP_GRPA Reserved

RP_CPU : CPU Read protection
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

CPU read of memory protection is disabled.

#1 : 1

CPU read of memory protection is enabled.

End of enumeration elements list.

WP_CPU : CPU Write protection
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

CPU write of memory protection is disabled.

#1 : 1

CPU write of memory protection is enabled.

End of enumeration elements list.

RP_GRPA : Master Group A Read protection
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Master group A read of memory protection is disabled.

#1 : 1

Master group A read of memory protection is enabled.

End of enumeration elements list.

WP_GRPA : Master Group A Write protection
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

Master group A write of memory protection is disabled.

#1 : 1

Master group A write of memory protection is enabled.

End of enumeration elements list.

Reserved : These bits are read as 000000000000. The write value should be 000000000000.
bits : 4 - 14 (11 bit)
access : read-write


SMPUEXBIU2

Access Control Register for EXBIU2
address_offset : 0x34 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMPUEXBIU2 SMPUEXBIU2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RP_CPU WP_CPU RP_GRPA WP_GRPA Reserved

RP_CPU : CPU Read protection
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

CPU read of memory protection is disabled.

#1 : 1

CPU read of memory protection is enabled.

End of enumeration elements list.

WP_CPU : CPU Write protection
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

CPU write of memory protection is disabled.

#1 : 1

CPU write of memory protection is enabled.

End of enumeration elements list.

RP_GRPA : Master Group A Read protection
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Master group A read of memory protection is disabled.

#1 : 1

Master group A read of memory protection is enabled.

End of enumeration elements list.

WP_GRPA : Master Group A Write protection
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

Master group A write of memory protection is disabled.

#1 : 1

Master group A write of memory protection is enabled.

End of enumeration elements list.

Reserved : These bits are read as 000000000000. The write value should be 000000000000.
bits : 4 - 14 (11 bit)
access : read-write



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