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SPI

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection :

Registers

FR

TDR

RDR

CR


FR

FR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FR FR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SPRI SPTI rev3 MODF RXOV WCOL rev2 SPRIC SPTIC rev1 MODFC RXOVC WCOLC rev0

SPRI :
bits : 0 - 0 (1 bit)
access : read-only

SPTI :
bits : 1 - 2 (2 bit)
access : read-only

rev3 :
bits : 2 - 4 (3 bit)
access : read-write

MODF :
bits : 3 - 6 (4 bit)
access : read-only

RXOV :
bits : 4 - 8 (5 bit)
access : read-only

WCOL :
bits : 5 - 10 (6 bit)
access : read-only

rev2 :
bits : 6 - 21 (16 bit)
access : read-write

SPRIC :
bits : 16 - 32 (17 bit)
access : read-write

SPTIC :
bits : 17 - 34 (18 bit)
access : read-write

rev1 :
bits : 18 - 36 (19 bit)
access : read-write

MODFC :
bits : 19 - 38 (20 bit)
access : read-write

RXOVC :
bits : 20 - 40 (21 bit)
access : read-write

WCOLC :
bits : 21 - 42 (22 bit)
access : read-write

rev0 :
bits : 22 - 53 (32 bit)
access : read-write


TDR

TDR
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TDR TDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TDR rev0

TDR :
bits : 0 - 15 (16 bit)
access : read-write

rev0 :
bits : 16 - 47 (32 bit)
access : read-write


RDR

RDR
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RDR RDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RDR rev0

RDR :
bits : 0 - 15 (16 bit)
access : read-only

rev0 :
bits : 16 - 47 (32 bit)
access : read-write


CR

CR
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SPR SSDIS CPOL CPHA MSTR DIR SPDATL SPRIE SPTIE SPDMAR SPDMAT SPIEN SPSFF rev0

SPR :
bits : 0 - 3 (4 bit)
access : read-write

SSDIS :
bits : 4 - 8 (5 bit)
access : read-write

CPOL :
bits : 5 - 10 (6 bit)
access : read-write

CPHA :
bits : 6 - 12 (7 bit)
access : read-write

MSTR :
bits : 7 - 14 (8 bit)
access : read-write

DIR :
bits : 8 - 16 (9 bit)
access : read-write

SPDATL :
bits : 9 - 18 (10 bit)
access : read-write

SPRIE :
bits : 10 - 20 (11 bit)
access : read-write

SPTIE :
bits : 11 - 22 (12 bit)
access : read-write

SPDMAR :
bits : 12 - 24 (13 bit)
access : read-write

SPDMAT :
bits : 13 - 26 (14 bit)
access : read-write

SPIEN :
bits : 14 - 28 (15 bit)
access : read-write

SPSFF :
bits : 15 - 30 (16 bit)
access : read-write

rev0 :
bits : 16 - 47 (32 bit)
access : read-write



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