\n
address_offset : 0x0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection :
CR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WWDTRLR :
bits : 0 - 7 (8 bit)
access : read-write
WWDTPR :
bits : 8 - 18 (11 bit)
access : read-write
rev0 :
bits : 11 - 24 (14 bit)
access : read-write
WWDTIE :
bits : 14 - 28 (15 bit)
access : read-write
WWDTON :
bits : 15 - 30 (16 bit)
access : read-write
LOCK :
bits : 16 - 47 (32 bit)
access : read-write
SR
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TCNT :
bits : 0 - 7 (8 bit)
access : read-only
rev1 :
bits : 8 - 22 (15 bit)
access : read-write
WWDTIF :
bits : 15 - 30 (16 bit)
access : read-write
rev0 :
bits : 16 - 47 (32 bit)
access : read-write
CLR
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
WWDTCLR :
bits : 0 - 15 (16 bit)
access : write-only
rev0 :
bits : 16 - 47 (32 bit)
access : write-only
WTR
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WWDTWTR :
bits : 0 - 7 (8 bit)
access : read-write
rev0 :
bits : 8 - 23 (16 bit)
access : read-write
LOCK :
bits : 16 - 47 (32 bit)
access : read-write
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