\n
address_offset : 0x0 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : registers
protection :
CMP1CON
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
C1DEB :
bits : 0 - 2 (3 bit)
access : read-write
C1PCHS :
bits : 3 - 7 (5 bit)
access : read-write
rev2 :
bits : 5 - 10 (6 bit)
access : read-write
C1NCHS :
bits : 6 - 12 (7 bit)
access : read-write
CMP1EN :
bits : 7 - 14 (8 bit)
access : read-write
C1SMT :
bits : 8 - 17 (10 bit)
access : read-write
C1OUT :
bits : 10 - 20 (11 bit)
access : read-only
C1OUTEN :
bits : 11 - 22 (12 bit)
access : read-write
rev1 :
bits : 12 - 24 (13 bit)
access : read-write
C1IES :
bits : 13 - 27 (15 bit)
access : read-write
C1DE :
bits : 15 - 30 (16 bit)
access : read-write
CMP1VRS :
bits : 16 - 34 (19 bit)
access : read-write
CMP1VCMP :
bits : 19 - 38 (20 bit)
access : read-write
rev0 :
bits : 20 - 51 (32 bit)
access : read-write
OPCON
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OP1EN :
bits : 0 - 0 (1 bit)
access : read-write
OP2EN :
bits : 1 - 2 (2 bit)
access : read-write
OP3EN :
bits : 2 - 4 (3 bit)
access : read-write
rev0 :
bits : 3 - 34 (32 bit)
access : read-write
AVREFCON
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VREFEN :
bits : 0 - 0 (1 bit)
access : read-write
VREFSEL :
bits : 1 - 2 (2 bit)
access : read-write
rev0 :
bits : 2 - 33 (32 bit)
access : read-write
TPSCON
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TPSEN :
bits : 0 - 0 (1 bit)
access : read-write
TPSCHOP :
bits : 1 - 2 (2 bit)
access : read-write
rev0 :
bits : 2 - 33 (32 bit)
access : read-write
CMP2CON
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
C2DEB :
bits : 0 - 2 (3 bit)
access : read-write
C2PCHS :
bits : 3 - 8 (6 bit)
access : read-write
C2NCHS :
bits : 6 - 12 (7 bit)
access : read-write
CMP2EN :
bits : 7 - 14 (8 bit)
access : read-write
C2SMT :
bits : 8 - 17 (10 bit)
access : read-write
C2OUT :
bits : 10 - 20 (11 bit)
access : read-only
C2OUTEN :
bits : 11 - 22 (12 bit)
access : read-write
rev1 :
bits : 12 - 24 (13 bit)
access : read-write
C2IES :
bits : 13 - 27 (15 bit)
access : read-write
C2DE :
bits : 15 - 30 (16 bit)
access : read-write
CMP2VRS :
bits : 16 - 34 (19 bit)
access : read-write
CMP2VCMP :
bits : 19 - 38 (20 bit)
access : read-write
rev0 :
bits : 20 - 51 (32 bit)
access : read-write
CMP3CON
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
C3DEB :
bits : 0 - 2 (3 bit)
access : read-write
C3PCHS :
bits : 3 - 8 (6 bit)
access : read-write
C3NCHS :
bits : 6 - 12 (7 bit)
access : read-write
CMP3EN :
bits : 7 - 14 (8 bit)
access : read-write
C3SMT :
bits : 8 - 17 (10 bit)
access : read-write
C3OUT :
bits : 10 - 20 (11 bit)
access : read-only
C3OUTEN :
bits : 11 - 22 (12 bit)
access : read-write
rev1 :
bits : 12 - 24 (13 bit)
access : read-write
C3IES :
bits : 13 - 27 (15 bit)
access : read-write
C3DE :
bits : 15 - 30 (16 bit)
access : read-write
CMP3VRS :
bits : 16 - 34 (19 bit)
access : read-write
CMP3VCMP :
bits : 19 - 38 (20 bit)
access : read-write
rev0 :
bits : 20 - 51 (32 bit)
access : read-write
CMPINTF
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
C1IF :
bits : 0 - 0 (1 bit)
access : read-only
C2IF :
bits : 1 - 2 (2 bit)
access : read-only
C3IF :
bits : 2 - 4 (3 bit)
access : read-only
rev1 :
bits : 3 - 18 (16 bit)
access : read-write
C1IFC :
bits : 16 - 32 (17 bit)
access : read-write
C2IFC :
bits : 17 - 34 (18 bit)
access : read-write
C3IFC :
bits : 18 - 36 (19 bit)
access : read-write
rev0 :
bits : 19 - 50 (32 bit)
access : read-write
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.