\n

EXTI

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x30 byte (0x0)
mem_usage : registers
protection :

Registers

IMR

FTSR

SWIER

PR

CFGL

CFGH

SAMPL

SAMPH

DMR

EMR

TMSR

RTSR


IMR

IMR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMR IMR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IMR rev0

IMR :
bits : 0 - 15 (16 bit)
access : read-write

rev0 :
bits : 16 - 47 (32 bit)
access : read-write


FTSR

FTSR
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FTSR FTSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FTR rev0

FTR :
bits : 0 - 15 (16 bit)
access : read-write

rev0 :
bits : 16 - 47 (32 bit)
access : read-write


SWIER

SWIER
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

SWIER SWIER write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SWIER rev0

SWIER :
bits : 0 - 15 (16 bit)
access : write-only

rev0 :
bits : 16 - 47 (32 bit)
access : write-only


PR

PR
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PR PR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PR PRC

PR :
bits : 0 - 15 (16 bit)
access : read-only

PRC :
bits : 16 - 47 (32 bit)
access : read-write


CFGL

CFGL
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFGL CFGL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTI0 rev7 EXTI1 rev6 EXTI2 rev5 EXTI3 rev4 EXTI4 rev3 EXTI5 rev2 EXTI6 rev1 EXTI7 rev0

EXTI0 :
bits : 0 - 2 (3 bit)
access : read-write

rev7 :
bits : 3 - 6 (4 bit)
access : read-write

EXTI1 :
bits : 4 - 10 (7 bit)
access : read-write

rev6 :
bits : 7 - 14 (8 bit)
access : read-write

EXTI2 :
bits : 8 - 18 (11 bit)
access : read-write

rev5 :
bits : 11 - 22 (12 bit)
access : read-write

EXTI3 :
bits : 12 - 26 (15 bit)
access : read-write

rev4 :
bits : 15 - 30 (16 bit)
access : read-write

EXTI4 :
bits : 16 - 34 (19 bit)
access : read-write

rev3 :
bits : 19 - 38 (20 bit)
access : read-write

EXTI5 :
bits : 20 - 42 (23 bit)
access : read-write

rev2 :
bits : 23 - 46 (24 bit)
access : read-write

EXTI6 :
bits : 24 - 50 (27 bit)
access : read-write

rev1 :
bits : 27 - 54 (28 bit)
access : read-write

EXTI7 :
bits : 28 - 58 (31 bit)
access : read-write

rev0 :
bits : 31 - 62 (32 bit)
access : read-write


CFGH

CFGH
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFGH CFGH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTI8 rev7 EXTI9 rev6 EXTI10 rev5 EXTI11 rev4 EXTI12 rev3 EXTI13 rev2 EXTI14 rev1 EXTI15 rev0

EXTI8 :
bits : 0 - 2 (3 bit)
access : read-write

rev7 :
bits : 3 - 6 (4 bit)
access : read-write

EXTI9 :
bits : 4 - 10 (7 bit)
access : read-write

rev6 :
bits : 7 - 14 (8 bit)
access : read-write

EXTI10 :
bits : 8 - 18 (11 bit)
access : read-write

rev5 :
bits : 11 - 22 (12 bit)
access : read-write

EXTI11 :
bits : 12 - 26 (15 bit)
access : read-write

rev4 :
bits : 15 - 30 (16 bit)
access : read-write

EXTI12 :
bits : 16 - 34 (19 bit)
access : read-write

rev3 :
bits : 19 - 38 (20 bit)
access : read-write

EXTI13 :
bits : 20 - 42 (23 bit)
access : read-write

rev2 :
bits : 23 - 46 (24 bit)
access : read-write

EXTI14 :
bits : 24 - 50 (27 bit)
access : read-write

rev1 :
bits : 27 - 54 (28 bit)
access : read-write

EXTI15 :
bits : 28 - 58 (31 bit)
access : read-write

rev0 :
bits : 31 - 62 (32 bit)
access : read-write


SAMPL

SAMPL
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SAMPL SAMPL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SN0 PS0 SN1 PS1 SN2 PS2 SN3 PS3 SN4 PS4 SN5 PS5 SN6 PS6 SN7 PS7

SN0 :
bits : 0 - 1 (2 bit)
access : read-write

PS0 :
bits : 2 - 5 (4 bit)
access : read-write

SN1 :
bits : 4 - 9 (6 bit)
access : read-write

PS1 :
bits : 6 - 13 (8 bit)
access : read-write

SN2 :
bits : 8 - 17 (10 bit)
access : read-write

PS2 :
bits : 10 - 21 (12 bit)
access : read-write

SN3 :
bits : 12 - 25 (14 bit)
access : read-write

PS3 :
bits : 14 - 29 (16 bit)
access : read-write

SN4 :
bits : 16 - 33 (18 bit)
access : read-write

PS4 :
bits : 18 - 37 (20 bit)
access : read-write

SN5 :
bits : 20 - 41 (22 bit)
access : read-write

PS5 :
bits : 22 - 45 (24 bit)
access : read-write

SN6 :
bits : 24 - 49 (26 bit)
access : read-write

PS6 :
bits : 26 - 53 (28 bit)
access : read-write

SN7 :
bits : 28 - 57 (30 bit)
access : read-write

PS7 :
bits : 30 - 61 (32 bit)
access : read-write


SAMPH

SAMPH
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SAMPH SAMPH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SN8 PS8 SN9 PS9 SN10 PS10 SN11 PS11 SN12 PS12 SN13 PS13 SN14 PS14 SN15 PS15

SN8 :
bits : 0 - 1 (2 bit)
access : read-write

PS8 :
bits : 2 - 5 (4 bit)
access : read-write

SN9 :
bits : 4 - 9 (6 bit)
access : read-write

PS9 :
bits : 6 - 13 (8 bit)
access : read-write

SN10 :
bits : 8 - 17 (10 bit)
access : read-write

PS10 :
bits : 10 - 21 (12 bit)
access : read-write

SN11 :
bits : 12 - 25 (14 bit)
access : read-write

PS11 :
bits : 14 - 29 (16 bit)
access : read-write

SN12 :
bits : 16 - 33 (18 bit)
access : read-write

PS12 :
bits : 18 - 37 (20 bit)
access : read-write

SN13 :
bits : 20 - 41 (22 bit)
access : read-write

PS13 :
bits : 22 - 45 (24 bit)
access : read-write

SN14 :
bits : 24 - 49 (26 bit)
access : read-write

PS14 :
bits : 26 - 53 (28 bit)
access : read-write

SN15 :
bits : 28 - 57 (30 bit)
access : read-write

PS15 :
bits : 30 - 61 (32 bit)
access : read-write


DMR

DMR
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DMR DMR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMR rev0

DMR :
bits : 0 - 15 (16 bit)
access : read-write

rev0 :
bits : 16 - 47 (32 bit)
access : read-write


EMR

EMR
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EMR EMR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EMR rev0

EMR :
bits : 0 - 15 (16 bit)
access : read-write

rev0 :
bits : 16 - 47 (32 bit)
access : read-write


TMSR

TMSR
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TMSR TMSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TMR rev0

TMR :
bits : 0 - 15 (16 bit)
access : read-write

rev0 :
bits : 16 - 47 (32 bit)
access : read-write


RTSR

RTSR
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RTSR RTSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RTR rev0

RTR :
bits : 0 - 15 (16 bit)
access : read-write

rev0 :
bits : 16 - 47 (32 bit)
access : read-write



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