\n
address_offset : 0x0 Bytes (0x0)
size : 0x104 byte (0x0)
mem_usage : registers
protection :
IFSR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
BEIF :
bits : 0 - 7 (8 bit)
access : read-only
TCIF :
bits : 8 - 23 (16 bit)
access : read-only
HTIF :
bits : 16 - 39 (24 bit)
access : read-only
TEIF :
bits : 24 - 55 (32 bit)
access : read-only
CCR0
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN :
bits : 0 - 0 (1 bit)
access : read-write
TCIE :
bits : 1 - 2 (2 bit)
access : read-write
HTIE :
bits : 2 - 4 (3 bit)
access : read-write
BEIE :
bits : 3 - 6 (4 bit)
access : read-write
TEIE :
bits : 4 - 8 (5 bit)
access : read-write
rev1 :
bits : 5 - 10 (6 bit)
access : read-write
DPTYP :
bits : 6 - 13 (8 bit)
access : read-write
SPTYP :
bits : 8 - 17 (10 bit)
access : read-write
DSIZE :
bits : 10 - 21 (12 bit)
access : read-write
SSIZE :
bits : 12 - 25 (14 bit)
access : read-write
PL :
bits : 14 - 29 (16 bit)
access : read-write
BURSTLEN :
bits : 16 - 35 (20 bit)
access : read-write
STRMSEL :
bits : 20 - 42 (23 bit)
access : read-write
TRGMODE :
bits : 23 - 46 (24 bit)
access : read-write
rev0 :
bits : 24 - 55 (32 bit)
access : read-write
DAR7
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NPKT0
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NPKT :
bits : 0 - 10 (11 bit)
access : read-write
rev0 :
bits : 11 - 42 (32 bit)
access : read-write
CPKT0
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CPKT :
bits : 0 - 10 (11 bit)
access : read-only
rev0 :
bits : 11 - 42 (32 bit)
access : read-write
SAR0
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAR0
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCR1
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN :
bits : 0 - 0 (1 bit)
access : read-write
TCIE :
bits : 1 - 2 (2 bit)
access : read-write
HTIE :
bits : 2 - 4 (3 bit)
access : read-write
BEIE :
bits : 3 - 6 (4 bit)
access : read-write
TEIE :
bits : 4 - 8 (5 bit)
access : read-write
rev1 :
bits : 5 - 10 (6 bit)
access : read-write
DPTYP :
bits : 6 - 13 (8 bit)
access : read-write
SPTYP :
bits : 8 - 17 (10 bit)
access : read-write
DSIZE :
bits : 10 - 21 (12 bit)
access : read-write
SSIZE :
bits : 12 - 25 (14 bit)
access : read-write
PL :
bits : 14 - 29 (16 bit)
access : read-write
BURSTLEN :
bits : 16 - 35 (20 bit)
access : read-write
STRMSEL :
bits : 20 - 42 (23 bit)
access : read-write
TRGMODE :
bits : 23 - 46 (24 bit)
access : read-write
rev0 :
bits : 24 - 55 (32 bit)
access : read-write
NPKT1
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NPKT :
bits : 0 - 10 (11 bit)
access : read-write
rev0 :
bits : 11 - 42 (32 bit)
access : read-write
CPKT1
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CPKT :
bits : 0 - 10 (11 bit)
access : read-only
rev0 :
bits : 11 - 42 (32 bit)
access : read-write
SAR1
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IFCR
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CBEIF :
bits : 0 - 7 (8 bit)
access : read-write
CTCIF :
bits : 8 - 23 (16 bit)
access : read-write
CHTIF :
bits : 16 - 39 (24 bit)
access : read-write
CTEIF :
bits : 24 - 55 (32 bit)
access : read-write
DAR1
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCR2
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN :
bits : 0 - 0 (1 bit)
access : read-write
TCIE :
bits : 1 - 2 (2 bit)
access : read-write
HTIE :
bits : 2 - 4 (3 bit)
access : read-write
BEIE :
bits : 3 - 6 (4 bit)
access : read-write
TEIE :
bits : 4 - 8 (5 bit)
access : read-write
rev1 :
bits : 5 - 10 (6 bit)
access : read-write
DPTYP :
bits : 6 - 13 (8 bit)
access : read-write
SPTYP :
bits : 8 - 17 (10 bit)
access : read-write
DSIZE :
bits : 10 - 21 (12 bit)
access : read-write
SSIZE :
bits : 12 - 25 (14 bit)
access : read-write
PL :
bits : 14 - 29 (16 bit)
access : read-write
BURSTLEN :
bits : 16 - 35 (20 bit)
access : read-write
STRMSEL :
bits : 20 - 42 (23 bit)
access : read-write
TRGMODE :
bits : 23 - 46 (24 bit)
access : read-write
rev0 :
bits : 24 - 55 (32 bit)
access : read-write
NPKT2
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NPKT :
bits : 0 - 10 (11 bit)
access : read-write
rev0 :
bits : 11 - 42 (32 bit)
access : read-write
CPKT2
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CPKT :
bits : 0 - 10 (11 bit)
access : read-only
rev0 :
bits : 11 - 42 (32 bit)
access : read-write
SAR2
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAR2
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCR3
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN :
bits : 0 - 0 (1 bit)
access : read-write
TCIE :
bits : 1 - 2 (2 bit)
access : read-write
HTIE :
bits : 2 - 4 (3 bit)
access : read-write
BEIE :
bits : 3 - 6 (4 bit)
access : read-write
TEIE :
bits : 4 - 8 (5 bit)
access : read-write
rev1 :
bits : 5 - 10 (6 bit)
access : read-write
DPTYP :
bits : 6 - 13 (8 bit)
access : read-write
SPTYP :
bits : 8 - 17 (10 bit)
access : read-write
DSIZE :
bits : 10 - 21 (12 bit)
access : read-write
SSIZE :
bits : 12 - 25 (14 bit)
access : read-write
PL :
bits : 14 - 29 (16 bit)
access : read-write
BURSTLEN :
bits : 16 - 35 (20 bit)
access : read-write
STRMSEL :
bits : 20 - 42 (23 bit)
access : read-write
TRGMODE :
bits : 23 - 46 (24 bit)
access : read-write
rev0 :
bits : 24 - 55 (32 bit)
access : read-write
NPKT3
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NPKT :
bits : 0 - 10 (11 bit)
access : read-write
rev0 :
bits : 11 - 42 (32 bit)
access : read-write
CPKT3
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CPKT :
bits : 0 - 10 (11 bit)
access : read-only
rev0 :
bits : 11 - 42 (32 bit)
access : read-write
SAR3
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWTRG :
bits : 0 - 7 (8 bit)
access : read-write
DBUSY :
bits : 8 - 23 (16 bit)
access : read-only
BURSTIDLE :
bits : 16 - 35 (20 bit)
access : read-write
rev0 :
bits : 20 - 43 (24 bit)
access : read-write
RELOAD :
bits : 24 - 55 (32 bit)
access : read-write
DAR3
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCR4
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN :
bits : 0 - 0 (1 bit)
access : read-write
TCIE :
bits : 1 - 2 (2 bit)
access : read-write
HTIE :
bits : 2 - 4 (3 bit)
access : read-write
BEIE :
bits : 3 - 6 (4 bit)
access : read-write
TEIE :
bits : 4 - 8 (5 bit)
access : read-write
rev1 :
bits : 5 - 10 (6 bit)
access : read-write
DPTYP :
bits : 6 - 13 (8 bit)
access : read-write
SPTYP :
bits : 8 - 17 (10 bit)
access : read-write
DSIZE :
bits : 10 - 21 (12 bit)
access : read-write
SSIZE :
bits : 12 - 25 (14 bit)
access : read-write
PL :
bits : 14 - 29 (16 bit)
access : read-write
BURSTLEN :
bits : 16 - 35 (20 bit)
access : read-write
STRMSEL :
bits : 20 - 42 (23 bit)
access : read-write
TRGMODE :
bits : 23 - 46 (24 bit)
access : read-write
rev0 :
bits : 24 - 55 (32 bit)
access : read-write
NPKT4
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NPKT :
bits : 0 - 10 (11 bit)
access : read-write
rev0 :
bits : 11 - 42 (32 bit)
access : read-write
CPKT4
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CPKT :
bits : 0 - 10 (11 bit)
access : read-only
rev0 :
bits : 11 - 42 (32 bit)
access : read-write
SAR4
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAR4
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCR5
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN :
bits : 0 - 0 (1 bit)
access : read-write
TCIE :
bits : 1 - 2 (2 bit)
access : read-write
HTIE :
bits : 2 - 4 (3 bit)
access : read-write
BEIE :
bits : 3 - 6 (4 bit)
access : read-write
TEIE :
bits : 4 - 8 (5 bit)
access : read-write
rev1 :
bits : 5 - 10 (6 bit)
access : read-write
DPTYP :
bits : 6 - 13 (8 bit)
access : read-write
SPTYP :
bits : 8 - 17 (10 bit)
access : read-write
DSIZE :
bits : 10 - 21 (12 bit)
access : read-write
SSIZE :
bits : 12 - 25 (14 bit)
access : read-write
PL :
bits : 14 - 29 (16 bit)
access : read-write
BURSTLEN :
bits : 16 - 35 (20 bit)
access : read-write
STRMSEL :
bits : 20 - 42 (23 bit)
access : read-write
TRGMODE :
bits : 23 - 46 (24 bit)
access : read-write
rev0 :
bits : 24 - 55 (32 bit)
access : read-write
NPKT5
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NPKT :
bits : 0 - 10 (11 bit)
access : read-write
rev0 :
bits : 11 - 42 (32 bit)
access : read-write
CPKT5
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CPKT :
bits : 0 - 10 (11 bit)
access : read-only
rev0 :
bits : 11 - 42 (32 bit)
access : read-write
SAR5
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAR5
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCR6
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN :
bits : 0 - 0 (1 bit)
access : read-write
TCIE :
bits : 1 - 2 (2 bit)
access : read-write
HTIE :
bits : 2 - 4 (3 bit)
access : read-write
BEIE :
bits : 3 - 6 (4 bit)
access : read-write
TEIE :
bits : 4 - 8 (5 bit)
access : read-write
rev1 :
bits : 5 - 10 (6 bit)
access : read-write
DPTYP :
bits : 6 - 13 (8 bit)
access : read-write
SPTYP :
bits : 8 - 17 (10 bit)
access : read-write
DSIZE :
bits : 10 - 21 (12 bit)
access : read-write
SSIZE :
bits : 12 - 25 (14 bit)
access : read-write
PL :
bits : 14 - 29 (16 bit)
access : read-write
BURSTLEN :
bits : 16 - 35 (20 bit)
access : read-write
STRMSEL :
bits : 20 - 42 (23 bit)
access : read-write
TRGMODE :
bits : 23 - 46 (24 bit)
access : read-write
rev0 :
bits : 24 - 55 (32 bit)
access : read-write
NPKT6
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NPKT :
bits : 0 - 10 (11 bit)
access : read-write
rev0 :
bits : 11 - 42 (32 bit)
access : read-write
CPKT6
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CPKT :
bits : 0 - 10 (11 bit)
access : read-only
rev0 :
bits : 11 - 42 (32 bit)
access : read-write
SAR6
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAR6
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCR7
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN :
bits : 0 - 0 (1 bit)
access : read-write
TCIE :
bits : 1 - 2 (2 bit)
access : read-write
HTIE :
bits : 2 - 4 (3 bit)
access : read-write
BEIE :
bits : 3 - 6 (4 bit)
access : read-write
TEIE :
bits : 4 - 8 (5 bit)
access : read-write
rev1 :
bits : 5 - 10 (6 bit)
access : read-write
DPTYP :
bits : 6 - 13 (8 bit)
access : read-write
SPTYP :
bits : 8 - 17 (10 bit)
access : read-write
DSIZE :
bits : 10 - 21 (12 bit)
access : read-write
SSIZE :
bits : 12 - 25 (14 bit)
access : read-write
PL :
bits : 14 - 29 (16 bit)
access : read-write
BURSTLEN :
bits : 16 - 35 (20 bit)
access : read-write
STRMSEL :
bits : 20 - 42 (23 bit)
access : read-write
TRGMODE :
bits : 23 - 46 (24 bit)
access : read-write
rev0 :
bits : 24 - 55 (32 bit)
access : read-write
NPKT7
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NPKT :
bits : 0 - 10 (11 bit)
access : read-write
rev0 :
bits : 11 - 42 (32 bit)
access : read-write
CPKT7
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CPKT :
bits : 0 - 10 (11 bit)
access : read-only
rev0 :
bits : 11 - 42 (32 bit)
access : read-write
SAR7
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
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