\n

TIM

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection :

Registers

CR

TIMINTF

TCNT

TPR

PSQ


CR

CR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STR rev3 OPM CLKS IE rev2 TRIGEN ETEN TC rev1 CASCEN rev0

STR :
bits : 0 - 0 (1 bit)
access : read-write

rev3 :
bits : 1 - 3 (3 bit)
access : read-write

OPM :
bits : 3 - 6 (4 bit)
access : read-write

CLKS :
bits : 4 - 9 (6 bit)
access : read-write

IE :
bits : 6 - 12 (7 bit)
access : read-write

rev2 :
bits : 7 - 14 (8 bit)
access : read-write

TRIGEN :
bits : 8 - 16 (9 bit)
access : read-write

ETEN :
bits : 9 - 18 (10 bit)
access : read-write

TC :
bits : 10 - 20 (11 bit)
access : read-write

rev1 :
bits : 11 - 25 (15 bit)
access : read-write

CASCEN :
bits : 15 - 30 (16 bit)
access : read-write

rev0 :
bits : 16 - 47 (32 bit)
access : read-write


TIMINTF

TIMINTF
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMINTF TIMINTF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TF rev1 TFC rev0

TF :
bits : 0 - 0 (1 bit)
access : read-only

rev1 :
bits : 1 - 16 (16 bit)
access : read-write

TFC :
bits : 16 - 32 (17 bit)
access : read-write

rev0 :
bits : 17 - 48 (32 bit)
access : read-write


TCNT

TCNT
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TCNT TCNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TCNTL TCNTH

TCNTL :
bits : 0 - 15 (16 bit)
access : read-write

TCNTH :
bits : 16 - 47 (32 bit)
access : read-write


TPR

TPR
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TPR TPR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TPRL TPRH

TPRL :
bits : 0 - 15 (16 bit)
access : read-write

TPRH :
bits : 16 - 47 (32 bit)
access : read-write


PSQ

PSQ
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PSQ PSQ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PSQL PSQH

PSQL :
bits : 0 - 15 (16 bit)
access : read-write

PSQH :
bits : 16 - 47 (32 bit)
access : read-write



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