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FLASH

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2000 byte (0x0)
mem_usage : registers
protection :

Registers

LPCTRL

ADDR

CHKSUM

STATUS

CTRL

DATA


LPCTRL

Offset:0x00 Flash Low Power Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPCTRL LPCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LPMODE

LPMODE : Flash Low Power mode enable bit
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : 0

Disable

2 : 2

Enable Slow mode power saving when HCLK=ILRC=32KHz

End of enumeration elements list.


ADDR

Offset:0x10 Flash Address Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADDR ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

CHKSUM

Offset:0x14 Flash Checksum Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CHKSUM CHKSUM read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

STATUS

Offset:0x04 Flash Status Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STATUS STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUSY PGERR

BUSY : Busy flag
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

0 : Idle

FMC is idle

1 : Busy

Flash operation is in process

End of enumeration elements list.

PGERR : Programming error flag
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : No error

No error

1 : Error

The address to be programmed is illegal or contains a value different from 0xFFFFFFFF

End of enumeration elements list.


CTRL

Offset:0x08 Flash Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PG PER STARTE CHK

PG : Flash program enable bit
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : 0

Disable Flash program operation

1 : 1

Enable Flash program operation

End of enumeration elements list.

PER : Page erase enable bit
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : 0

Disable page erase operation

1 : 1

Enable page erase operation

End of enumeration elements list.

STARTE : Start erase enable bit
bits : 6 - 12 (7 bit)
access : read-write

Enumeration:

0 : 0

Erase operation is stopped/finished

1 : 1

Start erase operation

End of enumeration elements list.

CHK : Checksum calculation choosen
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Trigger checksum calculation

End of enumeration elements list.


DATA

Offset:0x0C Flash Data Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0


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