I2C

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2000 byte (0x0)
mem_usage : registers
protection :

Registers

CTRL

SLVADDR0

SLVADDR1

SLVADDR2

SLVADDR3

SCLHT

SCLLT

TOCTRL

STAT

TXDATA

RXDATA


CTRL

Offset:0x00 I2Cn Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NACK ACK STO STA I2CMODE I2CEN

NACK : NACK assert flag
bits : 1 - 2
access : read-write

Enumeration:

0 : No action

No action

1 : Assert

Assert NACK during the acknowledge clock pulse on SCLn

End of enumeration elements list.

ACK : ACK assert flag
bits : 2 - 4
access : read-write

Enumeration:

0 : No

Master: No action/Slave: Assert NACK after receiving

1 : Assert

Assert ACK during the acknowledge clock pulse on SCLn

End of enumeration elements list.

STO : STOP assert flag
bits : 4 - 8
access : read-write

Enumeration:

0 : Idle

STOP condition idle

1 : Assert

Transmit a STOP condition in master mode, or recover from an error condition in slave mode

End of enumeration elements list.

STA : START assert flag
bits : 5 - 10
access : read-write

Enumeration:

0 : No action

No START condition or Repeated START condition will be generated

1 : Assert

Enter master mode and transmit a START or Repeated START condition

End of enumeration elements list.

I2CMODE : I2C mode
bits : 7 - 14
access : read-write

Enumeration:

0 : Standard/Fast mode

Standard/Fast mode

End of enumeration elements list.

I2CEN : I2Cn interface enable
bits : 8 - 16
access : read-write

Enumeration:

0 : Disable

Disable I2C

1 : Enable

Enable I2C

End of enumeration elements list.


SLVADDR0

Offset:0x10 I2Cn Slave Address 0 Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR GCEN
Warning: Undefined array key 61 in /app/public/svg.inc on line 285
ADD_MODE
Warning: Undefined array key 63 in /app/public/svg.inc on line 285

ADDR : I2Cn slave address 0
bits : 0 - 9
access : read-write

GCEN : General call address enable
bits : 30 - 60
access : read-write

Enumeration:

0 : Disable

Disable general call address

1 : Enable

Enable general call address (0x0)

End of enumeration elements list.

ADD_MODE : Slave address mode
bits : 31 - 62
access : read-write

Enumeration:

0 : 0

7-bit slave address mode

1 : 1

10-bit slave address mode

End of enumeration elements list.


SLVADDR1

Offset:0x14 I2Cn Slave Address 1 Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR

ADDR : I2Cn slave address 1
bits : 0 - 9
access : read-write


SLVADDR2

Offset:0x18 I2Cn Slave Address 2 Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR

ADDR : I2Cn slave address 2
bits : 0 - 9
access : read-write


SLVADDR3

Offset:0x1C I2Cn Slave Address 3 Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR

ADDR : I2Cn slave address 3
bits : 0 - 9
access : read-write


SCLHT

Offset:0x20 I2Cn SCL High Time Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCLH

SCLH : SCLn High period time=(SCLHT+1)*I2Cn_PCLK cycle
bits : 0 - 7
access : read-write


SCLLT

Offset:0x24 I2Cn SCL Low Time Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCLL

SCLL : SCLn Low period time=(SCLLT+1)*I2Cn_PCLK cycle
bits : 0 - 7
access : read-write


TOCTRL

Offset:0x2C I2Cn Timeout Control Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TO

TO : Timeout period time = TO*32*I2Cn_PCLK cycle
bits : 0 - 15
access : read-write


STAT

Offset:0x04 I2Cn Status Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RX_DN ACK_STAT NACK_STAT STOP_DN START_DN MST SLV_RX_HIT SLV_TX_HIT LOST_ARB TIMEOUT I2CIF

RX_DN : RX done status
bits : 0 - 0
access : read-only

Enumeration:

0 : Not done

No RX with ACK/NACK transfer

1 : Done

8-bit RX with ACK/NACK transfer

End of enumeration elements list.

ACK_STAT : ACK done status
bits : 1 - 2
access : read-only

Enumeration:

0 : No

No ACK received

1 : Done

Receive an ACK

End of enumeration elements list.

NACK_STAT : NACK done status
bits : 2 - 4
access : read-only

Enumeration:

0 : No

No NACK received

1 : Done

Receive a NACK

End of enumeration elements list.

STOP_DN : STOP done status
bits : 3 - 6
access : read-only

Enumeration:

0 : No

No STOP condition

1 : Done

Transmit or receive a STOP condition

End of enumeration elements list.

START_DN : START done status
bits : 4 - 8
access : read-only

Enumeration:

0 : No

No START condition

1 : Assert

Transmit or receive a START condition

End of enumeration elements list.

MST : I2C master/slave status
bits : 5 - 10
access : read-only

Enumeration:

0 : Slave

Act as Slave

1 : Master

Act as Master

End of enumeration elements list.

SLV_RX_HIT : Slave RX address hit flag
bits : 6 - 12
access : read-only

Enumeration:

0 : 0

No matched slave address

1 : 1

Slave address hit, and is called for RX

End of enumeration elements list.

SLV_TX_HIT : Slave TX address hit flag
bits : 7 - 14
access : read-only

Enumeration:

0 : 0

No matched slave address

1 : 1

Slave address hit, and is called for TX

End of enumeration elements list.

LOST_ARB : Lost arbitration status
bits : 8 - 16
access : read-only

Enumeration:

0 : 0

Not lost arbitration

1 : 1

Lost arbitration

End of enumeration elements list.

TIMEOUT : Time-out status
bits : 9 - 18
access : read-only

Enumeration:

0 : 0

No timeout

1 : 1

Timeout

End of enumeration elements list.

I2CIF : I2C interrupt flag
bits : 15 - 30
access : read-write

Enumeration:

0 : 0

I2C status doesn't change

1 : 1

I2C status changes

End of enumeration elements list.


TXDATA

Offset:0x08 I2Cn TX Data Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Data

Data : TX Data
bits : 0 - 7
access : read-write


RXDATA

Offset:0x0C I2Cn RX Data Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Data

Data : RX Data received when RX_DN=1
bits : 0 - 7
access : read-only



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