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SYSTEM

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2000 byte (0x0)
mem_usage : registers
protection :

Registers

AHBCLKEN

PRST

APBCP0

APBCP1


AHBCLKEN

Offset:0x00 AHB Clock Enable Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AHBCLKEN AHBCLKEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OPACLKEN USBCLKEN CT16B0CLKEN CT16B1CLKEN CT16B2CLKEN CT16B3CLKEN CT16B4CLKEN CT16B5CLKEN ADCCLKEN SPI0CLKEN SPI1CLKEN CMPCLKEN EBICLKEN UART0CLKEN UART1CLKEN UART2CLKEN UART3CLKEN I2C1CLKEN I2C0CLKEN I2S0CLKEN RTCCLKEN WDTCLKEN I2S1CLKEN LCDCLKEN CRCCLKEN CLKOUTSEL

OPACLKEN : Enable AHB clock for OPA
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

USBCLKEN : Enable AHB clock for USB
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

CT16B0CLKEN : Enable AHB clock for CT16B0
bits : 5 - 10 (6 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

CT16B1CLKEN : Enable AHB clock for CT16B1
bits : 6 - 12 (7 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

CT16B2CLKEN : Enable AHB clock for CT16B2
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

CT16B3CLKEN : Enable AHB clock for CT16B3
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

CT16B4CLKEN : Enable AHB clock for CT16B4
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

CT16B5CLKEN : Enable AHB clock for CT16B5
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

ADCCLKEN : Enable AHB clock for ADC
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

SPI0CLKEN : Enable AHB clock for SPI0
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

SPI1CLKEN : Enable AHB clock for SPI1
bits : 13 - 26 (14 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

CMPCLKEN : Enable AHB clock for CMP
bits : 14 - 28 (15 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

EBICLKEN : Enable AHB clock for EBI
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

UART0CLKEN : Enable AHB clock for UART0
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

UART1CLKEN : Enable AHB clock for UART1
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

UART2CLKEN : Enable AHB clock for UART2
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

UART3CLKEN : Enable AHB clock for UART3
bits : 19 - 38 (20 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

I2C1CLKEN : Enable AHB clock for I2C1
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

I2C0CLKEN : Enable AHB clock for I2C0
bits : 21 - 42 (22 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

I2S0CLKEN : Enable AHB clock for I2S0
bits : 22 - 44 (23 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

RTCCLKEN : Enable AHB clock for RTC
bits : 23 - 46 (24 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

WDTCLKEN : Enable AHB clock for WDT
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

I2S1CLKEN : Enable AHB clock for I2S1
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

LCDCLKEN : Enable AHB clock for LCD
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

CRCCLKEN : Enable AHB clock for CRC
bits : 27 - 54 (28 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Enable

End of enumeration elements list.

CLKOUTSEL : Clock output source selection
bits : 28 - 58 (31 bit)
access : read-write

Enumeration:

0 : 000b

Disable

1 : 001b

ILRC

2 : 010b

ELS XTAL

3 : 011b

CS Clockout selected by SGSEL[1:0] bits

4 : 100b

HCLK

5 : 101b

IHRC

6 : 110b

EHS XTAL

7 : 111b

PLL output

End of enumeration elements list.


PRST

Offset:0x10 Peripheral Reset Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRST PRST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO0RST GPIO1RST GPIO2RST GPIO3RST EBIRST CT16B0RST CT16B1RST CT16B2RST CT16B3RST CT16B4RST CT16B5RST ADCRST SPI0RST SPI1RST CMPRST LCDRST UART0RST UART1RST UART2RST UART3RST I2C1RST I2C0RST I2S0RST RTCRST WDTRST I2S1RST CRCRST USBRST OPARST

GPIO0RST : GPIO0 Reset
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset GPIO0

End of enumeration elements list.

GPIO1RST : GPIO1 Reset
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset GPIO1

End of enumeration elements list.

GPIO2RST : GPIO2 Reset
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset GPIO2

End of enumeration elements list.

GPIO3RST : GPIO3 Reset
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset GPIO3

End of enumeration elements list.

EBIRST : EBI Reset
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset GPIO3

End of enumeration elements list.

CT16B0RST : CT16B0 Reset
bits : 5 - 10 (6 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset CT16B0

End of enumeration elements list.

CT16B1RST : CT16B1 Reset
bits : 6 - 12 (7 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset CT16B1

End of enumeration elements list.

CT16B2RST : CT16B2 Reset
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset CT16B2

End of enumeration elements list.

CT16B3RST : CT16B3 Reset
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset CT16B3

End of enumeration elements list.

CT16B4RST : CT16B4 Reset
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset CT16B4

End of enumeration elements list.

CT16B5RST : CT16B5 Reset
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset CT16B5

End of enumeration elements list.

ADCRST : ADC Reset
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset ADC

End of enumeration elements list.

SPI0RST : SPI0 Reset
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset SPI0

End of enumeration elements list.

SPI1RST : SPI1 Reset
bits : 13 - 26 (14 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset SPI1

End of enumeration elements list.

CMPRST : CMP Reset
bits : 14 - 28 (15 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset CMP

End of enumeration elements list.

LCDRST : LCD Reset
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset LCD

End of enumeration elements list.

UART0RST : UART0 Reset
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset UART0

End of enumeration elements list.

UART1RST : UART1 Reset
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset UART1

End of enumeration elements list.

UART2RST : UART2 Reset
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset UART2

End of enumeration elements list.

UART3RST : UART1 Reset
bits : 19 - 38 (20 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset UART3

End of enumeration elements list.

I2C1RST : I2C1 Reset
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset I2C1

End of enumeration elements list.

I2C0RST : I2C0 Reset
bits : 21 - 42 (22 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset I2C0

End of enumeration elements list.

I2S0RST : I2S0 Reset
bits : 22 - 44 (23 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset I2S0

End of enumeration elements list.

RTCRST : RTC Reset
bits : 23 - 46 (24 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset RTC

End of enumeration elements list.

WDTRST : WDT Reset
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset WDT

End of enumeration elements list.

I2S1RST : I2S1 Reset
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset I2S1

End of enumeration elements list.

CRCRST : CRC Reset
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset CRC

End of enumeration elements list.

USBRST : USB Reset
bits : 27 - 54 (28 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset USB

End of enumeration elements list.

OPARST : USB Reset
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Reset OPA

End of enumeration elements list.


APBCP0

Offset:0x04 APB Clock Prescale Register 0
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

APBCP0 APBCP0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCPRE

ADCPRE : ADC APB clock source prescaler
bits : 16 - 34 (19 bit)
access : read-write

Enumeration:

0 : 000b

HCLK/1

1 : 001b

HCLK/2

2 : 010b

HCLK/4

3 : 011b

HCLK/8

4 : 100b

HCLK/16

End of enumeration elements list.


APBCP1

Offset:0x08 APB Clock Prescale Register 1
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

APBCP1 APBCP1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 I2C0PRE I2S0PRE I2S1PRE WDTPRE I2C1PRE CLKOUTPRE

I2C0PRE : I2C0 APB clock source prescaler
bits : 8 - 18 (11 bit)
access : write-only

Enumeration:

0 : 000b

HCLK/1

1 : 001b

HCLK/2

2 : 010b

HCLK/4

3 : 011b

HCLK/8

4 : 100b

HCLK/16

End of enumeration elements list.

I2S0PRE : I2S0 APB clock source prescaler
bits : 12 - 26 (15 bit)
access : read-write

Enumeration:

0 : 000b

HCLK/1

1 : 001b

HCLK/2

2 : 010b

HCLK/4

3 : 011b

HCLK/8

4 : 100b

HCLK/16

7 : 111b

HCLK/3

End of enumeration elements list.

I2S1PRE : I2S1 APB clock source prescaler
bits : 15 - 32 (18 bit)
access : read-write

Enumeration:

0 : 000b

HCLK/1

1 : 001b

HCLK/2

2 : 010b

HCLK/4

3 : 011b

HCLK/8

4 : 100b

HCLK/16

7 : 111b

HCLK/3

End of enumeration elements list.

WDTPRE : WDT APB clock source prescaler
bits : 20 - 42 (23 bit)
access : read-write

Enumeration:

0 : 000b

WDT_PCLK = WDT clock source / 1

1 : 001b

WDT_PCLK = WDT clock source / 2

2 : 010b

WDT_PCLK = WDT clock source / 4

3 : 011b

WDT_PCLK = WDT clock source / 8

4 : 100b

WDT_PCLK = WDT clock source / 16

5 : 101b

WDT_PCLK = WDT clock source / 32

End of enumeration elements list.

I2C1PRE : I2C1 APB clock source prescaler
bits : 24 - 50 (27 bit)
access : write-only

Enumeration:

0 : 000b

HCLK/1

1 : 001b

HCLK/2

2 : 010b

HCLK/4

3 : 011b

HCLK/8

4 : 100b

HCLK/16

End of enumeration elements list.

CLKOUTPRE : CLKOUT APB clock source prescaler
bits : 28 - 58 (31 bit)
access : read-write

Enumeration:

0 : 000b

FCLKOUT/1

1 : 001b

FCLKOUT/2

2 : 010b

FCLKOUT/4

3 : 011b

FCLKOUT/8

4 : 100b

FCLKOUT/16

5 : 101b

FCLKOUT/32

6 : 110b

FCLKOUT/64

7 : 111b

FCLKOUT/128

End of enumeration elements list.



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