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ADC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2000 byte (0x0)
mem_usage : registers
protection :

Registers

ADM

RIS

CALI

ADB

IE


ADM

Offset:0x00 ADC Management Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADM ADM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHS GCHS EOC ADS ADLEN ADCKS ADENB AVREFHSEL VHS

CHS : ADC input channel
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : 0

AIN0

1 : 1

AIN1

2 : 2

AIN2

3 : 3

AIN3

4 : 4

AIN4

5 : 5

AIN5

6 : 6

AIN6

7 : 7

AIN7

8 : 8

AIN8

9 : 9

AIN9

10 : 10

AIN10

11 : 11

AIN11

12 : 12

AIN12

13 : 13

AIN13

14 : 14

AIN14

15 : 15

AIN15

16 : 16

AIN16(Internal reference voltage 4.5V/3V/2V)

17 : 17

AIN17(OP0O)

18 : 18

AIN18(OP1O)

End of enumeration elements list.

GCHS : ADC global channel enable
bits : 5 - 10 (6 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN channel

1 : Enable

Enable AIN channel

End of enumeration elements list.

EOC : ADC status
bits : 6 - 12 (7 bit)
access : read-write

Enumeration:

0 : Busy

ADC processing

1 : End

End of conversion

End of enumeration elements list.

ADS : ADC start control
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : Stop

ADC stopped

1 : Start

Start ADC conversion

End of enumeration elements list.

ADLEN : ADC resolution
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : 8-bit

8-bit ADB

1 : 12-bit

12-bit ADB

End of enumeration elements list.

ADCKS : ADC clock source divider
bits : 9 - 20 (12 bit)
access : read-write

Enumeration:

0 : 000b

ADC_PCLK/1

1 : 001b

ADC_PCLK/2

2 : 010b

ADC_PCLK/4

3 : 011b

ADC_PCLK/8

5 : 101b

ADC_PCLK/16

6 : 110b

ADC_PCLK/32

End of enumeration elements list.

ADENB : ADC enable
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : Disable

Disable ADC

1 : Enable

Enable ADC

End of enumeration elements list.

AVREFHSEL : ADC high reference voltage source
bits : 13 - 26 (14 bit)
access : read-write

Enumeration:

0 : Interal VDD

P2.0 acts as GPIO or AIN0 pin

1 : External reference voltage

P2.0 acts as AVREFH pin

End of enumeration elements list.

VHS : Internal Ref. voltage source
bits : 14 - 30 (17 bit)
access : read-write

Enumeration:

0 : 000b

Internal 2.0V as ADC internal reference high voltage

1 : 001b

Internal 3.0V as ADC internal reference high voltage

2 : 010b

Internal 4.5V as ADC internal reference high voltage

4 : 100b

VDD as ADC internal reference high voltage, Internal 2.0V as AIN10

5 : 101b

VDD as ADC internal reference high voltage, Internal 3.0V as AIN10

6 : 110b

VDD as ADC internal reference high voltage, Internal 4.5V as AIN10

7 : 111b

VDD as ADC internal reference high voltage

End of enumeration elements list.


RIS

Offset:0x10 ADC Raw Interrupt Status Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RIS RIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EOCIF0 EOCIF1 EOCIF2 EOCIF3 EOCIF4 EOCIF5 EOCIF6 EOCIF7 EOCIF8 EOCIF9 EOCIF10 EOCIF11 EOCIF12 EOCIF13 EOCIF14 EOCIF15 EOCIF16 EOCIF17 EOCIF18

EOCIF0 : AIN0 interrupt flag
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : No interrupt

No interrupt on AIN0

1 : Met interrupt requirements

AIN0 completes ADC conversion

End of enumeration elements list.

EOCIF1 : AIN1 interrupt flag
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : No interrupt

No interrupt on AIN1

1 : Met interrupt requirements

AIN1 completes ADC conversion

End of enumeration elements list.

EOCIF2 : AIN2 interrupt flag
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : No interrupt

No interrupt on AIN2

1 : Met interrupt requirements

AIN2 completes ADC conversion

End of enumeration elements list.

EOCIF3 : AIN0 interrupt flag
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : No interrupt

No interrupt on AIN3

1 : Met interrupt requirements

AIN3 completes ADC conversion

End of enumeration elements list.

EOCIF4 : AIN4 interrupt flag
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : No interrupt

No interrupt on AIN4

1 : Met interrupt requirements

AIN4 completes ADC conversion

End of enumeration elements list.

EOCIF5 : AIN5 interrupt flag
bits : 5 - 10 (6 bit)
access : read-write

Enumeration:

0 : No interrupt

No interrupt on AIN5

1 : Met interrupt requirements

AIN5 completes ADC conversion

End of enumeration elements list.

EOCIF6 : AIN6 interrupt flag
bits : 6 - 12 (7 bit)
access : read-write

Enumeration:

0 : No interrupt

No interrupt on AIN6

1 : Met interrupt requirements

AIN6 completes ADC conversion

End of enumeration elements list.

EOCIF7 : AIN7 interrupt flag
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : No interrupt

No interrupt on AIN7

1 : Met interrupt requirements

AIN7 completes ADC conversion

End of enumeration elements list.

EOCIF8 : AIN8 interrupt flag
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : No interrupt

No interrupt on AIN8

1 : Met interrupt requirements

AIN8 completes ADC conversion

End of enumeration elements list.

EOCIF9 : AIN9 interrupt flag
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : No interrupt

No interrupt on AIN9

1 : Met interrupt requirements

AIN9 completes ADC conversion

End of enumeration elements list.

EOCIF10 : AIN10 interrupt flag
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : No interrupt

No interrupt on AIN10

1 : Met interrupt requirements

AIN10 completes ADC conversion

End of enumeration elements list.

EOCIF11 : AIN11 interrupt flag
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

0 : No interrupt

No interrupt on AIN11

1 : Met interrupt requirements

AIN11 completes ADC conversion

End of enumeration elements list.

EOCIF12 : AIN12 interrupt flag
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : No interrupt

No interrupt on AIN12

1 : Met interrupt requirements

AIN12 completes ADC conversion

End of enumeration elements list.

EOCIF13 : AIN13 interrupt flag
bits : 13 - 26 (14 bit)
access : read-write

Enumeration:

0 : No interrupt

No interrupt on AIN13

1 : Met interrupt requirements

AIN13 completes ADC conversion

End of enumeration elements list.

EOCIF14 : AIN14 interrupt flag
bits : 14 - 28 (15 bit)
access : read-write

Enumeration:

0 : No interrupt

No interrupt on AIN14

1 : Met interrupt requirements

AIN14 completes ADC conversion

End of enumeration elements list.

EOCIF15 : AIN15 interrupt flag
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : No interrupt

No interrupt on AIN15

1 : Met interrupt requirements

AIN15 completes ADC conversion

End of enumeration elements list.

EOCIF16 : AIN16 interrupt flag
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : No interrupt

No interrupt on AIN16

1 : Met interrupt requirements

AIN16 completes ADC conversion

End of enumeration elements list.

EOCIF17 : AIN17 interrupt flag
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : No interrupt

No interrupt on AIN17

1 : Met interrupt requirements

AIN17 completes ADC conversion

End of enumeration elements list.

EOCIF18 : AIN18 interrupt flag
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : No interrupt

No interrupt on AIN18

1 : Met interrupt requirements

AIN18 completes ADC conversion

End of enumeration elements list.


CALI

Offset:0x14 ADC Calibration Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CALI CALI read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADB

Offset:0x04 ADC Data Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADB ADB read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADB

ADB : ADB11~ADB4 bits for 8-bit ADC, ADB11~ADB0 bits for 12-bit ADC
bits : 0 - 11 (12 bit)
access : read-only


IE

Offset:0x0C ADC Interrupt Enable Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IE IE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IE0 IE1 IE2 IE3 IE4 IE5 IE6 IE7 IE8 IE9 IE10 IE11 IE12 IE13 IE14 IE15 IE16 IE17 IE18

IE0 : AIN0 interrupt enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN0 interrupt

1 : Enable

ADC interrupt is triggered when AIN0 completes ADC conversion

End of enumeration elements list.

IE1 : AIN1 interrupt enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN1 interrupt

1 : Enable

ADC interrupt is triggered when AIN1 completes ADC conversion

End of enumeration elements list.

IE2 : AIN2 interrupt enable
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN2 interrupt

1 : Enable

ADC interrupt is triggered when AIN2 completes ADC conversion

End of enumeration elements list.

IE3 : AIN3 interrupt enable
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN3 interrupt

1 : Enable

ADC interrupt is triggered when AIN3 completes ADC conversion

End of enumeration elements list.

IE4 : AIN4 interrupt enable
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN4 interrupt

1 : Enable

ADC interrupt is triggered when AIN4 completes ADC conversion

End of enumeration elements list.

IE5 : AIN5 interrupt enable
bits : 5 - 10 (6 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN5 interrupt

1 : Enable

ADC interrupt is triggered when AIN5 completes ADC conversion

End of enumeration elements list.

IE6 : AIN6 interrupt enable
bits : 6 - 12 (7 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN6 interrupt

1 : Enable

ADC interrupt is triggered when AIN6 completes ADC conversion

End of enumeration elements list.

IE7 : AIN7 interrupt enable
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN7 interrupt

1 : Enable

ADC interrupt is triggered when AIN7 completes ADC conversion

End of enumeration elements list.

IE8 : AIN8 interrupt enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN8 interrupt

1 : Enable

ADC interrupt is triggered when AIN8 completes ADC conversion

End of enumeration elements list.

IE9 : AIN9 interrupt enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN9 interrupt

1 : Enable

ADC interrupt is triggered when AIN9 completes ADC conversion

End of enumeration elements list.

IE10 : AIN10 interrupt enable
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN10 interrupt

1 : Enable

ADC interrupt is triggered when AIN10 completes ADC conversion

End of enumeration elements list.

IE11 : AIN11 interrupt enable
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN11 interrupt

1 : Enable

ADC interrupt is triggered when AIN11 completes ADC conversion

End of enumeration elements list.

IE12 : AIN12 interrupt enable
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN12 interrupt

1 : Enable

ADC interrupt is triggered when AIN12 completes ADC conversion

End of enumeration elements list.

IE13 : AIN13 interrupt enable
bits : 13 - 26 (14 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN13 interrupt

1 : Enable

ADC interrupt is triggered when AIN13 completes ADC conversion

End of enumeration elements list.

IE14 : AIN14 interrupt enable
bits : 14 - 28 (15 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN14 interrupt

1 : Enable

ADC interrupt is triggered when AIN14 completes ADC conversion

End of enumeration elements list.

IE15 : AIN15 interrupt enable
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN15 interrupt

1 : Enable

ADC interrupt is triggered when AIN15 completes ADC conversion

End of enumeration elements list.

IE16 : AIN16 interrupt enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN16 interrupt

1 : Enable

ADC interrupt is triggered when AIN16 completes ADC conversion

End of enumeration elements list.

IE17 : AIN17 interrupt enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN17 interrupt

1 : Enable

ADC interrupt is triggered when AIN17 completes ADC conversion

End of enumeration elements list.

IE18 : AIN18 interrupt enable
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : Disable

Disable AIN18 interrupt

1 : Enable

ADC interrupt is triggered when AIN18 completes ADC conversion

End of enumeration elements list.



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