\n

DBG

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :

Registers

APBFX


APBFX

Mode Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

APBFX APBFX read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIM10DBGSTOP TIM11DBGSTOP LPTIMDBGSTOP PCADBGSTOP TIM1DBGSTOP RTCDBGSTOP BEEPDBGSTOP IWDGDBGSTOP WWDGDBGSTOP TIM2DBGSTOP KEY

TIM10DBGSTOP : No comment
bits : 0 - 0 (1 bit)
access : read-write

TIM11DBGSTOP : No comment
bits : 1 - 1 (1 bit)
access : read-write

LPTIMDBGSTOP : No comment
bits : 2 - 2 (1 bit)
access : read-write

PCADBGSTOP : No comment
bits : 4 - 4 (1 bit)
access : read-write

TIM1DBGSTOP : No comment
bits : 5 - 5 (1 bit)
access : read-write

RTCDBGSTOP : No comment
bits : 6 - 6 (1 bit)
access : read-write

BEEPDBGSTOP : No comment
bits : 8 - 8 (1 bit)
access : read-write

IWDGDBGSTOP : No comment
bits : 9 - 9 (1 bit)
access : read-write

WWDGDBGSTOP : No comment
bits : 10 - 10 (1 bit)
access : read-write

TIM2DBGSTOP : No comment
bits : 11 - 11 (1 bit)
access : read-write

KEY : No comment
bits : 16 - 31 (16 bit)
access : read-write



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