\n
address_offset : 0x0 Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection :
Auto Wake Timer Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIVSEL : ADC Enable
bits : 0 - 3 (4 bit)
access : read-write
AWKEN : ADC_ Start Control
bits : 4 - 4 (1 bit)
access : read-write
TCLKSEL : ADC Clock Select
bits : 5 - 6 (2 bit)
access : read-write
HXPRSC : ADC Channel Select
bits : 8 - 22 (15 bit)
access : read-write
Auto Wake Timer ReLoad Data Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RLDVAL : ADC Convect Auto Triger 0
bits : 0 - 7 (8 bit)
access : read-write
Auto Wake Timer Status Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AWUF : ADC Continue Convect Channel 7-0 Enable
bits : 0 - 0 (1 bit)
access : read-only
Auto Wake Interrupt Clear Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTCLR : ADC Channel 0 Result
bits : 0 - 0 (1 bit)
access : write-only
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