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PCA

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x74 byte (0x0)
mem_usage : registers
protection :

Registers

CR

CCAPM0

CCAPM1

CCAPM2

CCAPM3

CCAPM4

CCAP0L

CCAP0H

CCAP1L

CCAP1H

MOD

CCAP2L

CCAP2H

CCAP3L

CCAP3H

CCAP4L

CCAP4H

CCAPO

POCR

CCAP0

CCAP1

CCAP2

CCAP3

CCAP4

CNT

INTCLR


CR

Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCF0 CCF1 CCF2 CCF3 CCF4 CR CF

CCF0 : ADC Enable
bits : 0 - 0 (1 bit)
access : read-write

CCF1 : ADC_ Start Control
bits : 1 - 1 (1 bit)
access : read-write

CCF2 : ADC Clock Select
bits : 2 - 2 (1 bit)
access : read-write

CCF3 : ADC Channel Select
bits : 3 - 3 (1 bit)
access : read-write

CCF4 : ADC Sample Circle Select
bits : 4 - 4 (1 bit)
access : read-write

CR : ADC Continue Convert Status Control
bits : 6 - 6 (1 bit)
access : read-write

CF : ADC Continue Convert Status Control
bits : 7 - 7 (1 bit)
access : read-write


CCAPM0

PCA Captuer/Compare Model 0 Mode Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAPM0 CCAPM0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCIE PWM TOG MAT CAPN CAPP ECOM

CCIE : ADC_Channel 1 Result
bits : 0 - 0 (1 bit)
access : read-write

PWM : ADC_Channel 1 Result
bits : 1 - 1 (1 bit)
access : read-write

TOG : ADC_Channel 1 Result
bits : 2 - 2 (1 bit)
access : read-write

MAT : ADC_Channel 1 Result
bits : 3 - 3 (1 bit)
access : read-write

CAPN : ADC_Channel 1 Result
bits : 4 - 4 (1 bit)
access : read-write

CAPP : ADC_Channel 1 Result
bits : 5 - 5 (1 bit)
access : read-write

ECOM : ADC_Channel 1 Result
bits : 6 - 6 (1 bit)
access : read-write


CCAPM1

PCA Captuer/Compare Model 0 Mode Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAPM1 CCAPM1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCIE PWM TOG MAT CAPN CAPP ECOM

CCIE : ADC_Channel 1 Result
bits : 0 - 0 (1 bit)
access : read-write

PWM : ADC_Channel 1 Result
bits : 1 - 1 (1 bit)
access : read-write

TOG : ADC_Channel 1 Result
bits : 2 - 2 (1 bit)
access : read-write

MAT : ADC_Channel 1 Result
bits : 3 - 3 (1 bit)
access : read-write

CAPN : ADC_Channel 1 Result
bits : 4 - 4 (1 bit)
access : read-write

CAPP : ADC_Channel 1 Result
bits : 5 - 5 (1 bit)
access : read-write

ECOM : ADC_Channel 1 Result
bits : 6 - 6 (1 bit)
access : read-write


CCAPM2

PCA Captuer/Compare Model 0 Mode Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAPM2 CCAPM2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCIE PWM TOG MAT CAPN CAPP ECOM

CCIE : ADC_Channel 1 Result
bits : 0 - 0 (1 bit)
access : read-write

PWM : ADC_Channel 1 Result
bits : 1 - 1 (1 bit)
access : read-write

TOG : ADC_Channel 1 Result
bits : 2 - 2 (1 bit)
access : read-write

MAT : ADC_Channel 1 Result
bits : 3 - 3 (1 bit)
access : read-write

CAPN : ADC_Channel 1 Result
bits : 4 - 4 (1 bit)
access : read-write

CAPP : ADC_Channel 1 Result
bits : 5 - 5 (1 bit)
access : read-write

ECOM : ADC_Channel 1 Result
bits : 6 - 6 (1 bit)
access : read-write


CCAPM3

PCA Captuer/Compare Model 0 Mode Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAPM3 CCAPM3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCIE PWM TOG MAT CAPN CAPP ECOM

CCIE : ADC_Channel 1 Result
bits : 0 - 0 (1 bit)
access : read-write

PWM : ADC_Channel 1 Result
bits : 1 - 1 (1 bit)
access : read-write

TOG : ADC_Channel 1 Result
bits : 2 - 2 (1 bit)
access : read-write

MAT : ADC_Channel 1 Result
bits : 3 - 3 (1 bit)
access : read-write

CAPN : ADC_Channel 1 Result
bits : 4 - 4 (1 bit)
access : read-write

CAPP : ADC_Channel 1 Result
bits : 5 - 5 (1 bit)
access : read-write

ECOM : ADC_Channel 1 Result
bits : 6 - 6 (1 bit)
access : read-write


CCAPM4

PCA Captuer/Compare Model 0 Mode Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAPM4 CCAPM4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCIE PWM TOG MAT CAPN CAPP ECOM

CCIE : ADC_Channel 1 Result
bits : 0 - 0 (1 bit)
access : read-write

PWM : ADC_Channel 1 Result
bits : 1 - 1 (1 bit)
access : read-write

TOG : ADC_Channel 1 Result
bits : 2 - 2 (1 bit)
access : read-write

MAT : ADC_Channel 1 Result
bits : 3 - 3 (1 bit)
access : read-write

CAPN : ADC_Channel 1 Result
bits : 4 - 4 (1 bit)
access : read-write

CAPP : ADC_Channel 1 Result
bits : 5 - 5 (1 bit)
access : read-write

ECOM : ADC_Channel 1 Result
bits : 6 - 6 (1 bit)
access : read-write


CCAP0L

PCA Capture/Compare Model0 Low 8 bits Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAP0L CCAP0L read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCAP0

CCAP0 : ADC_Channel 6 Result
bits : 0 - 7 (8 bit)
access : read-write


CCAP0H

PCA Capture/Compare Model0 High 8 bits Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAP0H CCAP0H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCAP0

CCAP0 : ADC_Channel 7 Result
bits : 8 - 15 (8 bit)
access : read-write


CCAP1L

PCA Capture/Compare Model 1 Low 8 bits Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAP1L CCAP1L read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCAP1

CCAP1 : ADC_ Result
bits : 0 - 7 (8 bit)
access : read-write


CCAP1H

PCA Capture/Compare Model 1 High 8 bits Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAP1H CCAP1H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCAP1

CCAP1 : ADC_Convect Result Compare High Therashold
bits : 8 - 15 (8 bit)
access : read-write


MOD

Mode Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MOD MOD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CFIE CPS CIDL

CFIE : ADC Convect Auto Triger 0
bits : 0 - 0 (1 bit)
access : read-write

CPS : ADC Convect Auto Triger 1
bits : 1 - 3 (3 bit)
access : read-write

CIDL : ADC_Convect mode Select
bits : 7 - 7 (1 bit)
access : read-write


CCAP2L

PCA Capture/Compare Model 2 Low 8 bits Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAP2L CCAP2L read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCAP2

CCAP2 : ADC Convect Result Compare High threshold
bits : 0 - 7 (8 bit)
access : read-only


CCAP2H

PCA Capture/Compare Model 2 High 8 bits Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAP2H CCAP2H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCAP2

CCAP2 : ADC_Convect Result Compare Low Threshold
bits : 0 - 7 (8 bit)
access : read-write


CCAP3L

PCA Capture/Compare Model 3 Low 8 bits Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAP3L CCAP3L read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCAP3

CCAP3 : ADC Channel 7~0 Interrupt Mask Config
bits : 0 - 7 (8 bit)
access : read-write


CCAP3H

PCA Capture/Compare Model 3 High 8 bits Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAP3H CCAP3H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCAP3

CCAP3 : Reload value to use for 10ms timing
bits : 8 - 15 (8 bit)
access : read-write


CCAP4L

PCA Capture/Compare Model 4 Low 8 bits Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAP4L CCAP4L read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCAP4

CCAP4 : Reload value to use for 10ms timing
bits : 0 - 7 (8 bit)
access : read-write


CCAP4H

PCA Capture/Compare Model 4 High 8 bits Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAP4H CCAP4H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCAP4

CCAP4 : Reload value to use for 10ms timing
bits : 8 - 15 (8 bit)
access : read-write


CCAPO

PCA EndPoint Output Control Register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAPO CCAPO read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCAPO0 CCAPO1 CCAPO2 CCAPO3 CCAPO4

CCAPO0 : Reload value to use for 10ms timing
bits : 0 - 0 (1 bit)
access : read-write

CCAPO1 : Reload value to use for 10ms timing
bits : 1 - 1 (1 bit)
access : read-write

CCAPO2 : Reload value to use for 10ms timing
bits : 2 - 2 (1 bit)
access : read-write

CCAPO3 : Reload value to use for 10ms timing
bits : 3 - 3 (1 bit)
access : read-write

CCAPO4 : Reload value to use for 10ms timing
bits : 4 - 4 (1 bit)
access : read-write


POCR

PCA EndPoint Output Control Register
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

POCR POCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 POE0 POE1 POE2 POE3 POE4 POINV0 POINV1 POINV2 POINV3 POINV4

POE0 : Reload value to use for 10ms timing
bits : 0 - 0 (1 bit)
access : read-write

POE1 : Reload value to use for 10ms timing
bits : 1 - 1 (1 bit)
access : read-write

POE2 : Reload value to use for 10ms timing
bits : 2 - 2 (1 bit)
access : read-write

POE3 : Reload value to use for 10ms timing
bits : 3 - 3 (1 bit)
access : read-write

POE4 : Reload value to use for 10ms timing
bits : 4 - 4 (1 bit)
access : read-write

POINV0 : Reload value to use for 10ms timing
bits : 8 - 8 (1 bit)
access : read-write

POINV1 : Reload value to use for 10ms timing
bits : 9 - 9 (1 bit)
access : read-write

POINV2 : Reload value to use for 10ms timing
bits : 10 - 10 (1 bit)
access : read-write

POINV3 : Reload value to use for 10ms timing
bits : 11 - 11 (1 bit)
access : read-write

POINV4 : Reload value to use for 10ms timing
bits : 12 - 12 (1 bit)
access : read-write


CCAP0

PCA Capture/Compare Model0 16 bits Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAP0 CCAP0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCAP0

CCAP0 : Reload value to use for 10ms timing
bits : 0 - 15 (16 bit)
access : read-write


CCAP1

PCA Capture/Compare Model 1 16 bits Register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAP1 CCAP1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCAP1

CCAP1 : Reload value to use for 10ms timing
bits : 0 - 15 (16 bit)
access : read-write


CCAP2

PCA Capture/Compare Model 2 16 bits Register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAP2 CCAP2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCAP2

CCAP2 : Reload value to use for 10ms timing
bits : 0 - 15 (16 bit)
access : read-write


CCAP3

PCA Capture/Compare Model 3 16 bits Register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAP3 CCAP3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCAP3

CCAP3 : Reload value to use for 10ms timing
bits : 0 - 14 (15 bit)
access : read-write


CCAP4

PCA Capture/Compare Model 4 16 bits Register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCAP4 CCAP4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCAP4

CCAP4 : Reload value to use for 10ms timing
bits : 0 - 15 (16 bit)
access : read-write


CNT

PCA Count Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CNT CNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT

CNT : PCA counter value
bits : 0 - 7 (8 bit)
access : read-write


INTCLR

PCA Interrupt Clear Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTCLR INTCLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCF0 CCF1 CCF2 CCF3 CCF4 CF

CCF0 : ADC Channel 0 Result
bits : 0 - 0 (1 bit)
access : read-write

CCF1 : ADC Channel 0 Result
bits : 1 - 1 (1 bit)
access : read-write

CCF2 : ADC Channel 0 Result
bits : 2 - 2 (1 bit)
access : read-write

CCF3 : ADC Channel 0 Result
bits : 3 - 3 (1 bit)
access : read-write

CCF4 : ADC Channel 0 Result
bits : 4 - 4 (1 bit)
access : read-write

CF : ADC Channel 0 Result
bits : 7 - 7 (1 bit)
access : read-write



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