\n
address_offset : 0x0 Bytes (0x0)
size : 0x34 byte (0x0)
mem_usage : registers
protection :
Address Register 0
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AD : 7Bit Address
bits : 1 - 7 (7 bit)
access : read-write
Control Register 0
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WUEN : wakeup enable
bits : 2 - 2 (1 bit)
access : read-write
TACK : Transmit Acknowledge Enable
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
ACK will sent to the bus on the following receiving byte
#1 : 1
NACK will sent to the bus on the following receiving byte
End of enumeration elements list.
TX : Master Transmit Direction Select
bits : 4 - 4 (1 bit)
access : read-write
MSTR : I2C operation mode Select
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Slave Mode
#1 : 1
Master Mode
End of enumeration elements list.
IICIE : I2C interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write
IICEN : I2C Module Enable
bits : 7 - 7 (1 bit)
access : read-write
Control Register 1
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STREN : Slave SCL Strech Enable
bits : 0 - 0 (1 bit)
access : read-write
ARBEN : Arbitration Enable
bits : 3 - 3 (1 bit)
access : read-write
SYNCEN : SCL Sync Enable
bits : 4 - 4 (1 bit)
access : read-write
ADEXT : Slave Address Extension
bits : 6 - 6 (1 bit)
access : read-write
GCAEN : Slave General Call Enable
bits : 7 - 7 (1 bit)
access : read-write
Control Register 2
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MNTEN : Slave Monitor Function Enable
bits : 0 - 0 (1 bit)
access : read-write
NACKIE : NACK Get Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write
TXEMIE : Slave TX Buffer Empty Interrupt Enable
bits : 4 - 4 (1 bit)
access : read-write
RXFIE : Slave RX Buffer Full Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write
TXUFIE : Slave TX Buffer Underflow Error Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write
RXOFIE : Slave RX Buffer Overflow Error Interrupt Enable
bits : 7 - 7 (1 bit)
access : read-write
Control Register 3
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMATXEN : DMATX Enable
bits : 0 - 0 (1 bit)
access : read-write
DMARXEN : DMARX Enable
bits : 1 - 1 (1 bit)
access : read-write
Status Register 0
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RACK : Acknowledge Received(master or slave TX mode)
bits : 0 - 0 (1 bit)
access : read-write
SRW : Slave Read/Write Direction
bits : 2 - 2 (1 bit)
access : read-only
READY : Internal Hardware Core Is Ready For New Command or Not
bits : 3 - 3 (1 bit)
access : read-only
ARBLOST : Arbitration Lost Flag
bits : 4 - 4 (1 bit)
access : read-write
BUSY : Indicates The Status of The Bus in Slave/Master
bits : 5 - 5 (1 bit)
access : read-only
SAMF : Slave Address Match Flag
bits : 6 - 6 (1 bit)
access : read-write
BND : Byte Tx End Flag(include ACK bit, 9 SCL)
bits : 7 - 7 (1 bit)
access : read-write
Status Register 1
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXEF : Slave TX Buffer Empty Flag
bits : 0 - 0 (1 bit)
access : read-write
RXFF : Slave RX Buffer Full flag
bits : 1 - 1 (1 bit)
access : read-write
TXUF : Slave TX Buffer Underflow Flag
bits : 2 - 2 (1 bit)
access : read-write
RXOF : Slave RX Buffer Overflow Flag
bits : 3 - 3 (1 bit)
access : read-write
Deglitch Configuration Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DGL_CNT : Deglitch Counter
bits : 0 - 3 (4 bit)
access : read-write
STARTF : I2C Bus Start Flag
bits : 4 - 4 (1 bit)
access : read-write
SSIE : I2C Bus START or STOP Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write
STOPF : I2C Bus Stop Flag
bits : 6 - 6 (1 bit)
access : read-write
DGLEN : I2C Deglitch Filter Enable
bits : 7 - 7 (1 bit)
access : read-write
Data Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA : Data
bits : 0 - 7 (8 bit)
access : read-write
MAK : Slave Monitor Function ACK bit
bits : 8 - 8 (1 bit)
access : read-only
START_STOP Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
START : Master Send Start Signal
bits : 0 - 0 (1 bit)
access : read-write
STOP : Matsre Send I2C Stop Signal
bits : 1 - 1 (1 bit)
access : read-write
Address register 1
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AD : 10Bit Address
bits : 0 - 2 (3 bit)
access : read-write
RAD : 7bit Range Address
bits : 4 - 10 (7 bit)
access : read-write
RMEN : 7bit Range Enable
bits : 12 - 12 (1 bit)
access : read-write
SAMPLE_CNT Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SAMPLE_CNT : Adjust the width of each sample
bits : 0 - 7 (8 bit)
access : read-write
STEP_CNT Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STEP_CNT : Specifies the number of Samples per half pulse width
bits : 0 - 7 (8 bit)
access : read-write
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