\n
address_offset : 0x0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection :
Timer Load Value Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LDVAL : Timer Load Value
bits : 0 - 31 (32 bit)
access : read-write
Timer Current Count Value Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CVAL : Timer Current Count Value
bits : 0 - 31 (32 bit)
access : read-only
Timer Initialize Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TEN : Timer Channel Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer channel disabled
#1 : 1
Timer channel enabled
End of enumeration elements list.
TIE : Timer Channel Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Interrupt disabled
#1 : 1
Interrupt enabled
End of enumeration elements list.
LINKEN : Timer Link Mode Enable
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer is not linked,Timer is seperated
#1 : 1
Timer is Linked to previous timer
End of enumeration elements list.
Timer Flag Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TFLG : Timer Status Flag
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timeout has not yet occurred
#1 : 1
Timeout has occurred
End of enumeration elements list.
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