\n

ECC_SRAM

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection :

Registers

CTRL

ERR1_ADDR

ERR2_ADDR


CTRL

SRAM ECC status and control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ERR2_IRQEN ERR2_STATUS ERR_STATUS

ERR2_IRQEN : ECC 2 bit error interrupt enable
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

ECC 2 bit error interrupt disabled

#1 : 1

ECC 2 bit error interrupt enabled

End of enumeration elements list.

ERR2_STATUS : ECC 2 bit error status
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

#0 : 0

ECC 2 bit error is inactive

#1 : 1

ECC 2 bit error is active

End of enumeration elements list.

ERR_STATUS : ECC (2bit/1)bit error status
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

ECC has no error

#01 : 01

ECC 2 bit error is active

#10 : #10

ECC 1 bit error is active

#11 : 11

ECC 1 bit error is active

End of enumeration elements list.


ERR1_ADDR

ECC 1 bit error address
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ERR1_ADDR ERR1_ADDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ERR1_ADDR

ERR1_ADDR : ECC 1 bit Error Address
bits : 0 - 12 (13 bit)
access : read-only


ERR2_ADDR

ECC 2 bit error address
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ERR2_ADDR ERR2_ADDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ERR2_ADDR

ERR2_ADDR : ECC 2 bit Error Address
bits : 0 - 12 (13 bit)
access : read-only



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