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TRNG

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :

Registers

CTRL

STATUS

DATA


CTRL

TRNG Control Register.
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CTRL CTRL read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ODHT RND_IE HEALTH_EN AESKG_USR AESKG_SYS KEYWIPE

ODHT : Start On-Demand health test.
bits : 0 - 0 (1 bit)

RND_IE : To enable IRQ generation when a new 32-bit Random number is ready.
bits : 1 - 1 (1 bit)

Enumeration:

0 : disable

Disable

1 : enable

Enable

End of enumeration elements list.

HEALTH_EN : Enable IRQ generation when a health test fails.
bits : 2 - 2 (1 bit)

AESKG_USR : AES Key Generate. When enabled, the key for securing NVSRAM is generated and transferred to the secure key register automatically without user visibility or intervention. This bit is cleared by hardware once the key has been transferred to the secure key register.
bits : 3 - 3 (1 bit)

AESKG_SYS : AESKG_SYS.
bits : 4 - 4 (1 bit)

KEYWIPE : To wipe the Battery Backed key.
bits : 15 - 15 (1 bit)


STATUS

Data. The content of this register is valid only when RNG_IS = 1. When TRNG is disabled, read returns 0x0000 0000.
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUS STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RDY ODHT HT SRCFAIL AESKGD LD_CNT

RDY : 32-bit random data is ready to read from TRNG_DATA register. Reading TRNG_DATA when RND_RDY=0 will return all 0's. IRQ is generated when RND_RDY=1 if TRNG_CN.RND_IRQ_EN=1.
bits : 0 - 0 (1 bit)

Enumeration:

0 : Busy

TRNG Busy

1 : Ready

32 bit random data is ready

End of enumeration elements list.

ODHT : On-Demand health test status.
bits : 1 - 1 (1 bit)

HT : Health test status.
bits : 2 - 2 (1 bit)

SRCFAIL : Entropy source has failed.
bits : 3 - 3 (1 bit)

AESKGD : AESKGD.
bits : 4 - 4 (1 bit)

LD_CNT : LD_CNT.
bits : 24 - 31 (8 bit)


DATA

Data. The content of this register is valid only when RNG_IS = 1. When TRNG is disabled, read returns 0x0000 0000.
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

DATA DATA read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data. The content of this register is valid only when RNG_IS =1. When TNRG is disabled, read returns 0x0000 0000.
bits : 0 - 31 (32 bit)



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