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TP

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :

Registers

TKPC

TKCR

TKASCR

TKAKCR

TKACSGCR

GAPH4DCCR

TKAB

TKAWB

TKAWR

TKAFCR

TKAFB

TKABFU

TKABFL

TKARMX

TKARMN

TKABINR

TKABDR

TKAHMR

TKCCR

TKPH1SR

TKNOSR

TKPH2SR

TKBSCR

TKBKCR

TKBCSGCR

GBPH4DCCR

TKBB

TKBWB

TKBWR

TKBFCR

TKBFB

TKBBFU

TKBBFL

TKBRMX

TKBRMN

TKBBINR

TKBBDR

TKBHMR

TKSWR

TKPH4SR

TKPH4LAT

TKSCR

TKCSCR

TKCKCR

TKCCSGCR

GCPH4DCCR

TKCB

TKCWB

TKCWR

TKCFCR

TKCFB

TKCBFU

TKCBFL

TKCRMX

TKCRMN

TKCBINR

TKCBDR

TKCHMR

TKITOR

FFCR1

TKCPC

FFCR2

TKDSCR

TKDKCR

TKDCSGCR

GDPH4DCCR

TKDB

TKDWB

TKDWR

TKDFCR

TKDFB

TKDBFU

TKDBFL

TKDRMX

TKDRMN

TKDBINR

TKDBDR

TKDHMR

FFDIAR

FFDOAR

SNCR

TKDCSR

TKESCR

TKEKCR

TKECSGCR

GEPH4DCCR

TKEB

TKEWB

TKEWR

TKEFCR

TKEFB

TKEBFU

TKEBFL

TKERMX

TKERMN

TKEBINR

TKEBDR

TKEHMR

TKDOAR

TKFSCR

TKFKCR

TKFCSGCR

GFPH4DCCR

TKFB

TKFWB

TKFWR

TKFFCR

TKFFB

TKFBFU

TKFBFL

TKFRMX

TKFRMN

TKFBINR

TKFBDR

TKFHMR

TKDCR

TKSSR

TK_KEY

TKTCR1

TKTCR2


TKPC

Touch Key Pin Control Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKPC TKPC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKEP

TKEP : TKEP23 to TKEP0
bits : 0 - 23 (24 bit)
access : read-write


TKCR

Touch Key Control Register
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKCR TKCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VTRK TKIAS TRVS TKPSB LDOEN TPMS TKLS PH4DCG DCG TKL ENCAL_SELF ENCAL_MU

VTRK : TK Regulator Voltage track enable bit, When TKPSB=0 action
bits : 0 - 0 (1 bit)
access : read-write

TKIAS : TK Inactive pin function select
bits : 1 - 2 (2 bit)
access : read-write

TRVS : TK Regulator Voltage level Select
bits : 2 - 5 (4 bit)
access : read-write

TKPSB : TK power source select bit
bits : 5 - 10 (6 bit)
access : read-write

LDOEN : LDO Enable bit, if TK power source form VDD, this bit invalid
bits : 6 - 12 (7 bit)
access : read-write

TPMS : Touch Key Mode select bit
bits : 7 - 14 (8 bit)
access : read-write

TKLS : Touch Key Loading capacitor Select Bits
bits : 8 - 17 (10 bit)
access : read-write

PH4DCG : Discharge current gain control for phase 4
bits : 12 - 25 (14 bit)
access : read-write

DCG : Discharge current gain control
bits : 14 - 29 (16 bit)
access : read-write

TKL : TK Self Loading Capacitor multiple set Bits
bits : 16 - 33 (18 bit)
access : read-write

ENCAL_SELF : Self calibration enable control Bit
bits : 18 - 36 (19 bit)
access : read-write

ENCAL_MU : Mutual calibration enable control bit
bits : 19 - 38 (20 bit)
access : read-write


TKASCR

Touch Key Group A Select Control Register
address_offset : 0x100 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKASCR TKASCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKASW DRVA TKAEN

TKASW : Touch Key Group A pin Selected Bits
bits : 0 - 1 (2 bit)
access : read-write

DRVA : Group A Drive PIN control bit, only for Self type mode
bits : 6 - 12 (7 bit)
access : read-write

TKAEN : Touch Key Group A Enable Bit
bits : 7 - 14 (8 bit)
access : read-write


TKAKCR

Touch Key Group A Loading Capacitor Calibration Control Register
address_offset : 0x104 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKAKCR TKAKCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKASC TKAMC

TKASC : Touch Key Self Load capacitor Calibration Select Bits
bits : 0 - 3 (4 bit)
access : read-write

TKAMC : Touch Key Mutual Load capacitor Calibration Select Bits
bits : 8 - 19 (12 bit)
access : read-write


TKACSGCR

Touch Key of Group A Calculate Step and Gain Control Register
address_offset : 0x108 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKACSGCR TKACSGCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GADCS GMAC

GADCS : Group A Discharge Current Source select Bits
bits : 0 - 4 (5 bit)
access : read-write

GMAC : GM gain Control for Group A
bits : 8 - 18 (11 bit)
access : read-write


GAPH4DCCR

Group A Discharge Current Control Register for phase4
address_offset : 0x10C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GAPH4DCCR GAPH4DCCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GADC

GADC : Group A Discharge Current Source select bits for phase4
bits : 0 - 4 (5 bit)
access : read-write


TKAB

The Most Significant Byte of A Group Touch Key Buffer
address_offset : 0x110 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKAB TKAB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKA

TKA : The Least Significant Byte of A Group Touch Key Buffer
bits : 0 - 15 (16 bit)
access : read-write


TKAWB

TK of Group A idle Scan Wakeup Base Register
address_offset : 0x114 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKAWB TKAWB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TAWB

TAWB : TK group A idle scan wakeup base set bits
bits : 0 - 15 (16 bit)
access : read-write


TKAWR

TK of Group A idle Scan Wakeup Range Register
address_offset : 0x118 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKAWR TKAWR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TAWR

TAWR : TK group A idle scan wakeup range multiplicand set bits
bits : 0 - 15 (16 bit)
access : read-write


TKAFCR

Touch Key of Group A Filter Control Register
address_offset : 0x11C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKAFCR TKAFCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKADCE TKAHME TKABFEN

TKADCE : TK scan raw data Max./Min. catch Enable bit
bits : 1 - 2 (2 bit)
access : read-write

TKAHME : TK Histogram mode Enable bit
bits : 2 - 4 (3 bit)
access : read-write

TKABFEN : TK bounce filter Enable bit
bits : 7 - 14 (8 bit)
access : read-write


TKAFB

TK Group A Filter Buffer
address_offset : 0x120 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKAFB TKAFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TAFB

TAFB : The filter Buffer
bits : 0 - 15 (16 bit)
access : read-write


TKABFU

TK Group A Bounce Filter Upper limit Register
address_offset : 0x124 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKABFU TKABFU read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TABU

TABU : The Bounce filter Upper limit set, above upper limit recoup TxBDR
bits : 0 - 15 (16 bit)
access : read-write


TKABFL

TK Group A Bounce Filter Lower limit Register
address_offset : 0x128 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKABFL TKABFL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TABL

TABL : The Bounce filter Lower limit set, below lower limit recoup TxBDR
bits : 0 - 15 (16 bit)
access : read-write


TKARMX

TK Group x Scan raw data Max. Register
address_offset : 0x12C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKARMX TKARMX read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TARMX

TARMX : TK Scan raw data Max. value
bits : 0 - 15 (16 bit)
access : read-write


TKARMN

TK Group A Scan raw data Min. Register
address_offset : 0x130 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKARMN TKARMN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TARMN

TARMN : TK Scan raw data Min. value
bits : 0 - 15 (16 bit)
access : read-write


TKABINR

TK Group A Bounce filter Invalid number Register
address_offset : 0x134 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKABINR TKABINR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TABINR

TABINR : TK Bounce filter Invalid number for Scan raw data
bits : 0 - 7 (8 bit)
access : read-write


TKABDR

TK Group A Bounce filter Invalid data recoup Register
address_offset : 0x138 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKABDR TKABDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKABDR

TKABDR : TK Bounce filter Invalid data recoup value set register
bits : 0 - 7 (8 bit)
access : read-write


TKAHMR

TK Group x Histogram mode value set Register
address_offset : 0x13C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKAHMR TKAHMR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TAHMR

TAHMR : TK Histogram mode value set register
bits : 0 - 15 (16 bit)
access : read-write


TKCCR

Touch Key Calculate Cycle Register
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKCCR TKCCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TCCY

TCCY : Touch Key Calculate Cycle set bits
bits : 0 - 15 (16 bit)
access : read-write


TKPH1SR

Touch Key Phase1 Width set Register
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKPH1SR TKPH1SR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PH1S

PH1S : Phase1 width active set control bits
bits : 0 - 15 (16 bit)
access : read-write


TKNOSR

Touch Key Phase1,2 Non-Overlap Width set Register
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKNOSR TKNOSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PH1OV

PH1OV : PH1, PH2 non-overlap width set bits
bits : 0 - 15 (16 bit)
access : read-write


TKPH2SR

Touch Key Phase2 Width set Register
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKPH2SR TKPH2SR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TPH2S

TPH2S : Phase2 width active set control bits
bits : 0 - 15 (16 bit)
access : read-write


TKBSCR

Touch Key Group B Select Control Register
address_offset : 0x200 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKBSCR TKBSCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKBSW DRVB TKBEN

TKBSW : Touch Key Group B pin Selected Bits
bits : 0 - 1 (2 bit)
access : read-write

DRVB : Group B Drive PIN control bit, only for Self type mode
bits : 6 - 12 (7 bit)
access : read-write

TKBEN : Touch Key Group B Enable Bit
bits : 7 - 14 (8 bit)
access : read-write


TKBKCR

Touch Key Group B Loading Capacitor Calibration Control Register
address_offset : 0x204 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKBKCR TKBKCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKBSC TKBMC

TKBSC : Touch Key Self Load capacitor Calibration Select Bits
bits : 0 - 3 (4 bit)
access : read-write

TKBMC : Touch Key Mutual Load capacitor Calibration Select Bits
bits : 8 - 19 (12 bit)
access : read-write


TKBCSGCR

Touch Key of Group B Calculate Step and Gain Control Register
address_offset : 0x208 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKBCSGCR TKBCSGCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GBDCS GMBC

GBDCS : Group B Discharge Current Source select Bits
bits : 0 - 4 (5 bit)
access : read-write

GMBC : GM gain Control for Group B
bits : 8 - 18 (11 bit)
access : read-write


GBPH4DCCR

Group B Discharge Current Control Register for phase4
address_offset : 0x20C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GBPH4DCCR GBPH4DCCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GBDC

GBDC : Group B Discharge Current Source select bits for phase4
bits : 0 - 4 (5 bit)
access : read-write


TKBB

The Most Significant Byte of B Group Touch Key Buffer
address_offset : 0x210 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKBB TKBB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKB

TKB : The Least Significant Byte of B Group Touch Key Buffer
bits : 0 - 15 (16 bit)
access : read-write


TKBWB

TK of Group B idle Scan Wakeup Base Register
address_offset : 0x214 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKBWB TKBWB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TBWB

TBWB : TK group B idle scan wakeup base set bits
bits : 0 - 15 (16 bit)
access : read-write


TKBWR

TK of Group B idle Scan Wakeup Range Register
address_offset : 0x218 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKBWR TKBWR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TBWR

TBWR : TK group B idle scan wakeup range multiplicand set bits
bits : 0 - 15 (16 bit)
access : read-write


TKBFCR

Touch Key of Group B Filter Control Register
address_offset : 0x21C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKBFCR TKBFCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKBDCE TKBHME TKBBFEN

TKBDCE : TK scan raw data Max./Min. catch Enable bit
bits : 1 - 2 (2 bit)
access : read-write

TKBHME : TK Histogram mode Enable bit
bits : 2 - 4 (3 bit)
access : read-write

TKBBFEN : TK bounce filter Enable bit
bits : 7 - 14 (8 bit)
access : read-write


TKBFB

TK Group B Filter Buffer
address_offset : 0x220 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKBFB TKBFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TBFB

TBFB : The filter Buffer
bits : 0 - 15 (16 bit)
access : read-write


TKBBFU

TK Group B Bounce Filter Upper limit Register
address_offset : 0x224 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKBBFU TKBBFU read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TBBU

TBBU : The Bounce filter Upper limit set, above upper limit recoup TxBDR
bits : 0 - 15 (16 bit)
access : read-write


TKBBFL

TK Group B Bounce Filter Lower limit Register
address_offset : 0x228 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKBBFL TKBBFL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TBBL

TBBL : The Bounce filter Lower limit set, below lower limit recoup TxBDR
bits : 0 - 15 (16 bit)
access : read-write


TKBRMX

TK Group x Scan raw data Max. Register
address_offset : 0x22C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKBRMX TKBRMX read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TBRMX

TBRMX : TK Scan raw data Max. value
bits : 0 - 15 (16 bit)
access : read-write


TKBRMN

TK Group B Scan raw data Min. Register
address_offset : 0x230 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKBRMN TKBRMN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TBRMN

TBRMN : TK Scan raw data Min. value
bits : 0 - 15 (16 bit)
access : read-write


TKBBINR

TK Group B Bounce filter Invalid number Register
address_offset : 0x234 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKBBINR TKBBINR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TBBINR

TBBINR : TK Bounce filter Invalid number for Scan raw data
bits : 0 - 7 (8 bit)
access : read-write


TKBBDR

TK Group B Bounce filter Invalid data recoup Register
address_offset : 0x238 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKBBDR TKBBDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKBBDR

TKBBDR : TK Bounce filter Invalid data recoup value set register
bits : 0 - 7 (8 bit)
access : read-write


TKBHMR

TK Group x Histogram mode value set Register
address_offset : 0x23C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKBHMR TKBHMR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TBHMR

TBHMR : TK Histogram mode value set register
bits : 0 - 15 (16 bit)
access : read-write


TKSWR

Touch Key Sensing Window Register
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKSWR TKSWR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TSW

TSW : Touch Key Sensing Window clock set bits
bits : 0 - 15 (16 bit)
access : read-write


TKPH4SR

Touch Key Phase 4 Width Set Register
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKPH4SR TKPH4SR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PH4S

PH4S : Phase 4 active width set buffer
bits : 0 - 15 (16 bit)
access : read-write


TKPH4LAT

Touch Pad Phase 4 Latency time Set Register
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKPH4LAT TKPH4LAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P4LAT

P4LAT : Phase 4 Latency width set buffer
bits : 0 - 7 (8 bit)
access : read-write


TKSCR

Touch Key idle Scan Control Register
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKSCR TKSCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKST TKISE TKIWS

TKST : Touch Key idle scan time setting Bits
bits : 0 - 15 (16 bit)
access : read-write

TKISE : TK idle with scan mode enable bit, for Low consumption application
bits : 16 - 32 (17 bit)
access : read-write

TKIWS : TK idle with scan mode Wakeup Reference TK Buffer/Filter Buffer select bit
bits : 17 - 34 (18 bit)
access : read-write


TKCSCR

Touch Key Group C Select Control Register
address_offset : 0x300 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKCSCR TKCSCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKCSW DRVC TKCEN

TKCSW : Touch Key Group C pin Selected Bits
bits : 0 - 1 (2 bit)
access : read-write

DRVC : Group C Drive PIN control bit, only for Self type mode
bits : 6 - 12 (7 bit)
access : read-write

TKCEN : Touch Key Group C Enable Bit
bits : 7 - 14 (8 bit)
access : read-write


TKCKCR

Touch Key Group C Loading Capacitor Calibration Control Register
address_offset : 0x304 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKCKCR TKCKCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKCSC TKCMC

TKCSC : Touch Key Self Load capacitor Calibration Select Bits
bits : 0 - 3 (4 bit)
access : read-write

TKCMC : Touch Key Mutual Load capacitor Calibration Select Bits
bits : 8 - 19 (12 bit)
access : read-write


TKCCSGCR

Touch Key of Group C Calculate Step and Gain Control Register
address_offset : 0x308 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKCCSGCR TKCCSGCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GCDCS GMCC

GCDCS : Group C Discharge Current Source select Bits
bits : 0 - 4 (5 bit)
access : read-write

GMCC : GM gain Control for Group C
bits : 8 - 18 (11 bit)
access : read-write


GCPH4DCCR

Group C Discharge Current Control Register for phase4
address_offset : 0x30C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GCPH4DCCR GCPH4DCCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GCDC

GCDC : Group C Discharge Current Source select bits for phase4
bits : 0 - 4 (5 bit)
access : read-write


TKCB

The Most Significant Byte of C Group Touch Key Buffer
address_offset : 0x310 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKCB TKCB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKC

TKC : The Least Significant Byte of C Group Touch Key Buffer
bits : 0 - 15 (16 bit)
access : read-write


TKCWB

TK of Group C idle Scan Wakeup Base Register
address_offset : 0x314 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKCWB TKCWB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TCWB

TCWB : TK group C idle scan wakeup base set bits
bits : 0 - 15 (16 bit)
access : read-write


TKCWR

TK of Group C idle Scan Wakeup Range Register
address_offset : 0x318 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKCWR TKCWR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TCWR

TCWR : TK group C idle scan wakeup range multiplicand set bits
bits : 0 - 15 (16 bit)
access : read-write


TKCFCR

Touch Key of Group C Filter Control Register
address_offset : 0x31C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKCFCR TKCFCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKCDCE TKCHME TKCBFEN

TKCDCE : TK scan raw data Max./Min. catch Enable bit
bits : 1 - 2 (2 bit)
access : read-write

TKCHME : TK Histogram mode Enable bit
bits : 2 - 4 (3 bit)
access : read-write

TKCBFEN : TK bounce filter Enable bit
bits : 7 - 14 (8 bit)
access : read-write


TKCFB

TK Group C Filter Buffer
address_offset : 0x320 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKCFB TKCFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TCFB

TCFB : The filter Buffer
bits : 0 - 15 (16 bit)
access : read-write


TKCBFU

TK Group C Bounce Filter Upper limit Register
address_offset : 0x324 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKCBFU TKCBFU read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TCBU

TCBU : The Bounce filter Upper limit set, above upper limit recoup TxBDR
bits : 0 - 15 (16 bit)
access : read-write


TKCBFL

TK Group C Bounce Filter Lower limit Register
address_offset : 0x328 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKCBFL TKCBFL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TCBL

TCBL : The Bounce filter Lower limit set, below lower limit recoup TxBDR
bits : 0 - 15 (16 bit)
access : read-write


TKCRMX

TK Group x Scan raw data Max. Register
address_offset : 0x32C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKCRMX TKCRMX read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TCRMX

TCRMX : TK Scan raw data Max. value
bits : 0 - 15 (16 bit)
access : read-write


TKCRMN

TK Group C Scan raw data Min. Register
address_offset : 0x330 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKCRMN TKCRMN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TCRMN

TCRMN : TK Scan raw data Min. value
bits : 0 - 15 (16 bit)
access : read-write


TKCBINR

TK Group C Bounce filter Invalid number Register
address_offset : 0x334 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKCBINR TKCBINR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TCBINR

TCBINR : TK Bounce filter Invalid number for Scan raw data
bits : 0 - 7 (8 bit)
access : read-write


TKCBDR

TK Group C Bounce filter Invalid data recoup Register
address_offset : 0x338 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKCBDR TKCBDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKCBDR

TKCBDR : TK Bounce filter Invalid data recoup value set register
bits : 0 - 7 (8 bit)
access : read-write


TKCHMR

TK Group x Histogram mode value set Register
address_offset : 0x33C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKCHMR TKCHMR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TCHMR

TCHMR : TK Histogram mode value set register
bits : 0 - 15 (16 bit)
access : read-write


TKITOR

Touch Key idle scan time out counter Register
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKITOR TKITOR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKITO

TKITO : TK idle scan mode time out counter set bits
bits : 0 - 15 (16 bit)
access : read-write


FFCR1

Find Finger Control Register 1
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FFCR1 FFCR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 POINTNUM YLEN XLEN FF_high_low FF_FINISH FFEN

POINTNUM : output value when surrounding points greater than
bits : 0 - 3 (4 bit)
access : read-write

YLEN : length of Y axis
bits : 4 - 11 (8 bit)
access : read-write

XLEN : length of X axis
bits : 8 - 19 (12 bit)
access : read-write

FF_high_low : number of idle scan
bits : 12 - 24 (13 bit)
access : read-write

FF_FINISH : Find finger algorithm finish flag, reset by software
bits : 13 - 26 (14 bit)
access : read-write

FFEN : find finger function enable bit
bits : 15 - 30 (16 bit)
access : read-write


TKCPC

Touch Key Combine Pin Control Register
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKCPC TKCPC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKCE

TKCE : TKCE23 to TKCE0
bits : 0 - 23 (24 bit)
access : read-write


FFCR2

Find Finger Control Register 2
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FFCR2 FFCR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NOISEOFFSET NEIGHBORGAP

NOISEOFFSET : noise offset value
bits : 0 - 9 (10 bit)
access : read-write

NEIGHBORGAP : How much is greater than the surrounding points
bits : 10 - 25 (16 bit)
access : read-write


TKDSCR

Touch Key Group D Select Control Register
address_offset : 0x400 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKDSCR TKDSCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKDSW DRVD TKDEN

TKDSW : Touch Key Group D pin Selected Bits
bits : 0 - 1 (2 bit)
access : read-write

DRVD : Group D Drive PIN control bit, only for Self type mode
bits : 6 - 12 (7 bit)
access : read-write

TKDEN : Touch Key Group D Enable Bit
bits : 7 - 14 (8 bit)
access : read-write


TKDKCR

Touch Key Group D Loading Capacitor Calibration Control Register
address_offset : 0x404 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKDKCR TKDKCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKDSC TKDMC

TKDSC : Touch Key Self Load capacitor Calibration Select Bits
bits : 0 - 3 (4 bit)
access : read-write

TKDMC : Touch Key Mutual Load capacitor Calibration Select Bits
bits : 8 - 19 (12 bit)
access : read-write


TKDCSGCR

Touch Key of Group D Calculate Step and Gain Control Register
address_offset : 0x408 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKDCSGCR TKDCSGCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GDDCS GMDC

GDDCS : Group D Discharge Current Source select Bits
bits : 0 - 4 (5 bit)
access : read-write

GMDC : GM gain Control for Group D
bits : 8 - 18 (11 bit)
access : read-write


GDPH4DCCR

Group D Discharge Current Control Register for phase4
address_offset : 0x40C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GDPH4DCCR GDPH4DCCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GDDC

GDDC : Group D Discharge Current Source select bits for phase4
bits : 0 - 4 (5 bit)
access : read-write


TKDB

The Most Significant Byte of D Group Touch Key Buffer
address_offset : 0x410 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKDB TKDB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKD

TKD : The Least Significant Byte of D Group Touch Key Buffer
bits : 0 - 15 (16 bit)
access : read-write


TKDWB

TK of Group D idle Scan Wakeup Base Register
address_offset : 0x414 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKDWB TKDWB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TDWB

TDWB : TK group D idle scan wakeup base set bits
bits : 0 - 15 (16 bit)
access : read-write


TKDWR

TK of Group D idle Scan Wakeup Range Register
address_offset : 0x418 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKDWR TKDWR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TDWR

TDWR : TK group D idle scan wakeup range multiplicand set bits
bits : 0 - 15 (16 bit)
access : read-write


TKDFCR

Touch Key of Group D Filter Control Register
address_offset : 0x41C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKDFCR TKDFCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKDDCE TKDHME TKDBFEN

TKDDCE : TK scan raw data Max./Min. catch Enable bit
bits : 1 - 2 (2 bit)
access : read-write

TKDHME : TK Histogram mode Enable bit
bits : 2 - 4 (3 bit)
access : read-write

TKDBFEN : TK bounce filter Enable bit
bits : 7 - 14 (8 bit)
access : read-write


TKDFB

TK Group D Filter Buffer
address_offset : 0x420 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKDFB TKDFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TDFB

TDFB : The filter Buffer
bits : 0 - 15 (16 bit)
access : read-write


TKDBFU

TK Group D Bounce Filter Upper limit Register
address_offset : 0x424 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKDBFU TKDBFU read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TDBU

TDBU : The Bounce filter Upper limit set, above upper limit recoup TxBDR
bits : 0 - 15 (16 bit)
access : read-write


TKDBFL

TK Group D Bounce Filter Lower limit Register
address_offset : 0x428 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKDBFL TKDBFL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TDBL

TDBL : The Bounce filter Lower limit set, below lower limit recoup TxBDR
bits : 0 - 15 (16 bit)
access : read-write


TKDRMX

TK Group x Scan raw data Max. Register
address_offset : 0x42C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKDRMX TKDRMX read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TDRMX

TDRMX : TK Scan raw data Max. value
bits : 0 - 15 (16 bit)
access : read-write


TKDRMN

TK Group D Scan raw data Min. Register
address_offset : 0x430 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKDRMN TKDRMN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TDRMN

TDRMN : TK Scan raw data Min. value
bits : 0 - 15 (16 bit)
access : read-write


TKDBINR

TK Group D Bounce filter Invalid number Register
address_offset : 0x434 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKDBINR TKDBINR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TDBINR

TDBINR : TK Bounce filter Invalid number for Scan raw data
bits : 0 - 7 (8 bit)
access : read-write


TKDBDR

TK Group D Bounce filter Invalid data recoup Register
address_offset : 0x438 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKDBDR TKDBDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKDBDR

TKDBDR : TK Bounce filter Invalid data recoup value set register
bits : 0 - 7 (8 bit)
access : read-write


TKDHMR

TK Group x Histogram mode value set Register
address_offset : 0x43C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKDHMR TKDHMR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TDHMR

TDHMR : TK Histogram mode value set register
bits : 0 - 15 (16 bit)
access : read-write


FFDIAR

Find Finger Data Input Address Register
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FFDIAR FFDIAR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FFDIAR

FFDIAR : find finger data address input
bits : 0 - 6 (7 bit)
access : read-write


FFDOAR

Find Finger Data Output Address Register
address_offset : 0x48 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FFDOAR FFDOAR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FFDOAR

FFDOAR : find finger data address output
bits : 0 - 6 (7 bit)
access : read-write


SNCR

Skip Number Control Register
address_offset : 0x4C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SNCR SNCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SKIP_NUM

SKIP_NUM : Skip number of sample in begin period
bits : 0 - 7 (8 bit)
access : read-write


TKDCSR

TK Scan Raw Data Control Register
address_offset : 0x50 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKDCSR TKDCSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKGS TKTRM

TKGS : TK Groupp select Register for scan data output
bits : 0 - 2 (3 bit)
access : read-write

TKTRM : TK Scan raw data move to RAM Enable bit
bits : 7 - 14 (8 bit)
access : read-write


TKESCR

Touch Key Group E Select Control Register
address_offset : 0x500 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKESCR TKESCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKESW DRVE TKEEN

TKESW : Touch Key Group E pin Selected Bits
bits : 0 - 1 (2 bit)
access : read-write

DRVE : Group E Drive PIN control bit, only for Self type mode
bits : 6 - 12 (7 bit)
access : read-write

TKEEN : Touch Key Group E Enable Bit
bits : 7 - 14 (8 bit)
access : read-write


TKEKCR

Touch Key Group E Loading Capacitor Calibration Control Register
address_offset : 0x504 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKEKCR TKEKCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKESC TKEMC

TKESC : Touch Key Self Load capacitor Calibration Select Bits
bits : 0 - 3 (4 bit)
access : read-write

TKEMC : Touch Key Mutual Load capacitor Calibration Select Bits
bits : 8 - 19 (12 bit)
access : read-write


TKECSGCR

Touch Key of Group E Calculate Step and Gain Control Register
address_offset : 0x508 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKECSGCR TKECSGCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GEDCS GMEC

GEDCS : Group E Discharge Current Source select Bits
bits : 0 - 4 (5 bit)
access : read-write

GMEC : GM gain Control for Group E
bits : 8 - 18 (11 bit)
access : read-write


GEPH4DCCR

Group E Discharge Current Control Register for phase4
address_offset : 0x50C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GEPH4DCCR GEPH4DCCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GEDC

GEDC : Group E Discharge Current Source select bits for phase4
bits : 0 - 4 (5 bit)
access : read-write


TKEB

The Most Significant Byte of E Group Touch Key Buffer
address_offset : 0x510 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKEB TKEB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKE

TKE : The Least Significant Byte of E Group Touch Key Buffer
bits : 0 - 15 (16 bit)
access : read-write


TKEWB

TK of Group E idle Scan Wakeup Base Register
address_offset : 0x514 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKEWB TKEWB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TEWB

TEWB : TK group E idle scan wakeup base set bits
bits : 0 - 15 (16 bit)
access : read-write


TKEWR

TK of Group E idle Scan Wakeup Range Register
address_offset : 0x518 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKEWR TKEWR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TEWR

TEWR : TK group E idle scan wakeup range multiplicand set bits
bits : 0 - 15 (16 bit)
access : read-write


TKEFCR

Touch Key of Group E Filter Control Register
address_offset : 0x51C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKEFCR TKEFCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKEDCE TKEHME TKEBFEN

TKEDCE : TK scan raw data Max./Min. catch Enable bit
bits : 1 - 2 (2 bit)
access : read-write

TKEHME : TK Histogram mode Enable bit
bits : 2 - 4 (3 bit)
access : read-write

TKEBFEN : TK bounce filter Enable bit
bits : 7 - 14 (8 bit)
access : read-write


TKEFB

TK Group E Filter Buffer
address_offset : 0x520 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKEFB TKEFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TEFB

TEFB : The filter Buffer
bits : 0 - 15 (16 bit)
access : read-write


TKEBFU

TK Group E Bounce Filter Upper limit Register
address_offset : 0x524 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKEBFU TKEBFU read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TEBU

TEBU : The Bounce filter Upper limit set, above upper limit recoup TxBDR
bits : 0 - 15 (16 bit)
access : read-write


TKEBFL

TK Group E Bounce Filter Lower limit Register
address_offset : 0x528 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKEBFL TKEBFL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TEBL

TEBL : The Bounce filter Lower limit set, below lower limit recoup TxBDR
bits : 0 - 15 (16 bit)
access : read-write


TKERMX

TK Group x Scan raw data Max. Register
address_offset : 0x52C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKERMX TKERMX read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TERMX

TERMX : TK Scan raw data Max. value
bits : 0 - 15 (16 bit)
access : read-write


TKERMN

TK Group E Scan raw data Min. Register
address_offset : 0x530 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKERMN TKERMN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TERMN

TERMN : TK Scan raw data Min. value
bits : 0 - 15 (16 bit)
access : read-write


TKEBINR

TK Group E Bounce filter Invalid number Register
address_offset : 0x534 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKEBINR TKEBINR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TEBINR

TEBINR : TK Bounce filter Invalid number for Scan raw data
bits : 0 - 7 (8 bit)
access : read-write


TKEBDR

TK Group E Bounce filter Invalid data recoup Register
address_offset : 0x538 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKEBDR TKEBDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKEBDR

TKEBDR : TK Bounce filter Invalid data recoup value set register
bits : 0 - 7 (8 bit)
access : read-write


TKEHMR

TK Group x Histogram mode value set Register
address_offset : 0x53C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKEHMR TKEHMR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TEHMR

TEHMR : TK Histogram mode value set register
bits : 0 - 15 (16 bit)
access : read-write


TKDOAR

TK Scan Raw Data Output Address Register
address_offset : 0x54 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKDOAR TKDOAR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKDOA

TKDOA : TK Scan Raw Data Output Address
bits : 0 - 6 (7 bit)
access : read-write


TKFSCR

Touch Key Group F Select Control Register
address_offset : 0x600 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKFSCR TKFSCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKFSW DRVF TKFEN

TKFSW : Touch Key Group F pin Selected Bits
bits : 0 - 1 (2 bit)
access : read-write

DRVF : Group F Drive PIN control bit, only for Self type mode
bits : 6 - 12 (7 bit)
access : read-write

TKFEN : Touch Key Group F Enable Bit
bits : 7 - 14 (8 bit)
access : read-write


TKFKCR

Touch Key Group F Loading Capacitor Calibration Control Register
address_offset : 0x604 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKFKCR TKFKCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKFSC TKFMC

TKFSC : Touch Key Self Load capacitor Calibration Select Bits
bits : 0 - 3 (4 bit)
access : read-write

TKFMC : Touch Key Mutual Load capacitor Calibration Select Bits
bits : 8 - 19 (12 bit)
access : read-write


TKFCSGCR

Touch Key of Group F Calculate Step and Gain Control Register
address_offset : 0x608 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKFCSGCR TKFCSGCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GFDCS GMFC

GFDCS : Group F Discharge Current Source select Bits
bits : 0 - 4 (5 bit)
access : read-write

GMFC : GM gain Control for Group F
bits : 8 - 18 (11 bit)
access : read-write


GFPH4DCCR

Group F Discharge Current Control Register for phase4
address_offset : 0x60C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GFPH4DCCR GFPH4DCCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GFDC

GFDC : Group F Discharge Current Source select bits for phase4
bits : 0 - 4 (5 bit)
access : read-write


TKFB

The Most Significant Byte of F Group Touch Key Buffer
address_offset : 0x610 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKFB TKFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKF

TKF : The Least Significant Byte of F Group Touch Key Buffer
bits : 0 - 15 (16 bit)
access : read-write


TKFWB

TK of Group F idle Scan Wakeup Base Register
address_offset : 0x614 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKFWB TKFWB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TFWB

TFWB : TK group F idle scan wakeup base set bits
bits : 0 - 15 (16 bit)
access : read-write


TKFWR

TK of Group F idle Scan Wakeup Range Register
address_offset : 0x618 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKFWR TKFWR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TFWR

TFWR : TK group F idle scan wakeup range multiplicand set bits
bits : 0 - 15 (16 bit)
access : read-write


TKFFCR

Touch Key of Group F Filter Control Register
address_offset : 0x61C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKFFCR TKFFCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKFDCE TKFHME TKFBFEN

TKFDCE : TK scan raw data Max./Min. catch Enable bit
bits : 1 - 2 (2 bit)
access : read-write

TKFHME : TK Histogram mode Enable bit
bits : 2 - 4 (3 bit)
access : read-write

TKFBFEN : TK bounce filter Enable bit
bits : 7 - 14 (8 bit)
access : read-write


TKFFB

TK Group F Filter Buffer
address_offset : 0x620 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKFFB TKFFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TFFB

TFFB : The filter Buffer
bits : 0 - 15 (16 bit)
access : read-write


TKFBFU

TK Group F Bounce Filter Upper limit Register
address_offset : 0x624 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKFBFU TKFBFU read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TFBU

TFBU : The Bounce filter Upper limit set, above upper limit recoup TxBDR
bits : 0 - 15 (16 bit)
access : read-write


TKFBFL

TK Group F Bounce Filter Lower limit Register
address_offset : 0x628 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKFBFL TKFBFL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TFBL

TFBL : The Bounce filter Lower limit set, below lower limit recoup TxBDR
bits : 0 - 15 (16 bit)
access : read-write


TKFRMX

TK Group x Scan raw data Max. Register
address_offset : 0x62C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKFRMX TKFRMX read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TFRMX

TFRMX : TK Scan raw data Max. value
bits : 0 - 15 (16 bit)
access : read-write


TKFRMN

TK Group F Scan raw data Min. Register
address_offset : 0x630 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKFRMN TKFRMN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TFRMN

TFRMN : TK Scan raw data Min. value
bits : 0 - 15 (16 bit)
access : read-write


TKFBINR

TK Group F Bounce filter Invalid number Register
address_offset : 0x634 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKFBINR TKFBINR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TFBINR

TFBINR : TK Bounce filter Invalid number for Scan raw data
bits : 0 - 7 (8 bit)
access : read-write


TKFBDR

TK Group F Bounce filter Invalid data recoup Register
address_offset : 0x638 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKFBDR TKFBDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKFBDR

TKFBDR : TK Bounce filter Invalid data recoup value set register
bits : 0 - 7 (8 bit)
access : read-write


TKFHMR

TK Group x Histogram mode value set Register
address_offset : 0x63C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKFHMR TKFHMR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TFHMR

TFHMR : TK Histogram mode value set register
bits : 0 - 15 (16 bit)
access : read-write


TKDCR

Touch Key Drive Control Register
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKDCR TKDCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKCE

TKCE : TPDWO7 to TPDWO0
bits : 0 - 7 (8 bit)
access : read-write


TKSSR

Touch Key Start and Status Register
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKSSR TKSSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TKSF TKOESF TKPESF TKCSF TKTOSF TKS

TKSF : Status flag for Touch Key Conversion
bits : 0 - 0 (1 bit)
access : read-write

TKOESF : Touch Key Counter Overflow Error status flag
bits : 1 - 2 (2 bit)
access : read-write

TKPESF : Touch Key Phase 2 Error status flag
bits : 2 - 4 (3 bit)
access : read-write

TKCSF : Touch Key Compare status flag
bits : 3 - 6 (4 bit)
access : read-write

TKTOSF : Touch Key idle with scan mode time out status flag
bits : 4 - 8 (5 bit)
access : read-write

TKS : TK Conversion start bit
bits : 7 - 14 (8 bit)
access : read-write


TK_KEY

TK Key for Test
address_offset : 0xF00 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TK_KEY TK_KEY read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TK_KEY

TK_KEY : Enable write access to TPNCTRL,TKTCR register by writing 0x65CA
bits : 0 - 15 (16 bit)
access : read-write


TKTCR1

TK Test Control Register 1
address_offset : 0xF04 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKTCR1 TKTCR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ROPTA ROPTB ROPTC ROPTD ROPTE ROPTF VREF_S VRSELF TKIST SFRGM OPT_IBD OPT_ICMP PNEN MUCALMODE

ROPTA : GroupB Self option resistance select
bits : 0 - 1 (2 bit)
access : read-write

ROPTB : GroupB Self option resistance select
bits : 2 - 5 (4 bit)
access : read-write

ROPTC : GroupC Self option resistance select
bits : 4 - 9 (6 bit)
access : read-write

ROPTD : GroupD Self option resistance select
bits : 6 - 13 (8 bit)
access : read-write

ROPTE : GroupE Self option resistance select
bits : 8 - 17 (10 bit)
access : read-write

ROPTF : GroupF Self option resistance select
bits : 10 - 21 (12 bit)
access : read-write

VREF_S : Comparator reference voltage selection bit
bits : 16 - 33 (18 bit)
access : read-write

VRSELF : Self operating reference selection bit
bits : 24 - 48 (25 bit)
access : read-write

TKIST : Touch Key Idle with scan mode, Warm-up stable time setting
bits : 25 - 50 (26 bit)
access : read-write

SFRGM : TK test control signal default care
bits : 26 - 52 (27 bit)
access : read-write

OPT_IBD : Bias control signal
bits : 27 - 54 (28 bit)
access : read-write

OPT_ICMP : Comparator's current control
bits : 29 - 58 (30 bit)
access : read-write

PNEN : Pesudo differential sensing enable bit of Mutual TP
bits : 30 - 60 (31 bit)
access : read-write

MUCALMODE : Calibration control
bits : 31 - 62 (32 bit)
access : read-write


TKTCR2

TK Test Control Register 2
address_offset : 0xF08 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TKTCR2 TKTCR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TPxWTEN PHCNTS TEST_CNT_EN TPDOS TP_DEBUG_IO_EN TST_SEL TP_TST_CNT_GOAL

TPxWTEN : TPx write enable
bits : 0 - 5 (6 bit)
access : read-write

PHCNTS : PHCNT set
bits : 7 - 14 (8 bit)
access : read-write

TEST_CNT_EN : AFEDO CNT EN
bits : 8 - 16 (9 bit)
access : read-write

TPDOS : AFEDO fix vaule for test mode
bits : 9 - 18 (10 bit)
access : read-write

TP_DEBUG_IO_EN : enable TP debug signal to I/O
bits : 10 - 20 (11 bit)
access : read-write

TST_SEL : select which tp test group delievr I/O
bits : 11 - 26 (16 bit)
access : read-write

TP_TST_CNT_GOAL : test mode fix DO width
bits : 16 - 47 (32 bit)
access : read-write



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