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USB_OTG_FS

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x40000 byte (0x0)
mem_usage : registers
protection :

Registers

USBHD_BASE_CTRL

USBHD_UDEV_CTRL__USBHD_UHOST_CTRL

R32_UEP0_DMA

R32_UEP1_DMA

R32_UEP2_DMA__R32_UH_RX_DMA

R32_UEP3_DMA__R32_UH_TX_DMA

R8_USB_INT_EN

R32_UEP4_DMA

R32_UEP5_DMA

R32_UEP6_DMA

R32_UEP7_DMA

R8_USB_DEV_AD

R8_UEP0_T_LEN

R8_UEP0_T_CTRL

R8_UEP0_R_CTRL

R8_UEP1_T_LEN

R8_UEP1_T_CTRL___USBHD_UH_SETUP

R8_UEP1_R_CTRL

R8_UEP2_T_LEN__USBHD_UH_EP_PID

R8_UEP2_T_CTRL

R8_UEP2_R_CTRL__USBHD_UH_RX_CTRL

R8_UEP3_T_LEN__USBHD_UH_TX_LEN

R8_UEP3_T_CTRL__USBHD_UH_TX_CTRL

R8_UEP3_R_CTRL_

R8_UEP4_T_LEN

R8_UEP4_T_CTRL

R8_UEP4_R_CTRL_

R8_UEP5_T_LEN

R8_UEP5_T_CTRL

R8_UEP5_R_CTRL_

R8_UEP6_T_LEN

R8_UEP6_T_CTRL

R8_UEP6_R_CTRL_

R8_UEP7_T_LEN

R8_UEP7_T_CTRL

R8_UEP7_R_CTRL_

R8_USB_MIS_ST

USB_OTG_CR

USB_OTG_SR

R8_USB_INT_FG

R8_USB_INT_ST

R16_USB_RX_LEN

R8_UEP4_1_MOD

R8_UEP2_3_MOD__R8_UH_EP_MOD

R8_UEP5_6_MOD

R8_UEP7_MOD


USBHD_BASE_CTRL

USB base control
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USBHD_BASE_CTRL USBHD_BASE_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USBHD_UC_DMA_EN USBHD_UC_CLR_ALL USBHD_UC_RESET_SIE USBHD_UC_INT_BUSY USBHD_UC_SYS_CTRL_MASK USBHD_UC_LOW_SPEED RB_UC_HOST_MODE

USBHD_UC_DMA_EN : DMA enable and DMA interrupt enable for USB
bits : 0 - 0 (1 bit)

USBHD_UC_CLR_ALL : force clear FIFO and count of USB
bits : 1 - 1 (1 bit)

USBHD_UC_RESET_SIE : force reset USB SIE, need software clear
bits : 2 - 2 (1 bit)

USBHD_UC_INT_BUSY : enable automatic responding busy for device mode or automatic pause for host mode during interrupt flag UIF_TRANSFER valid
bits : 3 - 3 (1 bit)

USBHD_UC_SYS_CTRL_MASK : USB device enable and internal pullup resistance enable
bits : 4 - 5 (2 bit)

USBHD_UC_LOW_SPEED : enable USB low speed: 0=12Mbps, 1=1.5Mbps
bits : 6 - 6 (1 bit)

RB_UC_HOST_MODE : enable USB host mode: 0=device mode, 1=host mode
bits : 7 - 7 (1 bit)


USBHD_UDEV_CTRL__USBHD_UHOST_CTRL

USB device/host physical prot control
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USBHD_UDEV_CTRL__USBHD_UHOST_CTRL USBHD_UDEV_CTRL__USBHD_UHOST_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USBHD_UH_PORT_EN__USBHD_UD_PORT_EN USBHD_UH_BUS_RESET__USBHD_UD_GP_BIT USBHD_UH_LOW_SPEED__USBHD_UD_LOW_SPEED USBHD_UH_DM_PIN__USBHD_UD_DM_PIN USBHD_UH_DP_PIN__USBHD_UD_DP_PIN USBHD_UH_PD_DIS__USBHD_UD_PD_DIS

USBHD_UH_PORT_EN__USBHD_UD_PORT_EN : enable USB port: 0=disable, 1=enable port, automatic disabled if USB device detached
bits : 0 - 0 (1 bit)

USBHD_UH_BUS_RESET__USBHD_UD_GP_BIT : force clear FIFO and count of USB
bits : 1 - 1 (1 bit)

USBHD_UH_LOW_SPEED__USBHD_UD_LOW_SPEED : enable USB port low speed: 0=full speed, 1=low speed
bits : 2 - 2 (1 bit)

USBHD_UH_DM_PIN__USBHD_UD_DM_PIN : ReadOnly: indicate current UDM pin level
bits : 4 - 4 (1 bit)
access : read-opnly

USBHD_UH_DP_PIN__USBHD_UD_DP_PIN : USB device enable and internal pullup resistance enable
bits : 5 - 5 (1 bit)
access : read-opnly

USBHD_UH_PD_DIS__USBHD_UD_PD_DIS : disable USB UDP/UDM pulldown resistance: 0=enable pulldown, 1=disable
bits : 7 - 7 (1 bit)


R32_UEP0_DMA

endpoint 0 DMA buffer address
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP0_DMA R32_UEP0_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

R32_UEP1_DMA

endpoint 1 DMA buffer address
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP1_DMA R32_UEP1_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

R32_UEP2_DMA__R32_UH_RX_DMA

endpoint 2 DMA buffer address host rx endpoint buffer high address
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP2_DMA__R32_UH_RX_DMA R32_UEP2_DMA__R32_UH_RX_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

R32_UEP3_DMA__R32_UH_TX_DMA

endpoint 3 DMA buffer address host tx endpoint buffer high address
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP3_DMA__R32_UH_TX_DMA R32_UEP3_DMA__R32_UH_TX_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

R8_USB_INT_EN

USB interrupt enable
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_USB_INT_EN R8_USB_INT_EN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USBHD_UIE_BUS_RST__USBHD_UIE_DETECT USBHD_UIE_TRANSFER USBHD_UIE_SUSPEND USBHD_UIE_HST_SOF USBHD_UIE_FIFO_OV USBHD_UIE_DEV_NAK USBHD_UIE_DEV_SOF

USBHD_UIE_BUS_RST__USBHD_UIE_DETECT : enable interrupt for USB bus reset event for USB device mode
bits : 0 - 0 (1 bit)

USBHD_UIE_TRANSFER : enable interrupt for USB transfer completion
bits : 1 - 1 (1 bit)

USBHD_UIE_SUSPEND : enable interrupt for USB suspend or resume event
bits : 2 - 2 (1 bit)

USBHD_UIE_HST_SOF : enable interrupt for host SOF timer action for USB host mode
bits : 3 - 3 (1 bit)

USBHD_UIE_FIFO_OV : enable interrupt for FIFO overflow
bits : 4 - 4 (1 bit)

USBHD_UIE_DEV_NAK : enable interrupt for NAK responded for USB device mode
bits : 6 - 6 (1 bit)

USBHD_UIE_DEV_SOF : enable interrupt for SOF received for USB device mode
bits : 7 - 7 (1 bit)


R32_UEP4_DMA

endpoint 4 DMA buffer address
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP4_DMA R32_UEP4_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

R32_UEP5_DMA

endpoint 5 DMA buffer address
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP5_DMA R32_UEP5_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

R32_UEP6_DMA

endpoint 6 DMA buffer address
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP6_DMA R32_UEP6_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

R32_UEP7_DMA

endpoint 7 DMA buffer address
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP7_DMA R32_UEP7_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

R8_USB_DEV_AD

USB device address
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_USB_DEV_AD R8_USB_DEV_AD read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MASK_USB_ADDR RB_UDA_GP_BIT

MASK_USB_ADDR : bit mask for USB device address
bits : 0 - 6 (7 bit)
access : read-write

RB_UDA_GP_BIT : general purpose bit
bits : 7 - 7 (1 bit)


R8_UEP0_T_LEN

endpoint 0 transmittal length
address_offset : 0x30 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP0_T_LEN R8_UEP0_T_LEN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

R8_UEP0_T_CTRL

endpoint 0 control
address_offset : 0x32 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP0_T_CTRL R8_UEP0_T_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MASK_UEP_T_RES USBHD_UEP_T_TOG USBHD_UEP_AUTO_TOG

MASK_UEP_T_RES : bit mask of handshake response type for USB endpoint X transmittal (IN)
bits : 0 - 1 (2 bit)

USBHD_UEP_T_TOG : prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1
bits : 2 - 2 (1 bit)

USBHD_UEP_AUTO_TOG : enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
bits : 3 - 3 (1 bit)


R8_UEP0_R_CTRL

endpoint 0 control
address_offset : 0x33 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP0_R_CTRL R8_UEP0_R_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MASK_UEP_R_RES USBHD_UEP_R_TOG USBHD_UEP_AUTO_TOG

MASK_UEP_R_RES : bit mask of handshake response type for USB endpoint X receiving (OUT)
bits : 0 - 1 (2 bit)

USBHD_UEP_R_TOG : expected data toggle flag of USB endpoint X receiving (OUT): 0=DATA0, 1=DATA1
bits : 2 - 2 (1 bit)

USBHD_UEP_AUTO_TOG : enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
bits : 3 - 3 (1 bit)


R8_UEP1_T_LEN

endpoint 1 transmittal length
address_offset : 0x34 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP1_T_LEN R8_UEP1_T_LEN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

R8_UEP1_T_CTRL___USBHD_UH_SETUP

endpoint 1 control
address_offset : 0x36 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP1_T_CTRL___USBHD_UH_SETUP R8_UEP1_T_CTRL___USBHD_UH_SETUP read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MASK_UEP_T_RES USBHD_UEP_T_TOG_ USBHD_UEP_AUTO_TOG USBHD_UH_SOF_EN USBHD_UH_PRE_PID_EN

MASK_UEP_T_RES : bit mask of handshake response type for USB endpoint X transmittal (IN)
bits : 0 - 1 (2 bit)

USBHD_UEP_T_TOG_ : prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1
bits : 2 - 2 (1 bit)

USBHD_UEP_AUTO_TOG : enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
bits : 3 - 3 (1 bit)

USBHD_UH_SOF_EN : USB host automatic SOF enable
bits : 6 - 6 (1 bit)

USBHD_UH_PRE_PID_EN : USB host PRE PID enable for low speed device via hub
bits : 7 - 7 (1 bit)


R8_UEP1_R_CTRL

endpoint 1 control
address_offset : 0x37 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP1_R_CTRL R8_UEP1_R_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MASK_UEP_R_RES USBHD_UEP_R_TOG USBHD_UEP_AUTO_TOG

MASK_UEP_R_RES : bit mask of handshake response type for USB endpoint X receiving (OUT)
bits : 0 - 1 (2 bit)

USBHD_UEP_R_TOG : expected data toggle flag of USB endpoint X receiving (OUT): 0=DATA0, 1=DATA1
bits : 2 - 2 (1 bit)

USBHD_UEP_AUTO_TOG : enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
bits : 3 - 3 (1 bit)


R8_UEP2_T_LEN__USBHD_UH_EP_PID

endpoint 2 transmittal length
address_offset : 0x38 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP2_T_LEN__USBHD_UH_EP_PID R8_UEP2_T_LEN__USBHD_UH_EP_PID read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USBHD_UH_ENDP_MASK USBHD_UH_TOKEN_MASK

USBHD_UH_ENDP_MASK : bit mask of endpoint number for USB host transfer
bits : 0 - 3 (4 bit)

USBHD_UH_TOKEN_MASK : bit mask of token PID for USB host transfer
bits : 4 - 7 (4 bit)


R8_UEP2_T_CTRL

endpoint 2 control
address_offset : 0x3A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP2_T_CTRL R8_UEP2_T_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MASK_UEP_T_RES USBHD_UEP_T_TOG_ USBHD_UEP_AUTO_TOG

MASK_UEP_T_RES : bit mask of handshake response type for USB endpoint X transmittal (IN)
bits : 0 - 1 (2 bit)

USBHD_UEP_T_TOG_ : prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1
bits : 2 - 2 (1 bit)

USBHD_UEP_AUTO_TOG : enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
bits : 3 - 3 (1 bit)


R8_UEP2_R_CTRL__USBHD_UH_RX_CTRL

endpoint 2 control
address_offset : 0x3B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP2_R_CTRL__USBHD_UH_RX_CTRL R8_UEP2_R_CTRL__USBHD_UH_RX_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MASK_UEP_R_RES___USBHD_UH_R_RES USBHD_UEP_R_TOG___USBHD_UH_R_TOG USBHD_UEP_AUTO_TOG___USBHD_UH_R_AUTO_TOG

MASK_UEP_R_RES___USBHD_UH_R_RES : bit mask of handshake response type for USB endpoint X receiving (OUT)
bits : 0 - 1 (2 bit)

USBHD_UEP_R_TOG___USBHD_UH_R_TOG : expected data toggle flag of USB endpoint X receiving (OUT): 0=DATA0, 1=DATA1
bits : 2 - 2 (1 bit)

USBHD_UEP_AUTO_TOG___USBHD_UH_R_AUTO_TOG : enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
bits : 3 - 3 (1 bit)


R8_UEP3_T_LEN__USBHD_UH_TX_LEN

endpoint 3 transmittal length
address_offset : 0x3C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP3_T_LEN__USBHD_UH_TX_LEN R8_UEP3_T_LEN__USBHD_UH_TX_LEN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

R8_UEP3_T_CTRL__USBHD_UH_TX_CTRL

endpoint 3 control
address_offset : 0x3E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP3_T_CTRL__USBHD_UH_TX_CTRL R8_UEP3_T_CTRL__USBHD_UH_TX_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MASK_UEP_T_RES___USBHD_UH_T_RES USBHD_UEP_T_TOG___USBHD_UH_T_TOG USBHD_UEP_AUTO_TOG__USBHD_UH_T_AUTO_TOG

MASK_UEP_T_RES___USBHD_UH_T_RES : bit mask of handshake response type for USB endpoint X transmittal (IN)
bits : 0 - 1 (2 bit)

USBHD_UEP_T_TOG___USBHD_UH_T_TOG : prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1
bits : 2 - 2 (1 bit)

USBHD_UEP_AUTO_TOG__USBHD_UH_T_AUTO_TOG : enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
bits : 3 - 3 (1 bit)


R8_UEP3_R_CTRL_

endpoint 3 control
address_offset : 0x3F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP3_R_CTRL_ R8_UEP3_R_CTRL_ read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MASK_UEP_R_RES USBHD_UEP_R_TOG USBHD_UEP_AUTO_TOG

MASK_UEP_R_RES : bit mask of handshake response type for USB endpoint X receiving (OUT)
bits : 0 - 1 (2 bit)

USBHD_UEP_R_TOG : expected data toggle flag of USB endpoint X receiving (OUT): 0=DATA0, 1=DATA1
bits : 2 - 2 (1 bit)

USBHD_UEP_AUTO_TOG : enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
bits : 3 - 3 (1 bit)


R8_UEP4_T_LEN

endpoint 4 transmittal length
address_offset : 0x40 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP4_T_LEN R8_UEP4_T_LEN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

R8_UEP4_T_CTRL

endpoint 4 control
address_offset : 0x42 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP4_T_CTRL R8_UEP4_T_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MASK_UEP_T_RES USBHD_UEP_T_TOG___USBHD_UH_T_TOG USBHD_UEP_AUTO_TOG__USBHD_UH_T_AUTO_TOG

MASK_UEP_T_RES : bit mask of handshake response type for USB endpoint X transmittal (IN)
bits : 0 - 1 (2 bit)

USBHD_UEP_T_TOG___USBHD_UH_T_TOG : prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1
bits : 2 - 2 (1 bit)

USBHD_UEP_AUTO_TOG__USBHD_UH_T_AUTO_TOG : enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
bits : 3 - 3 (1 bit)


R8_UEP4_R_CTRL_

endpoint 4 control
address_offset : 0x43 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP4_R_CTRL_ R8_UEP4_R_CTRL_ read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MASK_UEP_R_RES USBHD_UEP_R_TOG USBHD_UEP_AUTO_TOG

MASK_UEP_R_RES : bit mask of handshake response type for USB endpoint X receiving (OUT)
bits : 0 - 1 (2 bit)

USBHD_UEP_R_TOG : expected data toggle flag of USB endpoint X receiving (OUT): 0=DATA0, 1=DATA1
bits : 2 - 2 (1 bit)

USBHD_UEP_AUTO_TOG : enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
bits : 3 - 3 (1 bit)


R8_UEP5_T_LEN

endpoint 5 transmittal length
address_offset : 0x44 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP5_T_LEN R8_UEP5_T_LEN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

R8_UEP5_T_CTRL

endpoint 5 control
address_offset : 0x46 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP5_T_CTRL R8_UEP5_T_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MASK_UEP_T_RES USBHD_UEP_T_TOG___USBHD_UH_T_TOG USBHD_UEP_AUTO_TOG__USBHD_UH_T_AUTO_TOG

MASK_UEP_T_RES : bit mask of handshake response type for USB endpoint X transmittal (IN)
bits : 0 - 1 (2 bit)

USBHD_UEP_T_TOG___USBHD_UH_T_TOG : prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1
bits : 2 - 2 (1 bit)

USBHD_UEP_AUTO_TOG__USBHD_UH_T_AUTO_TOG : enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
bits : 3 - 3 (1 bit)


R8_UEP5_R_CTRL_

endpoint 5 control
address_offset : 0x47 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP5_R_CTRL_ R8_UEP5_R_CTRL_ read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MASK_UEP_R_RES USBHD_UEP_R_TOG USBHD_UEP_AUTO_TOG

MASK_UEP_R_RES : bit mask of handshake response type for USB endpoint X receiving (OUT)
bits : 0 - 1 (2 bit)

USBHD_UEP_R_TOG : expected data toggle flag of USB endpoint X receiving (OUT): 0=DATA0, 1=DATA1
bits : 2 - 2 (1 bit)

USBHD_UEP_AUTO_TOG : enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
bits : 3 - 3 (1 bit)


R8_UEP6_T_LEN

endpoint 6 transmittal length
address_offset : 0x48 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP6_T_LEN R8_UEP6_T_LEN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

R8_UEP6_T_CTRL

endpoint 6 control
address_offset : 0x4A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP6_T_CTRL R8_UEP6_T_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MASK_UEP_T_RES USBHD_UEP_T_TOG___USBHD_UH_T_TOG USBHD_UEP_AUTO_TOG__USBHD_UH_T_AUTO_TOG

MASK_UEP_T_RES : bit mask of handshake response type for USB endpoint X transmittal (IN)
bits : 0 - 1 (2 bit)

USBHD_UEP_T_TOG___USBHD_UH_T_TOG : prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1
bits : 2 - 2 (1 bit)

USBHD_UEP_AUTO_TOG__USBHD_UH_T_AUTO_TOG : enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
bits : 3 - 3 (1 bit)


R8_UEP6_R_CTRL_

endpoint 6 control
address_offset : 0x4B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP6_R_CTRL_ R8_UEP6_R_CTRL_ read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MASK_UEP_R_RES USBHD_UEP_R_TOG USBHD_UEP_AUTO_TOG

MASK_UEP_R_RES : bit mask of handshake response type for USB endpoint X receiving (OUT)
bits : 0 - 1 (2 bit)

USBHD_UEP_R_TOG : expected data toggle flag of USB endpoint X receiving (OUT): 0=DATA0, 1=DATA1
bits : 2 - 2 (1 bit)

USBHD_UEP_AUTO_TOG : enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
bits : 3 - 3 (1 bit)


R8_UEP7_T_LEN

endpoint 7 transmittal length
address_offset : 0x4C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP7_T_LEN R8_UEP7_T_LEN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

R8_UEP7_T_CTRL

endpoint 7 control
address_offset : 0x4E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP7_T_CTRL R8_UEP7_T_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MASK_UEP_T_RES USBHD_UEP_T_TOG___USBHD_UH_T_TOG USBHD_UEP_AUTO_TOG__USBHD_UH_T_AUTO_TOG

MASK_UEP_T_RES : bit mask of handshake response type for USB endpoint X transmittal (IN)
bits : 0 - 1 (2 bit)

USBHD_UEP_T_TOG___USBHD_UH_T_TOG : prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1
bits : 2 - 2 (1 bit)

USBHD_UEP_AUTO_TOG__USBHD_UH_T_AUTO_TOG : enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
bits : 3 - 3 (1 bit)


R8_UEP7_R_CTRL_

endpoint 7 control
address_offset : 0x4F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP7_R_CTRL_ R8_UEP7_R_CTRL_ read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MASK_UEP_R_RES USBHD_UEP_R_TOG USBHD_UEP_AUTO_TOG

MASK_UEP_R_RES : bit mask of handshake response type for USB endpoint X receiving (OUT)
bits : 0 - 1 (2 bit)

USBHD_UEP_R_TOG : expected data toggle flag of USB endpoint X receiving (OUT): 0=DATA0, 1=DATA1
bits : 2 - 2 (1 bit)

USBHD_UEP_AUTO_TOG : enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
bits : 3 - 3 (1 bit)


R8_USB_MIS_ST

USB miscellaneous status
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

R8_USB_MIS_ST R8_USB_MIS_ST read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UMS_DEV_ATTACH RB_UMS_DM_LEVEL RB_UMS_SUSPEND RB_UMS_BUS_RESET RB_UMS_R_FIFO_RDY RB_UMS_SIE_FREE RB_UMS_SOF_ACT RB_UMS_SOF_PRES

RB_UMS_DEV_ATTACH : RO, indicate device attached status on USB host
bits : 0 - 0 (1 bit)

RB_UMS_DM_LEVEL : RO, indicate UDM level saved at device attached to USB host
bits : 1 - 1 (1 bit)

RB_UMS_SUSPEND : RO, indicate USB suspend status
bits : 2 - 2 (1 bit)

RB_UMS_BUS_RESET : RO, indicate USB bus reset status
bits : 3 - 3 (1 bit)

RB_UMS_R_FIFO_RDY : RO, indicate USB receiving FIFO ready status (not empty)
bits : 4 - 4 (1 bit)

RB_UMS_SIE_FREE : RO, indicate USB SIE free status
bits : 5 - 5 (1 bit)

RB_UMS_SOF_ACT : RO, indicate host SOF timer action status for USB host
bits : 6 - 6 (1 bit)

RB_UMS_SOF_PRES : RO, indicate host SOF timer presage status
bits : 7 - 7 (1 bit)


USB_OTG_CR

usb otg control
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB_OTG_CR USB_OTG_CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_OTG_CR_DISCHARGEVBUS USB_OTG_CR_CHARGEVBUS USB_OTG_CR_IDPU USB_OTG_CR_OTG_EN USB_OTG_CR_VBUS USB_OTG_CR_SESS

USB_OTG_CR_DISCHARGEVBUS : usb otg control
bits : 0 - 0 (1 bit)

USB_OTG_CR_CHARGEVBUS : usb otg control
bits : 1 - 1 (1 bit)

USB_OTG_CR_IDPU : usb otg control
bits : 2 - 2 (1 bit)

USB_OTG_CR_OTG_EN : usb otg control
bits : 3 - 3 (1 bit)

USB_OTG_CR_VBUS : usb otg control
bits : 4 - 4 (1 bit)

USB_OTG_CR_SESS : usb otg control
bits : 5 - 5 (1 bit)


USB_OTG_SR

usb otg status
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB_OTG_SR USB_OTG_SR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_OTG_SR_VBUS_VLD USB_OTG_SR_SESS_VLD USB_OTG_SR_SESS_END USB_OTG_SR_ID_DIG

USB_OTG_SR_VBUS_VLD : usb otg status
bits : 0 - 0 (1 bit)

USB_OTG_SR_SESS_VLD : usb otg status
bits : 1 - 1 (1 bit)

USB_OTG_SR_SESS_END : usb otg status
bits : 2 - 2 (1 bit)

USB_OTG_SR_ID_DIG : usb otg status
bits : 3 - 3 (1 bit)


R8_USB_INT_FG

USB interrupt flag
address_offset : 0x6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_USB_INT_FG R8_USB_INT_FG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UIF_BUS_RST__RB_UIF_DETECT RB_UIF_TRANSFER RB_UIF_SUSPEND RB_UIF_HST_SOF RB_UIF_FIFO_OV RB_U_SIE_FREE RB_U_TOG_OK RB_U_IS_NAK

RB_UIF_BUS_RST__RB_UIF_DETECT : bus reset event interrupt flag for USB device mode, direct bit address clear or write 1 to clear device detected event interrupt flag for USB host mode, direct bit address clear or write 1 to clear
bits : 0 - 0 (1 bit)

RB_UIF_TRANSFER : USB transfer completion interrupt flag, direct bit address clear or write 1 to clear
bits : 1 - 1 (1 bit)

RB_UIF_SUSPEND : USB suspend or resume event interrupt flag, direct bit address clear or write 1 to clear
bits : 2 - 2 (1 bit)

RB_UIF_HST_SOF : host SOF timer interrupt flag for USB host, direct bit address clear or write 1 to clear
bits : 3 - 3 (1 bit)

RB_UIF_FIFO_OV : FIFO overflow interrupt flag for USB, direct bit address clear or write 1 to clear
bits : 4 - 4 (1 bit)

RB_U_SIE_FREE : RO, indicate USB SIE free status
bits : 5 - 5 (1 bit)
access : read-only

RB_U_TOG_OK : RO, indicate current USB transfer toggle is OK
bits : 6 - 6 (1 bit)
access : read-only

RB_U_IS_NAK : RO, indicate current USB transfer is NAK received
bits : 7 - 7 (1 bit)
access : read-only


R8_USB_INT_ST

USB interrupt status
address_offset : 0x7 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

R8_USB_INT_ST R8_USB_INT_ST read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MASK_UIS_H_RES__MASK_UIS_ENDP MASK_UIS_TOKEN RB_UIS_TOG_OK RB_UIS_IS_NAK

MASK_UIS_H_RES__MASK_UIS_ENDP : RO, bit mask of current transfer handshake response for USB host mode: 0000=no response, time out from device, others=handshake response PID received RO, bit mask of current transfer endpoint number for USB device mode
bits : 0 - 3 (4 bit)

MASK_UIS_TOKEN : RO, bit mask of current token PID code received for USB device mode
bits : 4 - 5 (2 bit)

RB_UIS_TOG_OK : RO, indicate current USB transfer toggle is OK
bits : 6 - 6 (1 bit)

RB_UIS_IS_NAK : RO, indicate current USB transfer is NAK received for USB device mode
bits : 7 - 7 (1 bit)


R16_USB_RX_LEN

USB receiving length
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

R16_USB_RX_LEN R16_USB_RX_LEN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

R8_UEP4_1_MOD

endpoint 4/1 mode
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP4_1_MOD R8_UEP4_1_MOD read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP4_TX_EN RB_UEP4_RX_EN RB_UEP1_BUF_MOD RB_UEP1_TX_EN RB_UEP1_RX_EN

RB_UEP4_TX_EN : enable USB endpoint 4 transmittal (IN)
bits : 2 - 2 (1 bit)

RB_UEP4_RX_EN : enable USB endpoint 4 receiving (OUT)
bits : 3 - 3 (1 bit)

RB_UEP1_BUF_MOD : buffer mode of USB endpoint 1
bits : 4 - 4 (1 bit)

RB_UEP1_TX_EN : enable USB endpoint 1 transmittal (IN)
bits : 6 - 6 (1 bit)

RB_UEP1_RX_EN : enable USB endpoint 1 receiving (OUT)
bits : 7 - 7 (1 bit)


R8_UEP2_3_MOD__R8_UH_EP_MOD

endpoint 2/3 mode host endpoint mode
address_offset : 0xD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP2_3_MOD__R8_UH_EP_MOD R8_UEP2_3_MOD__R8_UH_EP_MOD read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP2_BUF_MOD__RB_UH_EP_RBUF_MOD RB_UEP2_TX_EN RB_UEP2_RX_EN__RB_UH_EP_RX_EN RB_UEP3_BUF_MOD__RB_UH_EP_TBUF_MOD RB_UEP3_TX_EN__RB_UH_EP_TX_EN RB_UEP3_RX_EN

RB_UEP2_BUF_MOD__RB_UH_EP_RBUF_MOD : buffer mode of USB endpoint 2 buffer mode of USB host IN endpoint
bits : 0 - 0 (1 bit)

RB_UEP2_TX_EN : enable USB endpoint 2 transmittal (IN)
bits : 2 - 2 (1 bit)

RB_UEP2_RX_EN__RB_UH_EP_RX_EN : enable USB endpoint 2 receiving (OUT) enable USB host IN endpoint receiving
bits : 3 - 3 (1 bit)

RB_UEP3_BUF_MOD__RB_UH_EP_TBUF_MOD : buffer mode of USB endpoint 3 buffer mode of USB host OUT endpoint
bits : 4 - 4 (1 bit)

RB_UEP3_TX_EN__RB_UH_EP_TX_EN : enable USB endpoint 3 transmittal (IN) enable USB host OUT endpoint transmittal
bits : 6 - 6 (1 bit)

RB_UEP3_RX_EN : enable USB endpoint 3 receiving (OUT)
bits : 7 - 7 (1 bit)


R8_UEP5_6_MOD

endpoint 5/6 mode
address_offset : 0xE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP5_6_MOD R8_UEP5_6_MOD read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP5_BUF_MOD RB_UEP5_TX_EN RB_UEP5_RX_EN RB_UEP6_BUF_MOD RB_UEP6_TX_EN RB_UEP3_RX_EN

RB_UEP5_BUF_MOD : buffer mode of USB endpoint 5
bits : 0 - 0 (1 bit)

RB_UEP5_TX_EN : enable USB endpoint 5 transmittal (IN)
bits : 2 - 2 (1 bit)

RB_UEP5_RX_EN : enable USB endpoint 5 receiving (OUT)
bits : 3 - 3 (1 bit)

RB_UEP6_BUF_MOD : buffer mode of USB endpoint 6
bits : 4 - 4 (1 bit)

RB_UEP6_TX_EN : enable USB endpoint 6 transmittal (IN)
bits : 6 - 6 (1 bit)

RB_UEP3_RX_EN : enable USB endpoint 6 receiving (OUT)
bits : 7 - 7 (1 bit)


R8_UEP7_MOD

endpoint 7 mode
address_offset : 0xF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP7_MOD R8_UEP7_MOD read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP7_BUF_MOD RB_UEP7_TX_EN RB_UEP7_RX_EN

RB_UEP7_BUF_MOD : buffer mode of USB endpoint 7
bits : 0 - 0 (1 bit)

RB_UEP7_TX_EN : enable USB endpoint 7 transmittal (IN)
bits : 2 - 2 (1 bit)

RB_UEP7_RX_EN : enable USB endpoint 7 receiving (OUT)
bits : 3 - 3 (1 bit)



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