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USBHS

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :

Registers

R8_USB_CTRL

R8_UHOST_CTRL

R8_UEP4_1_MOD

R8_UEP2_3_MOD_R8_UH_EP_MOD

R8_UEP5_6_MOD

R8_UEP7_MOD

R32_UEP0_RT_DMA

R32_UEP1_RX_DMA

R32_UEP2_RX_DMA_R32_UH_RX_DMA

R8_USB_INT_EN

R32_UEP3_RX_DMA

R32_UEP4_RX_DMA

R32_UEP5_RX_DMA

R32_UEP6_RX_DMA

R8_USB_DEV_AD

R32_UEP7_RX_DMA

R32_UEP1_TX_DMA

R32_UEP2_TX_DMA

R32_UEP3_TX_DMA_R32_UH_TX_DMA

R16_USB_FRAME_NO

R32_UEP4_TX_DMA

R32_UEP5_TX_DMA

R32_UEP6_TX_DMA

R32_UEP7_TX_DMA

R16_UEP0_MAX_LEN

R16_UEP1_MAX_LEN

R16_UEP2_MAX_LEN_R16_UH_MAX_LEN

R16_UEP3_MAX_LEN

R8_USB_SUSPEND

R16_UEP4_MAX_LEN

R16_UEP5_MAX_LEN

R16_UEP6_MAX_LEN

R16_UEP7_MAX_LEN

R16_UEP0_T_LEN

R8_UEP0_TX_CTRL

R8_UEP0_RX_CTRL

R16_UEP1_T_LEN

R8_UEP1_TX_CTRL

R8_UEP1_RX_CTRL

R16_UEP2_T_LEN_R16_UH_EP_PID

R8_UEP2_TX_CTRL

R8_UEP2_RX_CTRL_R8_UH_RX_CTRL

R16_UEP3_T_LEN_R16_UH_TX_LEN

R8_UEP3_TX_CTRL_R8_UH_TX_CTRL

R8_UEP3_RX_CTRL

R8_USB_SPD_TYPE

R16_UEP4_T_LEN_R16_UH_SPLIT_DATA

R8_UEP4_TX_CTRL

R8_UEP4_RX_CTRL

R16_UEP5_T_LEN

R8_UEP5_TX_CTRL

R8_UEP5_RX_CTRL

R16_UEP6_T_LEN

R8_UEP6_TX_CTRL

R8_UEP6_RX_CTRL

R16_UEP7_T_LEN

R8_UEP7_TX_CTRL

R8_UEP7_RX_CTRL

R8_USB_MIS_ST

R8_USB_INT_FG

R8_USB_INT_ST

R6_USB_RX_LEN


R8_USB_CTRL

USB base control
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_USB_CTRL R8_USB_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_USB_DMA_EN RB_USB_CLR_ALL RB_USB_RESET_SIE RB_USB_INT_BUSY RB_DEV_PU_EN RB_USB_SPTP_MASK RB_USB_MODE

RB_USB_DMA_EN : DMA enable and DMA interrupt enable for USB
bits : 0 - 0 (1 bit)

RB_USB_CLR_ALL : force clear FIFO and count of USB
bits : 1 - 1 (1 bit)

RB_USB_RESET_SIE : force reset USB SIE, need software clear
bits : 2 - 2 (1 bit)

RB_USB_INT_BUSY : enable automatic responding busy for device mode or automatic pause for host mode during interrupt flag UIF_TRANSFER valid
bits : 3 - 3 (1 bit)

RB_DEV_PU_EN : USB device enable and internal pullup resistance enable
bits : 4 - 4 (1 bit)

RB_USB_SPTP_MASK : enable USB low speed
bits : 5 - 6 (2 bit)

RB_USB_MODE : enable USB host mode: 0=device mode, 1=host mode
bits : 7 - 7 (1 bit)


R8_UHOST_CTRL

USB host control register
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UHOST_CTRL R8_UHOST_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UH_BUS_RESET RB_UH_BUS_SUSPEND RB_UH_BUS_RESUME RB_UH_AUTOSOF_EN

RB_UH_BUS_RESET : USB host send bus reset signal
bits : 0 - 0 (1 bit)

RB_UH_BUS_SUSPEND : USB host send bus suspend signal
bits : 1 - 1 (1 bit)

RB_UH_BUS_RESUME : USB host suspend state and wake up device
bits : 2 - 2 (1 bit)

RB_UH_AUTOSOF_EN : Automatically generate sof packet enable control
bits : 7 - 7 (1 bit)


R8_UEP4_1_MOD

endpoint 1(9)/4(8/12) mode
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP4_1_MOD R8_UEP4_1_MOD read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP4_BUF_MOD RB_UEP4_TX_EN RB_UEP4_RX_EN RB_UEP1_BUF_MOD RB_UEP1_TX_EN RB_UEP1_RX_EN

RB_UEP4_BUF_MOD : buffer mode of USB endpoint 4(8/12)
bits : 0 - 0 (1 bit)

RB_UEP4_TX_EN : enable USB endpoint 4(8/12) transmittal (IN)
bits : 2 - 2 (1 bit)

RB_UEP4_RX_EN : enable USB endpoint 4(8/12) receiving (OUT)
bits : 3 - 3 (1 bit)

RB_UEP1_BUF_MOD : buffer mode of USB endpoint 1(9)
bits : 4 - 4 (1 bit)

RB_UEP1_TX_EN : enable USB endpoint 1(9) transmittal (IN)
bits : 6 - 6 (1 bit)

RB_UEP1_RX_EN : enable USB endpoint 1(9) receiving (OUT)
bits : 7 - 7 (1 bit)


R8_UEP2_3_MOD_R8_UH_EP_MOD

endpoint 2(10)/3(11) mode / USB host endpoint mode control register
address_offset : 0x11 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP2_3_MOD_R8_UH_EP_MOD R8_UEP2_3_MOD_R8_UH_EP_MOD read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP2_BUF_MOD_RB_UH_RX_EN RB_UEP2_TX_EN RB_UEP2_RX_EN RB_UEP3_BUF_MOD RB_UEP3_TX_EN_RB_UH_TX_EN RB_UEP3_RX_EN

RB_UEP2_BUF_MOD_RB_UH_RX_EN : buffer mode of USB endpoint 2(10) / USB host receive endpoint (IN) enable
bits : 0 - 0 (1 bit)

RB_UEP2_TX_EN : enable USB endpoint 2(10) transmittal (IN)
bits : 2 - 2 (1 bit)

RB_UEP2_RX_EN : enable USB endpoint 2(10) receiving (OUT)
bits : 3 - 3 (1 bit)

RB_UEP3_BUF_MOD : buffer mode of USB endpoint 3(11)
bits : 4 - 4 (1 bit)

RB_UEP3_TX_EN_RB_UH_TX_EN : enable USB endpoint 3(11) transmittal (IN) / USB host send endpoint (SETUP/OUT) enable
bits : 6 - 6 (1 bit)

RB_UEP3_RX_EN : enable USB endpoint 3(11) receiving (OUT)
bits : 7 - 7 (1 bit)


R8_UEP5_6_MOD

endpoint 5(13)/6(14) mode
address_offset : 0x12 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP5_6_MOD R8_UEP5_6_MOD read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP5_BUF_MOD RB_UEP5_TX_EN RB_UEP5_RX_EN RB_UEP6_BUF_MOD RB_UEP6_TX_EN RB_UEP6_RX_EN

RB_UEP5_BUF_MOD : buffer mode of USB endpoint 5(13)
bits : 0 - 0 (1 bit)

RB_UEP5_TX_EN : enable USB endpoint 5(13) transmittal (IN)
bits : 2 - 2 (1 bit)

RB_UEP5_RX_EN : enable USB endpoint 5(13) receiving (OUT)
bits : 3 - 3 (1 bit)

RB_UEP6_BUF_MOD : buffer mode of USB endpoint 6(14)
bits : 4 - 4 (1 bit)

RB_UEP6_TX_EN : enable USB endpoint 6(14) transmittal (IN)
bits : 6 - 6 (1 bit)

RB_UEP6_RX_EN : enable USB endpoint 6(14) receiving (OUT)
bits : 7 - 7 (1 bit)


R8_UEP7_MOD

endpoint 7(15) mode
address_offset : 0x13 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP7_MOD R8_UEP7_MOD read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP7_BUF_MOD RB_UEP7_TX_EN RB_UEP7_RX_EN

RB_UEP7_BUF_MOD : buffer mode of USB endpoint 7(15)
bits : 0 - 0 (1 bit)

RB_UEP7_TX_EN : enable USB endpoint 7(15) transmittal (IN)
bits : 2 - 2 (1 bit)

RB_UEP7_RX_EN : enable USB endpoint 7(15) receiving (OUT)
bits : 3 - 3 (1 bit)


R32_UEP0_RT_DMA

endpoint 0 DMA buffer address
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP0_RT_DMA R32_UEP0_RT_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP0_RT_DMA

UEP0_RT_DMA : endpoint 0 DMA buffer address
bits : 0 - 16 (17 bit)


R32_UEP1_RX_DMA

endpoint 1 DMA buffer address
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP1_RX_DMA R32_UEP1_RX_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP1_RX_DMA

UEP1_RX_DMA : endpoint 1 DMA buffer address
bits : 0 - 16 (17 bit)


R32_UEP2_RX_DMA_R32_UH_RX_DMA

endpoint 2 DMA buffer address / host rx endpoint buffer start address
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP2_RX_DMA_R32_UH_RX_DMA R32_UEP2_RX_DMA_R32_UH_RX_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP2_RX_DMA_UH_RX_DMA

UEP2_RX_DMA_UH_RX_DMA : endpoint 2 DMA buffer address / host rx endpoint buffer start address
bits : 0 - 16 (17 bit)


R8_USB_INT_EN

USB interrupt enable
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_USB_INT_EN R8_USB_INT_EN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_USB_IE_BUSRST_RB_USB_IE_DETECT RB_USB_IE_TRANS RB_USB_IE_SUSPEND RB_USB_IE_SOF RB_USB_IE_FIFOOV RB_USB_IE_SETUPACT RB_USB_IE_ISOACT RB_USB_IE_DEV_NAK

RB_USB_IE_BUSRST_RB_USB_IE_DETECT : enable interrupt for USB bus reset event for USB device mode / enable interrupt for USB device detected event for USB host mode
bits : 0 - 0 (1 bit)

RB_USB_IE_TRANS : enable interrupt for USB transfer completion
bits : 1 - 1 (1 bit)

RB_USB_IE_SUSPEND : enable interrupt for USB suspend or resume event
bits : 2 - 2 (1 bit)

RB_USB_IE_SOF : enable interrupt for host SOF timer action for USB host mode
bits : 3 - 3 (1 bit)

RB_USB_IE_FIFOOV : enable interrupt for FIFO overflow
bits : 4 - 4 (1 bit)

RB_USB_IE_SETUPACT : Setup packet end interrupt
bits : 5 - 5 (1 bit)

RB_USB_IE_ISOACT : Synchronous transmission received control token packet interrupt
bits : 6 - 6 (1 bit)

RB_USB_IE_DEV_NAK : enable interrupt for NAK responded for USB device mode
bits : 7 - 7 (1 bit)


R32_UEP3_RX_DMA

endpoint 3 DMA buffer address host tx endpoint buffer high address
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP3_RX_DMA R32_UEP3_RX_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP3_RX_DMA

UEP3_RX_DMA : endpoint 3 DMA buffer address
bits : 0 - 16 (17 bit)


R32_UEP4_RX_DMA

endpoint 4 DMA buffer address
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP4_RX_DMA R32_UEP4_RX_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP4_RX_DMA

UEP4_RX_DMA : endpoint 4 DMA buffer address
bits : 0 - 16 (17 bit)


R32_UEP5_RX_DMA

endpoint 5 DMA buffer address
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP5_RX_DMA R32_UEP5_RX_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP5_RX_DMA

UEP5_RX_DMA : endpoint 5 DMA buffer address
bits : 0 - 16 (17 bit)


R32_UEP6_RX_DMA

endpoint 6 DMA buffer address
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP6_RX_DMA R32_UEP6_RX_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP6_RX_DMA

UEP6_RX_DMA : endpoint 6 DMA buffer address
bits : 0 - 16 (17 bit)


R8_USB_DEV_AD

USB device address
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_USB_DEV_AD R8_USB_DEV_AD read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_ADDR_MASK

USB_ADDR_MASK : bit mask for USB device address
bits : 0 - 6 (7 bit)


R32_UEP7_RX_DMA

endpoint 7 DMA buffer address
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP7_RX_DMA R32_UEP7_RX_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP7_RX_DMA

UEP7_RX_DMA : endpoint 7 DMA buffer address
bits : 0 - 16 (17 bit)


R32_UEP1_TX_DMA

endpoint 1 DMA TX buffer address
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP1_TX_DMA R32_UEP1_TX_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP1_TX_DMA

UEP1_TX_DMA : endpoint 1 DMA TX buffer address
bits : 0 - 16 (17 bit)


R32_UEP2_TX_DMA

endpoint 2 DMA TX buffer address
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP2_TX_DMA R32_UEP2_TX_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP2_TX_DMA

UEP2_TX_DMA : endpoint 2 DMA TX buffer address
bits : 0 - 16 (17 bit)


R32_UEP3_TX_DMA_R32_UH_TX_DMA

endpoint 3 DMA TX buffer address / host tx endpoint buffer start address
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP3_TX_DMA_R32_UH_TX_DMA R32_UEP3_TX_DMA_R32_UH_TX_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP3_TX_DMA_UH_TX_DMA

UEP3_TX_DMA_UH_TX_DMA : endpoint 3 DMA TX buffer address / host tx endpoint buffer start address
bits : 0 - 16 (17 bit)


R16_USB_FRAME_NO

USB frame number register
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

R16_USB_FRAME_NO R16_USB_FRAME_NO read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FRAME_NO

USB_FRAME_NO : USB frame number
bits : 0 - 15 (16 bit)


R32_UEP4_TX_DMA

endpoint 4 DMA TX buffer address
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP4_TX_DMA R32_UEP4_TX_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP4_TX_DMA

UEP4_TX_DMA : endpoint 4 DMA TX buffer address
bits : 0 - 16 (17 bit)


R32_UEP5_TX_DMA

endpoint 5 DMA TX buffer address
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP5_TX_DMA R32_UEP5_TX_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP5_TX_DMA

UEP5_TX_DMA : endpoint 5 DMA TX buffer address
bits : 0 - 16 (17 bit)


R32_UEP6_TX_DMA

endpoint 6 DMA TX buffer address
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP6_TX_DMA R32_UEP6_TX_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP6_TX_DMA

UEP6_TX_DMA : endpoint 6 DMA TX buffer address
bits : 0 - 16 (17 bit)


R32_UEP7_TX_DMA

endpoint 7 DMA TX buffer address
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R32_UEP7_TX_DMA R32_UEP7_TX_DMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP7_TX_DMA

UEP7_TX_DMA : endpoint 7 DMA TX buffer address
bits : 0 - 16 (17 bit)


R16_UEP0_MAX_LEN

endpoint 0 receive max length
address_offset : 0x50 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R16_UEP0_MAX_LEN R16_UEP0_MAX_LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP0_MAX_LEN

UEP0_MAX_LEN : endpoint 0 receive max length
bits : 0 - 15 (16 bit)


R16_UEP1_MAX_LEN

endpoint 1 receive max length
address_offset : 0x54 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R16_UEP1_MAX_LEN R16_UEP1_MAX_LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP1_MAX_LEN

UEP1_MAX_LEN : endpoint 1 receive max length
bits : 0 - 15 (16 bit)


R16_UEP2_MAX_LEN_R16_UH_MAX_LEN

endpoint 2 receive max length / USB host receive max packet length register
address_offset : 0x58 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R16_UEP2_MAX_LEN_R16_UH_MAX_LEN R16_UEP2_MAX_LEN_R16_UH_MAX_LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP2_MAX_LEN_UH_MAX_LEN

UEP2_MAX_LEN_UH_MAX_LEN : endpoint 2 receive max length / USB host receive max packet length register
bits : 0 - 15 (16 bit)


R16_UEP3_MAX_LEN

endpoint 3 receive max length
address_offset : 0x5C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R16_UEP3_MAX_LEN R16_UEP3_MAX_LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP3_MAX_LEN

UEP3_MAX_LEN : endpoint 3 receive max length
bits : 0 - 15 (16 bit)


R8_USB_SUSPEND

USB suspend register
address_offset : 0x6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_USB_SUSPEND R8_USB_SUSPEND read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_DEV_WAKEUP

RB_DEV_WAKEUP : Remote wake-up control bit
bits : 1 - 1 (1 bit)


R16_UEP4_MAX_LEN

endpoint 4 receive max length
address_offset : 0x60 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R16_UEP4_MAX_LEN R16_UEP4_MAX_LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP4_MAX_LEN

UEP4_MAX_LEN : endpoint 4 receive max length
bits : 0 - 15 (16 bit)


R16_UEP5_MAX_LEN

endpoint 5 receive max length
address_offset : 0x64 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R16_UEP5_MAX_LEN R16_UEP5_MAX_LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP5_MAX_LEN

UEP5_MAX_LEN : endpoint 5 receive max length
bits : 0 - 15 (16 bit)


R16_UEP6_MAX_LEN

endpoint 6 receive max length
address_offset : 0x68 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R16_UEP6_MAX_LEN R16_UEP6_MAX_LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP6_MAX_LEN

UEP6_MAX_LEN : endpoint 6 receive max length
bits : 0 - 15 (16 bit)


R16_UEP7_MAX_LEN

endpoint 7 receive max length
address_offset : 0x6C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R16_UEP7_MAX_LEN R16_UEP7_MAX_LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP7_MAX_LEN

UEP7_MAX_LEN : endpoint 7 receive max length
bits : 0 - 15 (16 bit)


R16_UEP0_T_LEN

endpoint 0 transmittal length
address_offset : 0x70 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R16_UEP0_T_LEN R16_UEP0_T_LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP0_T_LEN

UEP0_T_LEN : endpoint 0 transmittal length
bits : 0 - 15 (16 bit)


R8_UEP0_TX_CTRL

endpoint 0 tx control
address_offset : 0x72 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP0_TX_CTRL R8_UEP0_TX_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP_TRES_MASK RB_UEP_TRES_NO RB_UEP_T_TOG_MASK RB_UEP_T_AUTOTOG

RB_UEP_TRES_MASK : bit mask of handshake response type for USB endpoint X transmittal (IN)
bits : 0 - 1 (2 bit)

RB_UEP_TRES_NO : expected no response
bits : 2 - 2 (1 bit)

RB_UEP_T_TOG_MASK : prepared data toggle flag of USB endpoint X transmittal
bits : 3 - 4 (2 bit)

RB_UEP_T_AUTOTOG : enable automatic toggle after successful transfer completion on endpoint 0
bits : 5 - 5 (1 bit)


R8_UEP0_RX_CTRL

endpoint 0 rx control
address_offset : 0x73 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP0_RX_CTRL R8_UEP0_RX_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP_RRES_MASK RB_UEP_RRES_NO RB_UEP_R_TOG_MASK RB_UEP_R_AUTOTOG

RB_UEP_RRES_MASK : bit mask of handshake response type for USB endpoint X receiving (OUT)
bits : 0 - 1 (2 bit)

RB_UEP_RRES_NO : prepared no response
bits : 2 - 2 (1 bit)

RB_UEP_R_TOG_MASK : expected data toggle flag of USB endpoint X receiving
bits : 3 - 4 (2 bit)

RB_UEP_R_AUTOTOG : enable automatic toggle after successful transfer completion on endpoint
bits : 5 - 5 (1 bit)


R16_UEP1_T_LEN

endpoint 1 transmittal length
address_offset : 0x74 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R16_UEP1_T_LEN R16_UEP1_T_LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP1_T_LEN

UEP1_T_LEN : endpoint 1 transmittal length
bits : 0 - 15 (16 bit)


R8_UEP1_TX_CTRL

endpoint 1 tx control
address_offset : 0x76 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP1_TX_CTRL R8_UEP1_TX_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP_TRES_MASK RB_UEP_TRES_NO RB_UEP_T_TOG_MASK RB_UEP_T_AUTOTOG

RB_UEP_TRES_MASK : bit mask of handshake response type for USB endpoint X transmittal (IN)
bits : 0 - 1 (2 bit)

RB_UEP_TRES_NO : expected no response
bits : 2 - 2 (1 bit)

RB_UEP_T_TOG_MASK : prepared data toggle flag of USB endpoint X transmittal
bits : 3 - 4 (2 bit)

RB_UEP_T_AUTOTOG : enable automatic toggle after successful transfer completion on endpoint 0
bits : 5 - 5 (1 bit)


R8_UEP1_RX_CTRL

endpoint 1 rx control
address_offset : 0x77 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP1_RX_CTRL R8_UEP1_RX_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP_RRES_MASK RB_UEP_RRES_NO RB_UEP_R_TOG_MASK RB_UEP_R_AUTOTOG

RB_UEP_RRES_MASK : bit mask of handshake response type for USB endpoint X receiving (OUT)
bits : 0 - 1 (2 bit)

RB_UEP_RRES_NO : prepared no response
bits : 2 - 2 (1 bit)

RB_UEP_R_TOG_MASK : expected data toggle flag of USB endpoint X receiving
bits : 3 - 4 (2 bit)

RB_UEP_R_AUTOTOG : enable automatic toggle after successful transfer completion on endpoint
bits : 5 - 5 (1 bit)


R16_UEP2_T_LEN_R16_UH_EP_PID

endpoint 2 transmittal length / Set usb host token register
address_offset : 0x78 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R16_UEP2_T_LEN_R16_UH_EP_PID R16_UEP2_T_LEN_R16_UH_EP_PID read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RB_UH_EPNUM_MASK_UEP2_T_LEN_0_3 RB_UH_TOKEN_MASK_UEP2_T_LEN_4_7 UEP2_T_LEN_8_15

RB_UH_EPNUM_MASK_UEP2_T_LEN_0_3 : The endpoint number of the target of this operation
bits : 0 - 3 (4 bit)

RB_UH_TOKEN_MASK_UEP2_T_LEN_4_7 : The token PID packet identification of this USB transfer transaction
bits : 4 - 7 (4 bit)

UEP2_T_LEN_8_15 : endpoint 2 transmittal length
bits : 8 - 15 (8 bit)


R8_UEP2_TX_CTRL

endpoint 2 tx control
address_offset : 0x7A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP2_TX_CTRL R8_UEP2_TX_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP_TRES_MASK RB_UEP_TRES_NO RB_UEP_T_TOG_MASK RB_UEP_T_AUTOTOG

RB_UEP_TRES_MASK : bit mask of handshake response type for USB endpoint X transmittal (IN)
bits : 0 - 1 (2 bit)

RB_UEP_TRES_NO : expected no response
bits : 2 - 2 (1 bit)

RB_UEP_T_TOG_MASK : prepared data toggle flag of USB endpoint X transmittal
bits : 3 - 4 (2 bit)

RB_UEP_T_AUTOTOG : enable automatic toggle after successful transfer completion on endpoint 0
bits : 5 - 5 (1 bit)


R8_UEP2_RX_CTRL_R8_UH_RX_CTRL

endpoint 2 rx control / USb host receive endpoint control register
address_offset : 0x7B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP2_RX_CTRL_R8_UH_RX_CTRL R8_UEP2_RX_CTRL_R8_UH_RX_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP_RRES_MASK_RB_UH_RRES_MASK RB_UEP_RRES_NO_RB_UH_RRES_NO RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG RB_UH_RDATA_NO

RB_UEP_RRES_MASK_RB_UH_RRES_MASK : bit mask of handshake response type for USB endpoint X receiving (OUT) / Host reeiver response control bit
bits : 0 - 1 (2 bit)

RB_UEP_RRES_NO_RB_UH_RRES_NO : prepared no response / Response control bit of host receiver
bits : 2 - 2 (1 bit)

RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK : expected data toggle flag of USB endpoint X receiving / expected data toggle flag of host receiving (IN)
bits : 3 - 4 (2 bit)

RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG : enable automatic toggle after successful transfer completion on endpoint / enable automatic toggle after successful receiver completion
bits : 5 - 5 (1 bit)

RB_UH_RDATA_NO : expect no data packet, for high speed hub in host mode
bits : 6 - 6 (1 bit)


R16_UEP3_T_LEN_R16_UH_TX_LEN

endpoint 3 transmittal length / host transmittal endpoint transmittal length
address_offset : 0x7C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R16_UEP3_T_LEN_R16_UH_TX_LEN R16_UEP3_T_LEN_R16_UH_TX_LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP3_T_LEN_UH_TX_LEN

UEP3_T_LEN_UH_TX_LEN : endpoint 3 transmittal length / host transmittal endpoint transmittal length
bits : 0 - 15 (16 bit)


R8_UEP3_TX_CTRL_R8_UH_TX_CTRL

endpoint 3 tx control / host transmittal endpoint control
address_offset : 0x7E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP3_TX_CTRL_R8_UH_TX_CTRL R8_UEP3_TX_CTRL_R8_UH_TX_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP_TRES_MASK_RB_UH_TRES_MASK RB_UEP_TRES_NO_RB_UH_TRES_NO RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG RB_UH_TDATA_NO

RB_UEP_TRES_MASK_RB_UH_TRES_MASK : bit mask of handshake response type for USB endpoint X transmittal (IN) / expected handshake response type for host transmittal (SETUP/OUT)
bits : 0 - 1 (2 bit)

RB_UEP_TRES_NO_RB_UH_TRES_NO : expected no response / expected no response, 1=enable, 0=disable, for non-zero endpoint isochronous transactions
bits : 2 - 2 (1 bit)

RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK : prepared data toggle flag of USB endpoint X transmittal / prepared data toggle flag of host transmittal (SETUP/OUT)
bits : 3 - 4 (2 bit)

RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG : enable automatic toggle after successful transfer completion on endpoint 0 / enable automatic toggle after successful transfer completion
bits : 5 - 5 (1 bit)

RB_UH_TDATA_NO : prepared no data packet, for high speed hub in host mode
bits : 6 - 6 (1 bit)


R8_UEP3_RX_CTRL

endpoint 3 rx control
address_offset : 0x7F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP3_RX_CTRL R8_UEP3_RX_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP_RRES_MASK RB_UEP_RRES_NO RB_UEP_R_TOG_MASK RB_UEP_R_AUTOTOG

RB_UEP_RRES_MASK : bit mask of handshake response type for USB endpoint X receiving (OUT)
bits : 0 - 1 (2 bit)

RB_UEP_RRES_NO : prepared no response
bits : 2 - 2 (1 bit)

RB_UEP_R_TOG_MASK : expected data toggle flag of USB endpoint X receiving
bits : 3 - 4 (2 bit)

RB_UEP_R_AUTOTOG : enable automatic toggle after successful transfer completion on endpoint
bits : 5 - 5 (1 bit)


R8_USB_SPD_TYPE

USB actual speed register
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

R8_USB_SPD_TYPE R8_USB_SPD_TYPE read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_USBSPEED_MASK

RB_USBSPEED_MASK : USB actual speed
bits : 0 - 1 (2 bit)


R16_UEP4_T_LEN_R16_UH_SPLIT_DATA

endpoint 4 transmittal length / USB host Tx SPLIT packet data
address_offset : 0x80 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R16_UEP4_T_LEN_R16_UH_SPLIT_DATA R16_UEP4_T_LEN_R16_UH_SPLIT_DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP4_T_LEN_UH_SPLIT_DATA

UEP4_T_LEN_UH_SPLIT_DATA : endpoint 4 transmittal length / USB host Tx SPLIT packet data
bits : 0 - 15 (16 bit)


R8_UEP4_TX_CTRL

endpoint 4 tx control
address_offset : 0x82 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP4_TX_CTRL R8_UEP4_TX_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP_TRES_MASK RB_UEP_TRES_NO RB_UEP_T_TOG_MASK RB_UEP_T_AUTOTOG

RB_UEP_TRES_MASK : bit mask of handshake response type for USB endpoint X transmittal (IN)
bits : 0 - 1 (2 bit)

RB_UEP_TRES_NO : expected no response
bits : 2 - 2 (1 bit)

RB_UEP_T_TOG_MASK : prepared data toggle flag of USB endpoint X transmittal
bits : 3 - 4 (2 bit)

RB_UEP_T_AUTOTOG : enable automatic toggle after successful transfer completion on endpoint 0
bits : 5 - 5 (1 bit)


R8_UEP4_RX_CTRL

endpoint 4 rx control
address_offset : 0x83 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP4_RX_CTRL R8_UEP4_RX_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP_RRES_MASK RB_UEP_RRES_NO RB_UEP_R_TOG_MASK RB_UEP_R_AUTOTOG

RB_UEP_RRES_MASK : bit mask of handshake response type for USB endpoint X receiving (OUT)
bits : 0 - 1 (2 bit)

RB_UEP_RRES_NO : prepared no response
bits : 2 - 2 (1 bit)

RB_UEP_R_TOG_MASK : expected data toggle flag of USB endpoint X receiving
bits : 3 - 4 (2 bit)

RB_UEP_R_AUTOTOG : enable automatic toggle after successful transfer completion on endpoint
bits : 5 - 5 (1 bit)


R16_UEP5_T_LEN

endpoint 5 transmittal length
address_offset : 0x84 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R16_UEP5_T_LEN R16_UEP5_T_LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP5_T_LEN

UEP5_T_LEN : endpoint 5 transmittal length
bits : 0 - 15 (16 bit)


R8_UEP5_TX_CTRL

endpoint 5 tx control
address_offset : 0x86 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP5_TX_CTRL R8_UEP5_TX_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP_TRES_MASK RB_UEP_TRES_NO RB_UEP_T_TOG_MASK RB_UEP_T_AUTOTOG

RB_UEP_TRES_MASK : bit mask of handshake response type for USB endpoint X transmittal (IN)
bits : 0 - 1 (2 bit)

RB_UEP_TRES_NO : expected no response
bits : 2 - 2 (1 bit)

RB_UEP_T_TOG_MASK : prepared data toggle flag of USB endpoint X transmittal
bits : 3 - 4 (2 bit)

RB_UEP_T_AUTOTOG : enable automatic toggle after successful transfer completion on endpoint 0
bits : 5 - 5 (1 bit)


R8_UEP5_RX_CTRL

endpoint 5 rx control
address_offset : 0x87 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP5_RX_CTRL R8_UEP5_RX_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP_RRES_MASK RB_UEP_RRES_NO RB_UEP_R_TOG_MASK RB_UEP_R_AUTOTOG

RB_UEP_RRES_MASK : bit mask of handshake response type for USB endpoint X receiving (OUT)
bits : 0 - 1 (2 bit)

RB_UEP_RRES_NO : prepared no response
bits : 2 - 2 (1 bit)

RB_UEP_R_TOG_MASK : expected data toggle flag of USB endpoint X receiving
bits : 3 - 4 (2 bit)

RB_UEP_R_AUTOTOG : enable automatic toggle after successful transfer completion on endpoint
bits : 5 - 5 (1 bit)


R16_UEP6_T_LEN

endpoint 6 transmittal length
address_offset : 0x88 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R16_UEP6_T_LEN R16_UEP6_T_LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP6_T_LEN

UEP6_T_LEN : endpoint 6 transmittal length
bits : 0 - 15 (16 bit)


R8_UEP6_TX_CTRL

endpoint 6 tx control
address_offset : 0x8A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP6_TX_CTRL R8_UEP6_TX_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP_TRES_MASK RB_UEP_TRES_NO RB_UEP_T_TOG_MASK RB_UEP_T_AUTOTOG

RB_UEP_TRES_MASK : bit mask of handshake response type for USB endpoint X transmittal (IN)
bits : 0 - 1 (2 bit)

RB_UEP_TRES_NO : expected no response
bits : 2 - 2 (1 bit)

RB_UEP_T_TOG_MASK : prepared data toggle flag of USB endpoint X transmittal
bits : 3 - 4 (2 bit)

RB_UEP_T_AUTOTOG : enable automatic toggle after successful transfer completion on endpoint 0
bits : 5 - 5 (1 bit)


R8_UEP6_RX_CTRL

endpoint 6 rx control
address_offset : 0x8B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP6_RX_CTRL R8_UEP6_RX_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP_RRES_MASK RB_UEP_RRES_NO RB_UEP_R_TOG_MASK RB_UEP_R_AUTOTOG

RB_UEP_RRES_MASK : bit mask of handshake response type for USB endpoint X receiving (OUT)
bits : 0 - 1 (2 bit)

RB_UEP_RRES_NO : prepared no response
bits : 2 - 2 (1 bit)

RB_UEP_R_TOG_MASK : expected data toggle flag of USB endpoint X receiving
bits : 3 - 4 (2 bit)

RB_UEP_R_AUTOTOG : enable automatic toggle after successful transfer completion on endpoint
bits : 5 - 5 (1 bit)


R16_UEP7_T_LEN

endpoint 7 transmittal length
address_offset : 0x8C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R16_UEP7_T_LEN R16_UEP7_T_LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UEP7_T_LEN

UEP7_T_LEN : endpoint 7 transmittal length
bits : 0 - 15 (16 bit)


R8_UEP7_TX_CTRL

endpoint 7 tx control
address_offset : 0x8E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP7_TX_CTRL R8_UEP7_TX_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP_TRES_MASK RB_UEP_TRES_NO RB_UEP_T_TOG_MASK RB_UEP_T_AUTOTOG

RB_UEP_TRES_MASK : bit mask of handshake response type for USB endpoint X transmittal (IN)
bits : 0 - 1 (2 bit)

RB_UEP_TRES_NO : expected no response
bits : 2 - 2 (1 bit)

RB_UEP_T_TOG_MASK : prepared data toggle flag of USB endpoint X transmittal
bits : 3 - 4 (2 bit)

RB_UEP_T_AUTOTOG : enable automatic toggle after successful transfer completion on endpoint 0
bits : 5 - 5 (1 bit)


R8_UEP7_RX_CTRL

endpoint 7 rx control
address_offset : 0x8F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_UEP7_RX_CTRL R8_UEP7_RX_CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_UEP_RRES_MASK RB_UEP_RRES_NO RB_UEP_R_TOG_MASK RB_UEP_R_AUTOTOG

RB_UEP_RRES_MASK : bit mask of handshake response type for USB endpoint X receiving (OUT)
bits : 0 - 1 (2 bit)

RB_UEP_RRES_NO : prepared no response
bits : 2 - 2 (1 bit)

RB_UEP_R_TOG_MASK : expected data toggle flag of USB endpoint X receiving
bits : 3 - 4 (2 bit)

RB_UEP_R_AUTOTOG : enable automatic toggle after successful transfer completion on endpoint
bits : 5 - 5 (1 bit)


R8_USB_MIS_ST

USB miscellaneous status
address_offset : 0x9 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

R8_USB_MIS_ST R8_USB_MIS_ST read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_USB_SPLIT_EN RB_USB_ATTACH RB_USBBUS_SUSPEND RB_USBBUS_RESET RB_USB_FIFO_RDY RB_USB_SIE_FREE RB_USB_SOF_ACT RB_USB_SOF_PRES

RB_USB_SPLIT_EN : RO,indicate host allow SPLIT packet
bits : 0 - 0 (1 bit)

RB_USB_ATTACH : RO, indicate device attached status on USB host
bits : 1 - 1 (1 bit)

RB_USBBUS_SUSPEND : RO, indicate USB suspend status
bits : 2 - 2 (1 bit)

RB_USBBUS_RESET : RO, indicate USB bus reset status
bits : 3 - 3 (1 bit)

RB_USB_FIFO_RDY : RO, indicate USB receiving FIFO ready status (not empty)
bits : 4 - 4 (1 bit)

RB_USB_SIE_FREE : RO, indicate USB SIE free status
bits : 5 - 5 (1 bit)

RB_USB_SOF_ACT : RO, indicate host SOF timer action status for USB host
bits : 6 - 6 (1 bit)

RB_USB_SOF_PRES : RO, indicate host SOF timer presage status
bits : 7 - 7 (1 bit)


R8_USB_INT_FG

USB interrupt flag
address_offset : 0xA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

R8_USB_INT_FG R8_USB_INT_FG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_USB_IF_BUSRST_RB_USB_IF_DETECT RB_USB_IF_TRANSFER RB_USB_IF_SUSPEND RB_USB_IF_HST_SOF RB_USB_IF_FIFOOV RB_USB_IF_SETUOACT RB_USB_IF_ISOACT

RB_USB_IF_BUSRST_RB_USB_IF_DETECT : bus reset event interrupt flag for USB device mode, direct bit address clear or write 1 to clear device detected event interrupt flag for USB host mode, direct bit address clear or write 1 to clear
bits : 0 - 0 (1 bit)

RB_USB_IF_TRANSFER : USB transfer completion interrupt flag, direct bit address clear or write 1 to clear
bits : 1 - 1 (1 bit)

RB_USB_IF_SUSPEND : USB suspend or resume event interrupt flag, direct bit address clear or write 1 to clear
bits : 2 - 2 (1 bit)

RB_USB_IF_HST_SOF : host SOF timer interrupt flag for USB host, direct bit address clear or write 1 to clear
bits : 3 - 3 (1 bit)

RB_USB_IF_FIFOOV : FIFO overflow interrupt flag for USB, direct bit address clear or write 1 to clear
bits : 4 - 4 (1 bit)

RB_USB_IF_SETUOACT : RO, Setup transaction end interrupt flag
bits : 5 - 5 (1 bit)

RB_USB_IF_ISOACT : RO, Synchronous transmission received control token packet interrupt flag
bits : 6 - 6 (1 bit)


R8_USB_INT_ST

USB interrupt status
address_offset : 0xB Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

R8_USB_INT_ST R8_USB_INT_ST read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RB_HOST_RES_MASK_RB_DEV_ENDP_MASK RB_DEV_TOKEN_MASK RB_USB_ST_TOGOK RB_USB_ST_NAK

RB_HOST_RES_MASK_RB_DEV_ENDP_MASK : RO, bit mask of current transfer handshake response for USB host mode: 0000=no response, time out from device, others=handshake response PID received RO, bit mask of current transfer endpoint number for USB device mode
bits : 0 - 3 (4 bit)

RB_DEV_TOKEN_MASK : RO, bit mask of current token PID code received for USB device mode
bits : 4 - 5 (2 bit)

RB_USB_ST_TOGOK : RO, indicate current USB transfer toggle is OK
bits : 6 - 6 (1 bit)

RB_USB_ST_NAK : RO, indicate current USB transfer is NAK received for USB device mode
bits : 7 - 7 (1 bit)


R6_USB_RX_LEN

USB receiving length
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

R6_USB_RX_LEN R6_USB_RX_LEN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RX_LEN

USB_RX_LEN : length of received bytes
bits : 0 - 15 (16 bit)



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