R32_EMMC_ARGUMENT

R32_EMMC_RESPONSE2

R32_EMMC_RESPONSE3

R32_EMMC_WRITE_CONT

R8_EMMC_CONTROL

R8_EMMC_TIMEOUT

R32_EMMC_STATUS

R16_EMMC_INT_FG

R16_EMMC_INT_EN

R32_EMMC_DMA_BEG1

R32_EMMC_BLOCK_CFG

R32_EMMC_TRAN_MODE

R16_EMMC_CLK_DIV

R32_EMMC_DMA_BEG2

R16_EMMC_CMD_SET

R32_EMMC_RESPONSE0

R32_EMMC_RESPONSE1

EMMC_ARGUMENT : 32 bit command parameter register
bits : 0 - 31 (32 bit)

R32_EMMC_RESPONSE2 : response parameter register
bits : 0 - 31 (32 bit)

R32_EMMC_RESPONSE3 : response parameter register
bits : 0 - 31 (32 bit)

R32_EMMC_WRITE_CONT : response parameter register
bits : 0 - 31 (32 bit)

RB_EMMC_LW_MASK : effctive data width for sending or receiving data
bits : 0 - 1 (2 bit)

RB_EMMC_ALL_CLR : reset all the inner logic, default is valid
bits : 2 - 2 (1 bit)

RB_EMMC_DMAEN : enable the dma
bits : 3 - 3 (1 bit)

RB_EMMC_RST_LGC : reset the data tran/recv logic
bits : 4 - 4 (1 bit)

RB_EMMC_NEGSMP : controller use nagedge sample cmd
bits : 5 - 5 (1 bit)

RB_EMMC_TOCNT_MASK : response data timeout configuration
bits : 0 - 3 (4 bit)

MASK_BLOCK_NUM : the number of blocks successfully transmitted in the current multi-block transmission
bits : 0 - 15 (16 bit)

RB_EMMC_CMDSTA : indicate cmd line is high level now
bits : 16 - 16 (1 bit)

RB_EMMC_DAT0STA : indicate dat[0] line is high level now
bits : 17 - 17 (1 bit)

RB_EMMC_IF_RE_TMOUT : indicate when expect the response, timeout
bits : 0 - 0 (1 bit)

RB_EMMC_IF_RECRC_WR : indicate CRC error of the response
bits : 1 - 1 (1 bit)

RB_EMMC_IF_REIDX_ER : indicate INDEX error of the response
bits : 2 - 2 (1 bit)

RB_EMMC_IF_CMDDONE : when cmd hasn't response, indicate cmd has been sent, when cmd has a response, indicate cmd has bee sent and has received the response
bits : 3 - 3 (1 bit)

RB_EMMC_IF_DATTMO : data line busy timeout
bits : 4 - 4 (1 bit)

RB_EMMC_IF_TRANERR : last block have encountered a CRC error
bits : 5 - 5 (1 bit)

RB_EMMC_IF_TRANDONE : all the blocks have been tran/recv successfully
bits : 6 - 6 (1 bit)

RB_EMMC_IF_BKGAP : every block gap interrupt when multiple read/write, allow drive change the DMA address at this moment
bits : 7 - 7 (1 bit)

RB_EMMC_IF_FIFO_OV : fifo overflow, when write sd, indicate empty overflow, when read sd, indicate full overflow
bits : 8 - 8 (1 bit)

RB_EMMC_IF_SDIOINT : interrupt from SDIO card inside
bits : 9 - 9 (1 bit)

RB_EMMC_IE_RE_TMOUT : command response timeout interrupt enable
bits : 0 - 0 (1 bit)

RB_EMMC_IE_RECRC_WR : response CRC check error interrupt enable
bits : 1 - 1 (1 bit)

RB_EMMC_IE_REIDX_ER : response index check error interrupt enable
bits : 2 - 2 (1 bit)

RB_EMMC_IE_CMDDONE : command completion interrupt enable
bits : 3 - 3 (1 bit)

RB_EMMC_IE_DATTMO : data timeout interrupt enable
bits : 4 - 4 (1 bit)

RB_EMMC_IE_TRANERR : blocks transfer CRC error interrupt enable
bits : 5 - 5 (1 bit)

RB_EMMC_IE_TRANDONE : all blocks transfer complete interrupt enable
bits : 6 - 6 (1 bit)

RB_EMMC_IE_BKGAP : single block transmission completion interrupt enable
bits : 7 - 7 (1 bit)

RB_EMMC_IE_FIFO_OV : FIFO overflow interrupt enable
bits : 8 - 8 (1 bit)

RB_EMMC_IE_SDIOINT : SDIO card interrupt enable
bits : 9 - 9 (1 bit)

RB_EMMC_DMAAD1_MASK : start address of read-write data buffer,the lower 4 bits are fixed to 0
bits : 0 - 16 (17 bit)

RB_EMMC_BKNUM_MASK : the number of blocks to be transferred
bits : 0 - 15 (16 bit)

RB_EMMC_BKSIZE_MASK : single block transfer size
bits : 16 - 27 (12 bit)

RB_EMMC_DMA_DIR : set DMA direction is controller to emmc card
bits : 0 - 0 (1 bit)

RB_EMMC_GAP_STOP : clock stop mode after block completion
bits : 1 - 1 (1 bit)

RB_EMMC_MODE_BOOT : enable emmc boot mode
bits : 2 - 2 (1 bit)

RB_EMMC_AUTOGAPSTOP : enable auto set bTM_GAP_STOP when tran start
bits : 4 - 4 (1 bit)

RB_EMMC_FIFO_RDY : FIFO ready select signal when writing EMMC
bits : 6 - 7 (2 bit)

RB_EMMC_DMATN_CNT : in double buffer mode,set the block count value of buffer switch
bits : 8 - 14 (7 bit)

RB_EMMC_DULEDMA_EN : enable double buffer dma
bits : 16 - 16 (1 bit)

RB_EMMC_DIV_MASK : clk div
bits : 0 - 4 (5 bit)

RB_EMMC_CLKOE : chip output sdclk oe
bits : 8 - 8 (1 bit)

RB_EMMC_CLKMode : EMMC clock frequency mode selection bit
bits : 9 - 9 (1 bit)

RB_EMMC_PHASEINV : invert chip output sdclk phase
bits : 10 - 10 (1 bit)

RB_EMMC_DMAAD2_MASK : start address of read-write data buffer,the lower 4 bits are fixed to 0
bits : 0 - 16 (17 bit)

RB_EMMC_CMDIDX_MASK : the index number of the currently sent command
bits : 0 - 5 (6 bit)

RB_EMMC_RPTY_MASK : current respone type
bits : 8 - 9 (2 bit)

RB_EMMC_CKCRC : check the response CRC
bits : 10 - 10 (1 bit)

RB_EMMC_CKIDX : check the response command index
bits : 11 - 11 (1 bit)

R32_EMMC_RESPONSE0 : response parameter register
bits : 0 - 31 (32 bit)

R32_EMMC_RESPONSE1 : response parameter register
bits : 0 - 31 (32 bit)