R8_UART1_MCR

R8_UART1_IER

R8_UART1_FCR

R8_UART1_LCR

R8_UART1_IIR

R8_UART1_LSR

R8_UART1_RBR

R8_UART1_THR

R8_UART1_RFC

R8_UART1_TFC

R16_UART1_DL

R8_UART1_DIV

RB_MCR_OUT2/RB_MCR_INT_OE : RW, UART control OUT2/UART interrupt output enable
bits : 3 - 3 (1 bit)

RB_IER_RECV_RDY : RW, UART interrupt enable for receiver data ready
bits : 0 - 0 (1 bit)

RB_IER_THR_EMPTY : RW, UART interrupt enable for THR empty
bits : 1 - 1 (1 bit)

RB_IER_LINE_STAT : RW, UART interrupt enable for receiver line status
bits : 2 - 2 (1 bit)

RB_IER_TXD_EN : RW, UART TXD pin enable
bits : 6 - 6 (1 bit)

RB_IER_RESET : WZ, UART software reset control, high action, auto clear
bits : 7 - 7 (1 bit)

RB_FCR_FIFO_EN : RW, UART FIFO enable
bits : 0 - 0 (1 bit)

RB_FCR_RX_FIFO_CLR : WZ, clear UART receiver FIFO, high action, auto clear
bits : 1 - 1 (1 bit)

RB_FCR_TX_FIFO_CLR : WZ, clear UART transmitter FIFO, high action, auto clear
bits : 2 - 2 (1 bit)

RB_FCR_FIFO_TRIG : RW, UART receiver FIFO trigger level: 00-1byte, 01-2bytes, 10-4bytes, 11-7bytes
bits : 6 - 7 (2 bit)

RB_LCR_WORD_SZ : RW, UART word bit length: 00-5bit, 01-6bit, 10-7bit, 11-8bit
bits : 0 - 1 (2 bit)

RB_LCR_STOP_BIT : RW, UART stop bit length: 0-1bit, 1-2bit
bits : 2 - 2 (1 bit)

RB_LCR_PAR_EN : RW, UART parity enable
bits : 3 - 3 (1 bit)

RB_LCR_PAR_MOD : RW, UART parity mode: 00-odd, 01-even, 10-mark, 11-space
bits : 4 - 5 (2 bit)

RB_LCR_BREAK_EN : RW, UART break control enable
bits : 6 - 6 (1 bit)

RB_LCR_GP_BIT/RB_LCR_DLAB : RW, UART general purpose bit RW, UART reserved bit
bits : 7 - 7 (1 bit)

RB_IIR_NO_INT : RO, UART no interrupt flag: 0=interrupt action, 1=no interrupt
bits : 0 - 0 (1 bit)

RB_IIR_INT_MASK : RO, UART interrupt flag bit mask
bits : 0 - 3 (4 bit)

RB_IIR_FIFO_ID : RO, UART FIFO enabled flag
bits : 7 - 7 (1 bit)

RB_LSR_DATA_RDY : RO, UART receiver fifo data ready status
bits : 0 - 0 (1 bit)

RB_LSR_OVER_ERR : RZ, UART receiver overrun error
bits : 1 - 1 (1 bit)

RB_LSR_PAR_ERR : RZ, UART receiver parity error
bits : 2 - 2 (1 bit)

RB_LSR_FRAME_ERR : RZ, UART receiver frame error
bits : 3 - 3 (1 bit)

RB_LSR_BREAK_ERR : RZ, UART receiver break error
bits : 4 - 4 (1 bit)

RB_LSR_TX_FIFO_EMP : RO, UART transmitter fifo empty status
bits : 5 - 5 (1 bit)

RB_LSR_TX_ALL_EMP : RO, UART transmitter all empty status
bits : 6 - 6 (1 bit)

RB_LSR_ERR_RX_FIFO : RO, indicate error in UART receiver fifo
bits : 7 - 7 (1 bit)

R8_UART1_RBR : RO, UART1 receiver buffer, receiving byte
bits : 0 - 7 (8 bit)

R8_UART1_RBR : WO, UART1 transmitter holding, transmittal byte
bits : 0 - 7 (8 bit)

R8_UART1_RFC : RO, UART1 receiver FIFO count
bits : 0 - 7 (8 bit)

R8_UART1_TFC : RO, UART1 receiver FIFO count
bits : 0 - 7 (8 bit)

R16_UART1_DL : RW, UART1 divisor latch
bits : 0 - 15 (16 bit)

R8_UART1_DIV : RW, UART1 pre-divisor latch byte, only low 7 bit, from 1 to 128
bits : 0 - 7 (8 bit)