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PFIC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :

Registers

ISR1 (R32_PFIC_ISR1)

IENR1 (R32_PFIC_IENR1)

IENR2 (R32_PFIC_IENR2)

IRER1 (R32_PFIC_IRER1)

IRER2 (R32_PFIC_IRER2)

IPR1 (R32_PFIC_IPR1)

IPSR1 (R32_PFIC_IPSR1)

IPSR2 (R32_PFIC_IPSR2)

IPR2 (R32_PFIC_IPR2)

IPRR1 (R32_PFIC_IPRR1)

IPRR2 (R32_PFIC_IPRR2)

IACTR1 (R32_PFIC_IACTR1)

IACTR2 (R32_PFIC_IACTR2)

ISR2 (R32_PFIC_ISR2)

ITHRESDR (R32_PFIC_ITHRESDR)

IPRIOR0 (R32_PFIC_IPRIOR0)

IPRIOR1 (R32_PFIC_IPRIOR1)

FIBADDRR (R32_PFIC_FIBADDRR)

IPRIOR2 (R32_PFIC_IPRIOR2)

IPRIOR3 (R32_PFIC_IPRIOR3)

CFGR (R32_PFIC_CFGR)

IPRIOR4 (R32_PFIC_IPRIOR4)

IPRIOR5 (R32_PFIC_IPRIOR5)

GISR (R32_PFIC_GISR)

IPRIOR6 (R32_PFIC_IPRIOR6)

IPRIOR7 (R32_PFIC_IPRIOR7)

IPRIOR8 (R32_PFIC_IPRIOR8)

IPRIOR9 (R32_PFIC_IPRIOR9)

IPRIOR10 (R32_PFIC_IPRIOR10)

IPRIOR11 (R32_PFIC_IPRIOR11)

IPRIOR12 (R32_PFIC_IPRIOR12)

IPRIOR13 (R32_PFIC_IPRIOR13)

IPRIOR14 (R32_PFIC_IPRIOR14)

IPRIOR15 (R32_PFIC_IPRIOR15)

FIFOADDRR0 (R32_PFIC_FIFOADDRR0)

IPRIOR16 (R32_PFIC_IPRIOR16)

IPRIOR17 (R32_PFIC_IPRIOR17)

FIFOADDRR1 (R32_PFIC_FIFOADDRR1)

IPRIOR18 (R32_PFIC_IPRIOR18)

IPRIOR19 (R32_PFIC_IPRIOR19)

FIFOADDRR2 (R32_PFIC_FIFOADDRR2)

IPRIOR20 (R32_PFIC_IPRIOR20)

IPRIOR21 (R32_PFIC_IPRIOR21)

FIFOADDRR3 (R32_PFIC_FIFOADDRR3)

IPRIOR22 (R32_PFIC_IPRIOR22)

IPRIOR23 (R32_PFIC_IPRIOR23)

IPRIOR24 (R32_PFIC_IPRIOR24)

IPRIOR25 (R32_PFIC_IPRIOR25)

IPRIOR26 (R32_PFIC_IPRIOR26)

IPRIOR27 (R32_PFIC_IPRIOR27)

IPRIOR28 (R32_PFIC_IPRIOR28)

IPRIOR29 (R32_PFIC_IPRIOR29)

IPRIOR30 (R32_PFIC_IPRIOR30)

IPRIOR31 (R32_PFIC_IPRIOR31)

IPRIOR32 (R32_PFIC_IPRIOR32)

IPRIOR33 (R32_PFIC_IPRIOR33)

IPRIOR34 (R32_PFIC_IPRIOR34)

IPRIOR35 (R32_PFIC_IPRIOR35)

IPRIOR36 (R32_PFIC_IPRIOR36)

IPRIOR37 (R32_PFIC_IPRIOR37)

IPRIOR38 (R32_PFIC_IPRIOR38)

IPRIOR39 (R32_PFIC_IPRIOR39)

IPRIOR40 (R32_PFIC_IPRIOR40)

IPRIOR41 (R32_PFIC_IPRIOR41)

IPRIOR42 (R32_PFIC_IPRIOR42)

IPRIOR43 (R32_PFIC_IPRIOR43)

IPRIOR44 (R32_PFIC_IPRIOR44)

IPRIOR45 (R32_PFIC_IPRIOR45)

IPRIOR46 (R32_PFIC_IPRIOR46)

IPRIOR47 (R32_PFIC_IPRIOR47)

IPRIOR48 (R32_PFIC_IPRIOR48)

IPRIOR49 (R32_PFIC_IPRIOR49)

IPRIOR50 (R32_PFIC_IPRIOR50)

IPRIOR51 (R32_PFIC_IPRIOR51)

IPRIOR52 (R32_PFIC_IPRIOR52)

IPRIOR53 (R32_PFIC_IPRIOR53)

IPRIOR54 (R32_PFIC_IPRIOR54)

IPRIOR55 (R32_PFIC_IPRIOR55)

IPRIOR56 (R32_PFIC_IPRIOR56)

IPRIOR57 (R32_PFIC_IPRIOR57)

IPRIOR58 (R32_PFIC_IPRIOR58)

IPRIOR59 (R32_PFIC_IPRIOR59)

IPRIOR60 (R32_PFIC_IPRIOR60)

IPRIOR61 (R32_PFIC_IPRIOR61)

IPRIOR62 (R32_PFIC_IPRIOR62)

IPRIOR63 (R32_PFIC_IPRIOR63)

SCTLR (R32_PFIC_SCTLR)

VTCTLR (R32_PFIC_VTCTLR)


ISR1 (R32_PFIC_ISR1)

RO,Interrupt Status Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
reset_value : 0x0
reset_Mask : 0x0

ISR1 ISR1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INTENSTA

INTENSTA : Interrupt ID Status
bits : 12 - 31 (20 bit)


IENR1 (R32_PFIC_IENR1)

Interrupt Setting Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IENR1 IENR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INTEN

INTEN : RW1,INTEN
bits : 12 - 31 (20 bit)


IENR2 (R32_PFIC_IENR2)

Interrupt Setting Register
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IENR2 IENR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INTEN

INTEN : RW1,INTEN
bits : 0 - 3 (4 bit)


IRER1 (R32_PFIC_IRER1)

Interrupt Clear Register
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRER1 IRER1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INTRESET

INTRESET : RW1,INTRESET
bits : 12 - 31 (20 bit)


IRER2 (R32_PFIC_IRER2)

Interrupt Clear Register
address_offset : 0x184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRER2 IRER2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INTRESET

INTRESET : RW1,INTRESET
bits : 0 - 3 (4 bit)


IPR1 (R32_PFIC_IPR1)

RO,Interrupt Pending Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
reset_value : 0x0
reset_Mask : 0x0

IPR1 IPR1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PENDSTA

PENDSTA : PENDSTA
bits : 12 - 31 (20 bit)


IPSR1 (R32_PFIC_IPSR1)

Interrupt Pending Register
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPSR1 IPSR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PENDSET

PENDSET : RW1,PENDSET
bits : 12 - 31 (20 bit)


IPSR2 (R32_PFIC_IPSR2)

Interrupt Pending Register
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPSR2 IPSR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PENDSET

PENDSET : RW1,PENDSET
bits : 0 - 3 (4 bit)


IPR2 (R32_PFIC_IPR2)

RO,Interrupt Pending Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IPR2 IPR2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PENDSTA

PENDSTA : PENDSTA
bits : 0 - 3 (4 bit)


IPRR1 (R32_PFIC_IPRR1)

Interrupt Pending Clear Register
address_offset : 0x280 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRR1 IPRR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PENDRESET

PENDRESET : RW1,PENDRESET
bits : 12 - 31 (20 bit)


IPRR2 (R32_PFIC_IPRR2)

Interrupt Pending Clear Register
address_offset : 0x284 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRR2 IPRR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PENDRESET

PENDRESET : RW1,PENDRESET
bits : 0 - 3 (4 bit)


IACTR1 (R32_PFIC_IACTR1)

Interrupt ACTIVE Register
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IACTR1 IACTR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IACTS

IACTS : RW1,IACTS
bits : 12 - 31 (20 bit)


IACTR2 (R32_PFIC_IACTR2)

Interrupt ACTIVE Register
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IACTR2 IACTR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IACTS

IACTS : RW1,IACTS
bits : 0 - 3 (4 bit)


ISR2 (R32_PFIC_ISR2)

RO,Interrupt Status Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
reset_value : 0x0
reset_Mask : 0x0

ISR2 ISR2 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INTENSTA

INTENSTA : Interrupt ID Status
bits : 0 - 3 (4 bit)


ITHRESDR (R32_PFIC_ITHRESDR)

RW,Interrupt Priority Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ITHRESDR ITHRESDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRESHOLD

THRESHOLD : RW,THRESHOLD
bits : 0 - 7 (8 bit)


IPRIOR0 (R32_PFIC_IPRIOR0)

Interrupt Priority configuration Register
address_offset : 0x400 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR0 IPRIOR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR0

IPRIOR0 : RW,IPRIOR0
bits : 0 - 31 (32 bit)


IPRIOR1 (R32_PFIC_IPRIOR1)

Interrupt Priority configuration Register
address_offset : 0x420 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR1 IPRIOR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR1

IPRIOR1 : >RW,IPRIOR1
bits : 0 - 31 (32 bit)


FIBADDRR (R32_PFIC_FIBADDRR)

RW,Interrupt Fast Address Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIBADDRR FIBADDRR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BASEADDR

BASEADDR : BASEADDR
bits : 28 - 31 (4 bit)


IPRIOR2 (R32_PFIC_IPRIOR2)

Interrupt Priority configuration Register
address_offset : 0x440 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR2 IPRIOR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR2

IPRIOR2 : >RW,IPRIOR2
bits : 0 - 31 (32 bit)


IPRIOR3 (R32_PFIC_IPRIOR3)

Interrupt Priority configuration Register
address_offset : 0x460 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR3 IPRIOR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR3

IPRIOR3 : >RW,IPRIOR3
bits : 0 - 31 (32 bit)


CFGR (R32_PFIC_CFGR)

Interrupt Config Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFGR CFGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HWSTKCTRL NESTCTRL NMISET NMIRESET EXCSET EXCRESET PFICRESET SYSRESET KEYCODE

HWSTKCTRL : RW,HWSTKCTRL
bits : 0 - 0 (1 bit)

NESTCTRL : RW,NESTCTRL
bits : 1 - 1 (1 bit)

NMISET : WO,NMISET
bits : 2 - 2 (1 bit)

NMIRESET : WO,NMIRESET
bits : 3 - 3 (1 bit)

EXCSET : WO,EXCSET
bits : 4 - 4 (1 bit)

EXCRESET : WO,EXCRESET
bits : 5 - 5 (1 bit)

PFICRESET : WO,PFICRSET
bits : 6 - 6 (1 bit)

SYSRESET : WO,SYSRESET
bits : 7 - 7 (1 bit)

KEYCODE : WO,KEYCODE
bits : 16 - 31 (16 bit)


IPRIOR4 (R32_PFIC_IPRIOR4)

Interrupt Priority configuration Register
address_offset : 0x480 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR4 IPRIOR4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR4

IPRIOR4 : >RW,IPRIOR4
bits : 0 - 31 (32 bit)


IPRIOR5 (R32_PFIC_IPRIOR5)

Interrupt Priority configuration Register
address_offset : 0x4A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR5 IPRIOR5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR5

IPRIOR5 : >RW,IPRIOR5
bits : 0 - 31 (32 bit)


GISR (R32_PFIC_GISR)

Interrupt Global Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

GISR GISR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NESTSTA GACTSTA GPENDSTA

NESTSTA : RO,NESTSTA
bits : 0 - 7 (8 bit)

GACTSTA : RO,GACTSTA
bits : 8 - 8 (1 bit)

GPENDSTA : RO,GPENDSTA
bits : 9 - 9 (1 bit)


IPRIOR6 (R32_PFIC_IPRIOR6)

Interrupt Priority configuration Register
address_offset : 0x4C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR6 IPRIOR6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR6

IPRIOR6 : >RW,IPRIOR6
bits : 0 - 31 (32 bit)


IPRIOR7 (R32_PFIC_IPRIOR7)

Interrupt Priority configuration Register
address_offset : 0x4E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR7 IPRIOR7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR7

IPRIOR7 : >RW,IPRIOR7
bits : 0 - 31 (32 bit)


IPRIOR8 (R32_PFIC_IPRIOR8)

Interrupt Priority configuration Register
address_offset : 0x500 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR8 IPRIOR8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR8

IPRIOR8 : >RW,IPRIOR8
bits : 0 - 31 (32 bit)


IPRIOR9 (R32_PFIC_IPRIOR9)

Interrupt Priority configuration Register
address_offset : 0x520 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR9 IPRIOR9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR9

IPRIOR9 : >RW,IPRIOR9
bits : 0 - 31 (32 bit)


IPRIOR10 (R32_PFIC_IPRIOR10)

Interrupt Priority configuration Register
address_offset : 0x540 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR10 IPRIOR10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR10

IPRIOR10 : >RW,IPRIOR10
bits : 0 - 31 (32 bit)


IPRIOR11 (R32_PFIC_IPRIOR11)

Interrupt Priority configuration Register
address_offset : 0x560 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR11 IPRIOR11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR11

IPRIOR11 : RW,IPRIOR11
bits : 0 - 31 (32 bit)


IPRIOR12 (R32_PFIC_IPRIOR12)

Interrupt Priority configuration Register
address_offset : 0x580 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR12 IPRIOR12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR12

IPRIOR12 : RW,IPRIOR12
bits : 0 - 31 (32 bit)


IPRIOR13 (R32_PFIC_IPRIOR13)

Interrupt Priority configuration Register
address_offset : 0x5A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR13 IPRIOR13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR13

IPRIOR13 : RW,IPRIOR13
bits : 0 - 31 (32 bit)


IPRIOR14 (R32_PFIC_IPRIOR14)

Interrupt Priority configuration Register
address_offset : 0x5C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR14 IPRIOR14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR14

IPRIOR14 : RW,IPRIOR14
bits : 0 - 31 (32 bit)


IPRIOR15 (R32_PFIC_IPRIOR15)

Interrupt Priority configuration Register
address_offset : 0x5E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR15 IPRIOR15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR15

IPRIOR15 : RW,IPRIOR15
bits : 0 - 31 (32 bit)


FIFOADDRR0 (R32_PFIC_FIFOADDRR0)

Interrupt 0 address Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFOADDRR0 FIFOADDRR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OFFADDR0 IRQID0

OFFADDR0 : RW,OFFADDR0
bits : 0 - 23 (24 bit)

IRQID0 : RW,IRQID0
bits : 24 - 31 (8 bit)


IPRIOR16 (R32_PFIC_IPRIOR16)

Interrupt Priority configuration Register
address_offset : 0x600 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR16 IPRIOR16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR16

IPRIOR16 : RW,IPRIOR16
bits : 0 - 31 (32 bit)


IPRIOR17 (R32_PFIC_IPRIOR17)

Interrupt Priority configuration Register
address_offset : 0x620 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR17 IPRIOR17 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR17

IPRIOR17 : RW,IPRIOR17
bits : 0 - 31 (32 bit)


FIFOADDRR1 (R32_PFIC_FIFOADDRR1)

Interrupt 1 address Register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFOADDRR1 FIFOADDRR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OFFADDR1 IRQID1

OFFADDR1 : RW,OFFADDR1
bits : 0 - 23 (24 bit)

IRQID1 : RW,IRQID1
bits : 24 - 31 (8 bit)


IPRIOR18 (R32_PFIC_IPRIOR18)

Interrupt Priority configuration Register
address_offset : 0x640 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR18 IPRIOR18 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR18

IPRIOR18 : RW,IPRIOR18
bits : 0 - 31 (32 bit)


IPRIOR19 (R32_PFIC_IPRIOR19)

Interrupt Priority configuration Register
address_offset : 0x660 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR19 IPRIOR19 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR19

IPRIOR19 : RW,IPRIOR19
bits : 0 - 31 (32 bit)


FIFOADDRR2 (R32_PFIC_FIFOADDRR2)

Interrupt 2 address Register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFOADDRR2 FIFOADDRR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OFFADDR2 IRQID2

OFFADDR2 : RW,OFFADDR2
bits : 0 - 23 (24 bit)

IRQID2 : RW,IRQID2
bits : 24 - 31 (8 bit)


IPRIOR20 (R32_PFIC_IPRIOR20)

Interrupt Priority configuration Register
address_offset : 0x680 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR20 IPRIOR20 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR20

IPRIOR20 : RW,IPRIOR20
bits : 0 - 31 (32 bit)


IPRIOR21 (R32_PFIC_IPRIOR21)

Interrupt Priority configuration Register
address_offset : 0x6A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR21 IPRIOR21 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR21

IPRIOR21 : RW,IPRIOR21
bits : 0 - 31 (32 bit)


FIFOADDRR3 (R32_PFIC_FIFOADDRR3)

Interrupt 3 address Register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFOADDRR3 FIFOADDRR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OFFADDR3 IRQID3

OFFADDR3 : RW,OFFADDR3
bits : 0 - 23 (24 bit)

IRQID3 : RW,IRQID3
bits : 24 - 31 (8 bit)


IPRIOR22 (R32_PFIC_IPRIOR22)

Interrupt Priority configuration Register
address_offset : 0x6C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR22 IPRIOR22 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR22

IPRIOR22 : RW,IPRIOR22
bits : 0 - 31 (32 bit)


IPRIOR23 (R32_PFIC_IPRIOR23)

Interrupt Priority configuration Register
address_offset : 0x6E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR23 IPRIOR23 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR23

IPRIOR23 : RW,IPRIOR23
bits : 0 - 31 (32 bit)


IPRIOR24 (R32_PFIC_IPRIOR24)

Interrupt Priority configuration Register
address_offset : 0x700 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR24 IPRIOR24 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR24

IPRIOR24 : RW,IPRIOR24
bits : 0 - 31 (32 bit)


IPRIOR25 (R32_PFIC_IPRIOR25)

Interrupt Priority configuration Register
address_offset : 0x720 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR25 IPRIOR25 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR25

IPRIOR25 : RW,IPRIOR25
bits : 0 - 31 (32 bit)


IPRIOR26 (R32_PFIC_IPRIOR26)

Interrupt Priority configuration Register
address_offset : 0x740 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR26 IPRIOR26 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR26

IPRIOR26 : RW,IPRIOR26
bits : 0 - 31 (32 bit)


IPRIOR27 (R32_PFIC_IPRIOR27)

Interrupt Priority configuration Register
address_offset : 0x760 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR27 IPRIOR27 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR27

IPRIOR27 : RW,IPRIOR27
bits : 0 - 31 (32 bit)


IPRIOR28 (R32_PFIC_IPRIOR28)

Interrupt Priority configuration Register
address_offset : 0x780 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR28 IPRIOR28 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR28

IPRIOR28 : RW,IPRIOR28
bits : 0 - 31 (32 bit)


IPRIOR29 (R32_PFIC_IPRIOR29)

Interrupt Priority configuration Register
address_offset : 0x7A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR29 IPRIOR29 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR29

IPRIOR29 : RW,IPRIOR29
bits : 0 - 31 (32 bit)


IPRIOR30 (R32_PFIC_IPRIOR30)

Interrupt Priority configuration Register
address_offset : 0x7C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR30 IPRIOR30 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR30

IPRIOR30 : RW,IPRIOR30
bits : 0 - 31 (32 bit)


IPRIOR31 (R32_PFIC_IPRIOR31)

Interrupt Priority configuration Register
address_offset : 0x7E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR31 IPRIOR31 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR31

IPRIOR31 : RW,IPRIOR31
bits : 0 - 31 (32 bit)


IPRIOR32 (R32_PFIC_IPRIOR32)

Interrupt Priority configuration Register
address_offset : 0x800 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR32 IPRIOR32 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR32

IPRIOR32 : RW,IPRIOR32
bits : 0 - 31 (32 bit)


IPRIOR33 (R32_PFIC_IPRIOR33)

Interrupt Priority configuration Register
address_offset : 0x820 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR33 IPRIOR33 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR33

IPRIOR33 : RW,IPRIOR33
bits : 0 - 31 (32 bit)


IPRIOR34 (R32_PFIC_IPRIOR34)

Interrupt Priority configuration Register
address_offset : 0x840 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR34 IPRIOR34 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR34

IPRIOR34 : RW,IPRIOR34
bits : 0 - 31 (32 bit)


IPRIOR35 (R32_PFIC_IPRIOR35)

Interrupt Priority configuration Register
address_offset : 0x860 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR35 IPRIOR35 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR35

IPRIOR35 : RW,IPRIOR35
bits : 0 - 31 (32 bit)


IPRIOR36 (R32_PFIC_IPRIOR36)

Interrupt Priority configuration Register
address_offset : 0x880 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR36 IPRIOR36 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR36

IPRIOR36 : RW,IPRIOR36
bits : 0 - 31 (32 bit)


IPRIOR37 (R32_PFIC_IPRIOR37)

Interrupt Priority configuration Register
address_offset : 0x8A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR37 IPRIOR37 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR37

IPRIOR37 : RW,IPRIOR37
bits : 0 - 31 (32 bit)


IPRIOR38 (R32_PFIC_IPRIOR38)

Interrupt Priority configuration Register
address_offset : 0x8C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR38 IPRIOR38 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR38

IPRIOR38 : RW,IPRIOR38
bits : 0 - 31 (32 bit)


IPRIOR39 (R32_PFIC_IPRIOR39)

Interrupt Priority configuration Register
address_offset : 0x8E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR39 IPRIOR39 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR39

IPRIOR39 : RW,IPRIOR39
bits : 0 - 31 (32 bit)


IPRIOR40 (R32_PFIC_IPRIOR40)

Interrupt Priority configuration Register
address_offset : 0x900 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR40 IPRIOR40 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR40

IPRIOR40 : RW,IPRIOR40
bits : 0 - 31 (32 bit)


IPRIOR41 (R32_PFIC_IPRIOR41)

Interrupt Priority configuration Register
address_offset : 0x920 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR41 IPRIOR41 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR41

IPRIOR41 : RW,IPRIOR41
bits : 0 - 31 (32 bit)


IPRIOR42 (R32_PFIC_IPRIOR42)

Interrupt Priority configuration Register
address_offset : 0x940 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR42 IPRIOR42 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR42

IPRIOR42 : RW,IPRIOR42
bits : 0 - 31 (32 bit)


IPRIOR43 (R32_PFIC_IPRIOR43)

Interrupt Priority configuration Register
address_offset : 0x960 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR43 IPRIOR43 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR43

IPRIOR43 : RW,IPRIOR43
bits : 0 - 31 (32 bit)


IPRIOR44 (R32_PFIC_IPRIOR44)

Interrupt Priority configuration Register
address_offset : 0x980 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR44 IPRIOR44 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR44

IPRIOR44 : RW,IPRIOR44
bits : 0 - 31 (32 bit)


IPRIOR45 (R32_PFIC_IPRIOR45)

Interrupt Priority configuration Register
address_offset : 0x9A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR45 IPRIOR45 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR45

IPRIOR45 : RW,IPRIOR45
bits : 0 - 31 (32 bit)


IPRIOR46 (R32_PFIC_IPRIOR46)

Interrupt Priority configuration Register
address_offset : 0x9C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR46 IPRIOR46 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR46

IPRIOR46 : RW,IPRIOR46
bits : 0 - 31 (32 bit)


IPRIOR47 (R32_PFIC_IPRIOR47)

Interrupt Priority configuration Register
address_offset : 0x9E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR47 IPRIOR47 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR47

IPRIOR47 : RW,IPRIOR47
bits : 0 - 31 (32 bit)


IPRIOR48 (R32_PFIC_IPRIOR48)

Interrupt Priority configuration Register
address_offset : 0xA00 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR48 IPRIOR48 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR48

IPRIOR48 : RW,IPRIOR48
bits : 0 - 31 (32 bit)


IPRIOR49 (R32_PFIC_IPRIOR49)

Interrupt Priority configuration Register
address_offset : 0xA20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR49 IPRIOR49 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR49

IPRIOR49 : RW,IPRIOR49
bits : 0 - 31 (32 bit)


IPRIOR50 (R32_PFIC_IPRIOR50)

Interrupt Priority configuration Register
address_offset : 0xA40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR50 IPRIOR50 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR50

IPRIOR50 : RW,IPRIOR50
bits : 0 - 31 (32 bit)


IPRIOR51 (R32_PFIC_IPRIOR51)

Interrupt Priority configuration Register
address_offset : 0xA60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR51 IPRIOR51 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR51

IPRIOR51 : RW,IPRIOR51
bits : 0 - 31 (32 bit)


IPRIOR52 (R32_PFIC_IPRIOR52)

Interrupt Priority configuration Register
address_offset : 0xA80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR52 IPRIOR52 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR52

IPRIOR52 : RW,IPRIOR52
bits : 0 - 31 (32 bit)


IPRIOR53 (R32_PFIC_IPRIOR53)

Interrupt Priority configuration Register
address_offset : 0xAA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR53 IPRIOR53 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR53

IPRIOR53 : RW,IPRIOR53
bits : 0 - 31 (32 bit)


IPRIOR54 (R32_PFIC_IPRIOR54)

Interrupt Priority configuration Register
address_offset : 0xAD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR54 IPRIOR54 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR54

IPRIOR54 : RW,IPRIOR54
bits : 0 - 31 (32 bit)


IPRIOR55 (R32_PFIC_IPRIOR55)

Interrupt Priority configuration Register
address_offset : 0xAE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR55 IPRIOR55 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR55

IPRIOR55 : RW,IPRIOR55
bits : 0 - 31 (32 bit)


IPRIOR56 (R32_PFIC_IPRIOR56)

Interrupt Priority configuration Register
address_offset : 0xB00 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR56 IPRIOR56 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR56

IPRIOR56 : RW,IPRIOR56
bits : 0 - 31 (32 bit)


IPRIOR57 (R32_PFIC_IPRIOR57)

Interrupt Priority configuration Register
address_offset : 0xB20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR57 IPRIOR57 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR57

IPRIOR57 : RW,IPRIOR57
bits : 0 - 31 (32 bit)


IPRIOR58 (R32_PFIC_IPRIOR58)

Interrupt Priority configuration Register
address_offset : 0xB40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR58 IPRIOR58 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR58

IPRIOR58 : RW,IPRIOR58
bits : 0 - 31 (32 bit)


IPRIOR59 (R32_PFIC_IPRIOR59)

Interrupt Priority configuration Register
address_offset : 0xB60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR59 IPRIOR59 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR59

IPRIOR59 : RW,IPRIOR59
bits : 0 - 31 (32 bit)


IPRIOR60 (R32_PFIC_IPRIOR60)

Interrupt Priority configuration Register
address_offset : 0xB80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR60 IPRIOR60 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR60

IPRIOR60 : RW,IPRIOR60
bits : 0 - 31 (32 bit)


IPRIOR61 (R32_PFIC_IPRIOR61)

Interrupt Priority configuration Register
address_offset : 0xBA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR61 IPRIOR61 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR61

IPRIOR61 : RW,IPRIOR61
bits : 0 - 31 (32 bit)


IPRIOR62 (R32_PFIC_IPRIOR62)

Interrupt Priority configuration Register
address_offset : 0xBE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR62 IPRIOR62 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR62

IPRIOR62 : RW,IPRIOR62
bits : 0 - 31 (32 bit)


IPRIOR63 (R32_PFIC_IPRIOR63)

Interrupt Priority configuration Register
address_offset : 0xC00 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPRIOR63 IPRIOR63 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPRIOR63

IPRIOR63 : RW,IPRIOR63
bits : 0 - 31 (32 bit)


SCTLR (R32_PFIC_SCTLR)

System Control Register
address_offset : 0xD10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCTLR SCTLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLEEPONEXIT SLEEPDEEP WFITOWFE SEVONPEND SETEVENT

SLEEPONEXIT : RW,SLEEPONEXIT
bits : 1 - 1 (1 bit)

SLEEPDEEP : RW,SLEEPDEEP
bits : 2 - 2 (1 bit)

WFITOWFE : RW,WFITOWFE
bits : 3 - 3 (1 bit)

SEVONPEND : RW,SEVONPEND
bits : 4 - 4 (1 bit)

SETEVENT : WO,SETEVENT
bits : 5 - 5 (1 bit)


VTCTLR (R32_PFIC_VTCTLR)

System Control Register
address_offset : 0xD14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VTCTLR VTCTLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VTADDR

VTADDR : VTADDR
bits : 0 - 0 (1 bit)



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