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SystemControl

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :

Registers

R32_CLK_SYS_CFG


R32_CLK_SYS_CFG

RWA, system clock configuration, SAM
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : Read or Write under safe Accessing mode
reset_value : 0x0
reset_Mask : 0x0

R32_CLK_SYS_CFG R32_CLK_SYS_CFG Read or Write under safe Accessing mode 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RB_CLK_PLL_DIV RB_CLK_SYS_MOD

RB_CLK_PLL_DIV : RWA, output clock divider from PLL or CK32M
bits : 0 - 4 (5 bit)
access : Read or Write under safe Accessing mode

RB_CLK_SYS_MOD : RWA, system clock source mode: 00=divided from 32MHz
bits : 6 - 7 (2 bit)
access : Read or Write under safe Accessing mode



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