Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x320 byte (0x0)
mem_usage : registers
protection :
IRQSUMMARY_DORMANT_WAKE_SECURE0
IRQSUMMARY_DORMANT_WAKE_SECURE1
IRQSUMMARY_DORMANT_WAKE_NONSECURE0
IRQSUMMARY_DORMANT_WAKE_NONSECURE1
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi0_rx
2 : uart0_tx
3 : i2c0_sda
4 : pwm_a_8
5 : siob_proc_32
6 : pio0_32
7 : pio1_32
8 : pio2_32
10 : usb_muxing_vbus_en
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi0_ss_n
2 : uart0_rx
3 : i2c0_scl
4 : pwm_b_8
5 : siob_proc_33
6 : pio0_33
7 : pio1_33
8 : pio2_33
10 : usb_muxing_overcurr_detect
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi0_sclk
2 : uart0_cts
3 : i2c1_sda
4 : pwm_a_9
5 : siob_proc_34
6 : pio0_34
7 : pio1_34
8 : pio2_34
10 : usb_muxing_vbus_detect
11 : uart0_tx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi0_tx
2 : uart0_rts
3 : i2c1_scl
4 : pwm_b_9
5 : siob_proc_35
6 : pio0_35
7 : pio1_35
8 : pio2_35
10 : usb_muxing_vbus_en
11 : uart0_rx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi0_rx
2 : uart1_tx
3 : i2c0_sda
4 : pwm_a_10
5 : siob_proc_36
6 : pio0_36
7 : pio1_36
8 : pio2_36
10 : usb_muxing_overcurr_detect
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi0_ss_n
2 : uart1_rx
3 : i2c0_scl
4 : pwm_b_10
5 : siob_proc_37
6 : pio0_37
7 : pio1_37
8 : pio2_37
10 : usb_muxing_vbus_detect
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi0_sclk
2 : uart1_cts
3 : i2c1_sda
4 : pwm_a_11
5 : siob_proc_38
6 : pio0_38
7 : pio1_38
8 : pio2_38
10 : usb_muxing_vbus_en
11 : uart1_tx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x13C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi0_tx
2 : uart1_rts
3 : i2c1_scl
4 : pwm_b_11
5 : siob_proc_39
6 : pio0_39
7 : pio1_39
8 : pio2_39
10 : usb_muxing_overcurr_detect
11 : uart1_rx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
0 : jtag_tdi
1 : spi0_sclk
2 : uart0_cts
3 : i2c1_sda
4 : pwm_a_1
5 : siob_proc_2
6 : pio0_2
7 : pio1_2
8 : pio2_2
9 : coresight_tracedata_0
10 : usb_muxing_vbus_en
11 : uart0_tx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_rx
2 : uart1_tx
3 : i2c0_sda
4 : pwm_a_8
5 : siob_proc_40
6 : pio0_40
7 : pio1_40
8 : pio2_40
10 : usb_muxing_vbus_detect
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_ss_n
2 : uart1_rx
3 : i2c0_scl
4 : pwm_b_8
5 : siob_proc_41
6 : pio0_41
7 : pio1_41
8 : pio2_41
10 : usb_muxing_vbus_en
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_sclk
2 : uart1_cts
3 : i2c1_sda
4 : pwm_a_9
5 : siob_proc_42
6 : pio0_42
7 : pio1_42
8 : pio2_42
10 : usb_muxing_overcurr_detect
11 : uart1_tx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x15C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_tx
2 : uart1_rts
3 : i2c1_scl
4 : pwm_b_9
5 : siob_proc_43
6 : pio0_43
7 : pio1_43
8 : pio2_43
10 : usb_muxing_vbus_detect
11 : uart1_rx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x164 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_rx
2 : uart0_tx
3 : i2c0_sda
4 : pwm_a_10
5 : siob_proc_44
6 : pio0_44
7 : pio1_44
8 : pio2_44
10 : usb_muxing_vbus_en
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x168 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x16C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_ss_n
2 : uart0_rx
3 : i2c0_scl
4 : pwm_b_10
5 : siob_proc_45
6 : pio0_45
7 : pio1_45
8 : pio2_45
10 : usb_muxing_overcurr_detect
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x170 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x174 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_sclk
2 : uart0_cts
3 : i2c1_sda
4 : pwm_a_11
5 : siob_proc_46
6 : pio0_46
7 : pio1_46
8 : pio2_46
10 : usb_muxing_vbus_detect
11 : uart0_tx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x178 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x17C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_tx
2 : uart0_rts
3 : i2c1_scl
4 : pwm_b_11
5 : siob_proc_47
6 : pio0_47
7 : pio1_47
8 : pio2_47
9 : xip_ss_n_1
10 : usb_muxing_vbus_en
11 : uart0_rx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
0 : jtag_tdo
1 : spi0_tx
2 : uart0_rts
3 : i2c1_scl
4 : pwm_b_1
5 : siob_proc_3
6 : pio0_3
7 : pio1_3
8 : pio2_3
9 : coresight_tracedata_1
10 : usb_muxing_overcurr_detect
11 : uart0_rx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0 :
bits : 0 - 0 (1 bit)
access : read-only
GPIO1 :
bits : 1 - 1 (1 bit)
access : read-only
GPIO2 :
bits : 2 - 2 (1 bit)
access : read-only
GPIO3 :
bits : 3 - 3 (1 bit)
access : read-only
GPIO4 :
bits : 4 - 4 (1 bit)
access : read-only
GPIO5 :
bits : 5 - 5 (1 bit)
access : read-only
GPIO6 :
bits : 6 - 6 (1 bit)
access : read-only
GPIO7 :
bits : 7 - 7 (1 bit)
access : read-only
GPIO8 :
bits : 8 - 8 (1 bit)
access : read-only
GPIO9 :
bits : 9 - 9 (1 bit)
access : read-only
GPIO10 :
bits : 10 - 10 (1 bit)
access : read-only
GPIO11 :
bits : 11 - 11 (1 bit)
access : read-only
GPIO12 :
bits : 12 - 12 (1 bit)
access : read-only
GPIO13 :
bits : 13 - 13 (1 bit)
access : read-only
GPIO14 :
bits : 14 - 14 (1 bit)
access : read-only
GPIO15 :
bits : 15 - 15 (1 bit)
access : read-only
GPIO16 :
bits : 16 - 16 (1 bit)
access : read-only
GPIO17 :
bits : 17 - 17 (1 bit)
access : read-only
GPIO18 :
bits : 18 - 18 (1 bit)
access : read-only
GPIO19 :
bits : 19 - 19 (1 bit)
access : read-only
GPIO20 :
bits : 20 - 20 (1 bit)
access : read-only
GPIO21 :
bits : 21 - 21 (1 bit)
access : read-only
GPIO22 :
bits : 22 - 22 (1 bit)
access : read-only
GPIO23 :
bits : 23 - 23 (1 bit)
access : read-only
GPIO24 :
bits : 24 - 24 (1 bit)
access : read-only
GPIO25 :
bits : 25 - 25 (1 bit)
access : read-only
GPIO26 :
bits : 26 - 26 (1 bit)
access : read-only
GPIO27 :
bits : 27 - 27 (1 bit)
access : read-only
GPIO28 :
bits : 28 - 28 (1 bit)
access : read-only
GPIO29 :
bits : 29 - 29 (1 bit)
access : read-only
GPIO30 :
bits : 30 - 30 (1 bit)
access : read-only
GPIO31 :
bits : 31 - 31 (1 bit)
access : read-only
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32 :
bits : 0 - 0 (1 bit)
access : read-only
GPIO33 :
bits : 1 - 1 (1 bit)
access : read-only
GPIO34 :
bits : 2 - 2 (1 bit)
access : read-only
GPIO35 :
bits : 3 - 3 (1 bit)
access : read-only
GPIO36 :
bits : 4 - 4 (1 bit)
access : read-only
GPIO37 :
bits : 5 - 5 (1 bit)
access : read-only
GPIO38 :
bits : 6 - 6 (1 bit)
access : read-only
GPIO39 :
bits : 7 - 7 (1 bit)
access : read-only
GPIO40 :
bits : 8 - 8 (1 bit)
access : read-only
GPIO41 :
bits : 9 - 9 (1 bit)
access : read-only
GPIO42 :
bits : 10 - 10 (1 bit)
access : read-only
GPIO43 :
bits : 11 - 11 (1 bit)
access : read-only
GPIO44 :
bits : 12 - 12 (1 bit)
access : read-only
GPIO45 :
bits : 13 - 13 (1 bit)
access : read-only
GPIO46 :
bits : 14 - 14 (1 bit)
access : read-only
GPIO47 :
bits : 15 - 15 (1 bit)
access : read-only
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0 :
bits : 0 - 0 (1 bit)
access : read-only
GPIO1 :
bits : 1 - 1 (1 bit)
access : read-only
GPIO2 :
bits : 2 - 2 (1 bit)
access : read-only
GPIO3 :
bits : 3 - 3 (1 bit)
access : read-only
GPIO4 :
bits : 4 - 4 (1 bit)
access : read-only
GPIO5 :
bits : 5 - 5 (1 bit)
access : read-only
GPIO6 :
bits : 6 - 6 (1 bit)
access : read-only
GPIO7 :
bits : 7 - 7 (1 bit)
access : read-only
GPIO8 :
bits : 8 - 8 (1 bit)
access : read-only
GPIO9 :
bits : 9 - 9 (1 bit)
access : read-only
GPIO10 :
bits : 10 - 10 (1 bit)
access : read-only
GPIO11 :
bits : 11 - 11 (1 bit)
access : read-only
GPIO12 :
bits : 12 - 12 (1 bit)
access : read-only
GPIO13 :
bits : 13 - 13 (1 bit)
access : read-only
GPIO14 :
bits : 14 - 14 (1 bit)
access : read-only
GPIO15 :
bits : 15 - 15 (1 bit)
access : read-only
GPIO16 :
bits : 16 - 16 (1 bit)
access : read-only
GPIO17 :
bits : 17 - 17 (1 bit)
access : read-only
GPIO18 :
bits : 18 - 18 (1 bit)
access : read-only
GPIO19 :
bits : 19 - 19 (1 bit)
access : read-only
GPIO20 :
bits : 20 - 20 (1 bit)
access : read-only
GPIO21 :
bits : 21 - 21 (1 bit)
access : read-only
GPIO22 :
bits : 22 - 22 (1 bit)
access : read-only
GPIO23 :
bits : 23 - 23 (1 bit)
access : read-only
GPIO24 :
bits : 24 - 24 (1 bit)
access : read-only
GPIO25 :
bits : 25 - 25 (1 bit)
access : read-only
GPIO26 :
bits : 26 - 26 (1 bit)
access : read-only
GPIO27 :
bits : 27 - 27 (1 bit)
access : read-only
GPIO28 :
bits : 28 - 28 (1 bit)
access : read-only
GPIO29 :
bits : 29 - 29 (1 bit)
access : read-only
GPIO30 :
bits : 30 - 30 (1 bit)
access : read-only
GPIO31 :
bits : 31 - 31 (1 bit)
access : read-only
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32 :
bits : 0 - 0 (1 bit)
access : read-only
GPIO33 :
bits : 1 - 1 (1 bit)
access : read-only
GPIO34 :
bits : 2 - 2 (1 bit)
access : read-only
GPIO35 :
bits : 3 - 3 (1 bit)
access : read-only
GPIO36 :
bits : 4 - 4 (1 bit)
access : read-only
GPIO37 :
bits : 5 - 5 (1 bit)
access : read-only
GPIO38 :
bits : 6 - 6 (1 bit)
access : read-only
GPIO39 :
bits : 7 - 7 (1 bit)
access : read-only
GPIO40 :
bits : 8 - 8 (1 bit)
access : read-only
GPIO41 :
bits : 9 - 9 (1 bit)
access : read-only
GPIO42 :
bits : 10 - 10 (1 bit)
access : read-only
GPIO43 :
bits : 11 - 11 (1 bit)
access : read-only
GPIO44 :
bits : 12 - 12 (1 bit)
access : read-only
GPIO45 :
bits : 13 - 13 (1 bit)
access : read-only
GPIO46 :
bits : 14 - 14 (1 bit)
access : read-only
GPIO47 :
bits : 15 - 15 (1 bit)
access : read-only
address_offset : 0x210 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0 :
bits : 0 - 0 (1 bit)
access : read-only
GPIO1 :
bits : 1 - 1 (1 bit)
access : read-only
GPIO2 :
bits : 2 - 2 (1 bit)
access : read-only
GPIO3 :
bits : 3 - 3 (1 bit)
access : read-only
GPIO4 :
bits : 4 - 4 (1 bit)
access : read-only
GPIO5 :
bits : 5 - 5 (1 bit)
access : read-only
GPIO6 :
bits : 6 - 6 (1 bit)
access : read-only
GPIO7 :
bits : 7 - 7 (1 bit)
access : read-only
GPIO8 :
bits : 8 - 8 (1 bit)
access : read-only
GPIO9 :
bits : 9 - 9 (1 bit)
access : read-only
GPIO10 :
bits : 10 - 10 (1 bit)
access : read-only
GPIO11 :
bits : 11 - 11 (1 bit)
access : read-only
GPIO12 :
bits : 12 - 12 (1 bit)
access : read-only
GPIO13 :
bits : 13 - 13 (1 bit)
access : read-only
GPIO14 :
bits : 14 - 14 (1 bit)
access : read-only
GPIO15 :
bits : 15 - 15 (1 bit)
access : read-only
GPIO16 :
bits : 16 - 16 (1 bit)
access : read-only
GPIO17 :
bits : 17 - 17 (1 bit)
access : read-only
GPIO18 :
bits : 18 - 18 (1 bit)
access : read-only
GPIO19 :
bits : 19 - 19 (1 bit)
access : read-only
GPIO20 :
bits : 20 - 20 (1 bit)
access : read-only
GPIO21 :
bits : 21 - 21 (1 bit)
access : read-only
GPIO22 :
bits : 22 - 22 (1 bit)
access : read-only
GPIO23 :
bits : 23 - 23 (1 bit)
access : read-only
GPIO24 :
bits : 24 - 24 (1 bit)
access : read-only
GPIO25 :
bits : 25 - 25 (1 bit)
access : read-only
GPIO26 :
bits : 26 - 26 (1 bit)
access : read-only
GPIO27 :
bits : 27 - 27 (1 bit)
access : read-only
GPIO28 :
bits : 28 - 28 (1 bit)
access : read-only
GPIO29 :
bits : 29 - 29 (1 bit)
access : read-only
GPIO30 :
bits : 30 - 30 (1 bit)
access : read-only
GPIO31 :
bits : 31 - 31 (1 bit)
access : read-only
address_offset : 0x214 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32 :
bits : 0 - 0 (1 bit)
access : read-only
GPIO33 :
bits : 1 - 1 (1 bit)
access : read-only
GPIO34 :
bits : 2 - 2 (1 bit)
access : read-only
GPIO35 :
bits : 3 - 3 (1 bit)
access : read-only
GPIO36 :
bits : 4 - 4 (1 bit)
access : read-only
GPIO37 :
bits : 5 - 5 (1 bit)
access : read-only
GPIO38 :
bits : 6 - 6 (1 bit)
access : read-only
GPIO39 :
bits : 7 - 7 (1 bit)
access : read-only
GPIO40 :
bits : 8 - 8 (1 bit)
access : read-only
GPIO41 :
bits : 9 - 9 (1 bit)
access : read-only
GPIO42 :
bits : 10 - 10 (1 bit)
access : read-only
GPIO43 :
bits : 11 - 11 (1 bit)
access : read-only
GPIO44 :
bits : 12 - 12 (1 bit)
access : read-only
GPIO45 :
bits : 13 - 13 (1 bit)
access : read-only
GPIO46 :
bits : 14 - 14 (1 bit)
access : read-only
GPIO47 :
bits : 15 - 15 (1 bit)
access : read-only
address_offset : 0x218 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0 :
bits : 0 - 0 (1 bit)
access : read-only
GPIO1 :
bits : 1 - 1 (1 bit)
access : read-only
GPIO2 :
bits : 2 - 2 (1 bit)
access : read-only
GPIO3 :
bits : 3 - 3 (1 bit)
access : read-only
GPIO4 :
bits : 4 - 4 (1 bit)
access : read-only
GPIO5 :
bits : 5 - 5 (1 bit)
access : read-only
GPIO6 :
bits : 6 - 6 (1 bit)
access : read-only
GPIO7 :
bits : 7 - 7 (1 bit)
access : read-only
GPIO8 :
bits : 8 - 8 (1 bit)
access : read-only
GPIO9 :
bits : 9 - 9 (1 bit)
access : read-only
GPIO10 :
bits : 10 - 10 (1 bit)
access : read-only
GPIO11 :
bits : 11 - 11 (1 bit)
access : read-only
GPIO12 :
bits : 12 - 12 (1 bit)
access : read-only
GPIO13 :
bits : 13 - 13 (1 bit)
access : read-only
GPIO14 :
bits : 14 - 14 (1 bit)
access : read-only
GPIO15 :
bits : 15 - 15 (1 bit)
access : read-only
GPIO16 :
bits : 16 - 16 (1 bit)
access : read-only
GPIO17 :
bits : 17 - 17 (1 bit)
access : read-only
GPIO18 :
bits : 18 - 18 (1 bit)
access : read-only
GPIO19 :
bits : 19 - 19 (1 bit)
access : read-only
GPIO20 :
bits : 20 - 20 (1 bit)
access : read-only
GPIO21 :
bits : 21 - 21 (1 bit)
access : read-only
GPIO22 :
bits : 22 - 22 (1 bit)
access : read-only
GPIO23 :
bits : 23 - 23 (1 bit)
access : read-only
GPIO24 :
bits : 24 - 24 (1 bit)
access : read-only
GPIO25 :
bits : 25 - 25 (1 bit)
access : read-only
GPIO26 :
bits : 26 - 26 (1 bit)
access : read-only
GPIO27 :
bits : 27 - 27 (1 bit)
access : read-only
GPIO28 :
bits : 28 - 28 (1 bit)
access : read-only
GPIO29 :
bits : 29 - 29 (1 bit)
access : read-only
GPIO30 :
bits : 30 - 30 (1 bit)
access : read-only
GPIO31 :
bits : 31 - 31 (1 bit)
access : read-only
address_offset : 0x21C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32 :
bits : 0 - 0 (1 bit)
access : read-only
GPIO33 :
bits : 1 - 1 (1 bit)
access : read-only
GPIO34 :
bits : 2 - 2 (1 bit)
access : read-only
GPIO35 :
bits : 3 - 3 (1 bit)
access : read-only
GPIO36 :
bits : 4 - 4 (1 bit)
access : read-only
GPIO37 :
bits : 5 - 5 (1 bit)
access : read-only
GPIO38 :
bits : 6 - 6 (1 bit)
access : read-only
GPIO39 :
bits : 7 - 7 (1 bit)
access : read-only
GPIO40 :
bits : 8 - 8 (1 bit)
access : read-only
GPIO41 :
bits : 9 - 9 (1 bit)
access : read-only
GPIO42 :
bits : 10 - 10 (1 bit)
access : read-only
GPIO43 :
bits : 11 - 11 (1 bit)
access : read-only
GPIO44 :
bits : 12 - 12 (1 bit)
access : read-only
GPIO45 :
bits : 13 - 13 (1 bit)
access : read-only
GPIO46 :
bits : 14 - 14 (1 bit)
access : read-only
GPIO47 :
bits : 15 - 15 (1 bit)
access : read-only
address_offset : 0x220 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0 :
bits : 0 - 0 (1 bit)
access : read-only
GPIO1 :
bits : 1 - 1 (1 bit)
access : read-only
GPIO2 :
bits : 2 - 2 (1 bit)
access : read-only
GPIO3 :
bits : 3 - 3 (1 bit)
access : read-only
GPIO4 :
bits : 4 - 4 (1 bit)
access : read-only
GPIO5 :
bits : 5 - 5 (1 bit)
access : read-only
GPIO6 :
bits : 6 - 6 (1 bit)
access : read-only
GPIO7 :
bits : 7 - 7 (1 bit)
access : read-only
GPIO8 :
bits : 8 - 8 (1 bit)
access : read-only
GPIO9 :
bits : 9 - 9 (1 bit)
access : read-only
GPIO10 :
bits : 10 - 10 (1 bit)
access : read-only
GPIO11 :
bits : 11 - 11 (1 bit)
access : read-only
GPIO12 :
bits : 12 - 12 (1 bit)
access : read-only
GPIO13 :
bits : 13 - 13 (1 bit)
access : read-only
GPIO14 :
bits : 14 - 14 (1 bit)
access : read-only
GPIO15 :
bits : 15 - 15 (1 bit)
access : read-only
GPIO16 :
bits : 16 - 16 (1 bit)
access : read-only
GPIO17 :
bits : 17 - 17 (1 bit)
access : read-only
GPIO18 :
bits : 18 - 18 (1 bit)
access : read-only
GPIO19 :
bits : 19 - 19 (1 bit)
access : read-only
GPIO20 :
bits : 20 - 20 (1 bit)
access : read-only
GPIO21 :
bits : 21 - 21 (1 bit)
access : read-only
GPIO22 :
bits : 22 - 22 (1 bit)
access : read-only
GPIO23 :
bits : 23 - 23 (1 bit)
access : read-only
GPIO24 :
bits : 24 - 24 (1 bit)
access : read-only
GPIO25 :
bits : 25 - 25 (1 bit)
access : read-only
GPIO26 :
bits : 26 - 26 (1 bit)
access : read-only
GPIO27 :
bits : 27 - 27 (1 bit)
access : read-only
GPIO28 :
bits : 28 - 28 (1 bit)
access : read-only
GPIO29 :
bits : 29 - 29 (1 bit)
access : read-only
GPIO30 :
bits : 30 - 30 (1 bit)
access : read-only
GPIO31 :
bits : 31 - 31 (1 bit)
access : read-only
address_offset : 0x224 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32 :
bits : 0 - 0 (1 bit)
access : read-only
GPIO33 :
bits : 1 - 1 (1 bit)
access : read-only
GPIO34 :
bits : 2 - 2 (1 bit)
access : read-only
GPIO35 :
bits : 3 - 3 (1 bit)
access : read-only
GPIO36 :
bits : 4 - 4 (1 bit)
access : read-only
GPIO37 :
bits : 5 - 5 (1 bit)
access : read-only
GPIO38 :
bits : 6 - 6 (1 bit)
access : read-only
GPIO39 :
bits : 7 - 7 (1 bit)
access : read-only
GPIO40 :
bits : 8 - 8 (1 bit)
access : read-only
GPIO41 :
bits : 9 - 9 (1 bit)
access : read-only
GPIO42 :
bits : 10 - 10 (1 bit)
access : read-only
GPIO43 :
bits : 11 - 11 (1 bit)
access : read-only
GPIO44 :
bits : 12 - 12 (1 bit)
access : read-only
GPIO45 :
bits : 13 - 13 (1 bit)
access : read-only
GPIO46 :
bits : 14 - 14 (1 bit)
access : read-only
GPIO47 :
bits : 15 - 15 (1 bit)
access : read-only
address_offset : 0x228 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0 :
bits : 0 - 0 (1 bit)
access : read-only
GPIO1 :
bits : 1 - 1 (1 bit)
access : read-only
GPIO2 :
bits : 2 - 2 (1 bit)
access : read-only
GPIO3 :
bits : 3 - 3 (1 bit)
access : read-only
GPIO4 :
bits : 4 - 4 (1 bit)
access : read-only
GPIO5 :
bits : 5 - 5 (1 bit)
access : read-only
GPIO6 :
bits : 6 - 6 (1 bit)
access : read-only
GPIO7 :
bits : 7 - 7 (1 bit)
access : read-only
GPIO8 :
bits : 8 - 8 (1 bit)
access : read-only
GPIO9 :
bits : 9 - 9 (1 bit)
access : read-only
GPIO10 :
bits : 10 - 10 (1 bit)
access : read-only
GPIO11 :
bits : 11 - 11 (1 bit)
access : read-only
GPIO12 :
bits : 12 - 12 (1 bit)
access : read-only
GPIO13 :
bits : 13 - 13 (1 bit)
access : read-only
GPIO14 :
bits : 14 - 14 (1 bit)
access : read-only
GPIO15 :
bits : 15 - 15 (1 bit)
access : read-only
GPIO16 :
bits : 16 - 16 (1 bit)
access : read-only
GPIO17 :
bits : 17 - 17 (1 bit)
access : read-only
GPIO18 :
bits : 18 - 18 (1 bit)
access : read-only
GPIO19 :
bits : 19 - 19 (1 bit)
access : read-only
GPIO20 :
bits : 20 - 20 (1 bit)
access : read-only
GPIO21 :
bits : 21 - 21 (1 bit)
access : read-only
GPIO22 :
bits : 22 - 22 (1 bit)
access : read-only
GPIO23 :
bits : 23 - 23 (1 bit)
access : read-only
GPIO24 :
bits : 24 - 24 (1 bit)
access : read-only
GPIO25 :
bits : 25 - 25 (1 bit)
access : read-only
GPIO26 :
bits : 26 - 26 (1 bit)
access : read-only
GPIO27 :
bits : 27 - 27 (1 bit)
access : read-only
GPIO28 :
bits : 28 - 28 (1 bit)
access : read-only
GPIO29 :
bits : 29 - 29 (1 bit)
access : read-only
GPIO30 :
bits : 30 - 30 (1 bit)
access : read-only
GPIO31 :
bits : 31 - 31 (1 bit)
access : read-only
address_offset : 0x22C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32 :
bits : 0 - 0 (1 bit)
access : read-only
GPIO33 :
bits : 1 - 1 (1 bit)
access : read-only
GPIO34 :
bits : 2 - 2 (1 bit)
access : read-only
GPIO35 :
bits : 3 - 3 (1 bit)
access : read-only
GPIO36 :
bits : 4 - 4 (1 bit)
access : read-only
GPIO37 :
bits : 5 - 5 (1 bit)
access : read-only
GPIO38 :
bits : 6 - 6 (1 bit)
access : read-only
GPIO39 :
bits : 7 - 7 (1 bit)
access : read-only
GPIO40 :
bits : 8 - 8 (1 bit)
access : read-only
GPIO41 :
bits : 9 - 9 (1 bit)
access : read-only
GPIO42 :
bits : 10 - 10 (1 bit)
access : read-only
GPIO43 :
bits : 11 - 11 (1 bit)
access : read-only
GPIO44 :
bits : 12 - 12 (1 bit)
access : read-only
GPIO45 :
bits : 13 - 13 (1 bit)
access : read-only
GPIO46 :
bits : 14 - 14 (1 bit)
access : read-only
GPIO47 :
bits : 15 - 15 (1 bit)
access : read-only
Raw Interrupts
address_offset : 0x230 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Raw Interrupts
address_offset : 0x234 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Raw Interrupts
address_offset : 0x238 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Raw Interrupts
address_offset : 0x23C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO30_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO30_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO30_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO30_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO31_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO31_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO31_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO31_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi0_rx
2 : uart1_tx
3 : i2c0_sda
4 : pwm_a_2
5 : siob_proc_4
6 : pio0_4
7 : pio1_4
8 : pio2_4
9 : coresight_tracedata_2
10 : usb_muxing_vbus_detect
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
Raw Interrupts
address_offset : 0x240 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO32_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO32_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO32_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO33_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO33_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO33_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO33_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO34_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO34_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO34_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO34_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO35_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO35_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO35_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO35_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO36_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO36_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO36_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO36_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO37_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO37_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO37_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO37_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO38_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO38_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO38_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO38_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO39_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO39_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO39_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO39_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Raw Interrupts
address_offset : 0x244 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO40_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO40_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO40_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO40_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO41_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO41_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO41_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO41_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO42_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO42_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO42_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO42_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO43_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO43_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO43_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO43_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO44_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO44_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO44_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO44_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO45_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO45_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO45_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO45_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO46_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO46_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO46_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO46_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO47_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO47_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO47_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO47_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Enable for proc0
address_offset : 0x248 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Enable for proc0
address_offset : 0x24C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Enable for proc0
address_offset : 0x250 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Enable for proc0
address_offset : 0x254 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO30_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO30_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO30_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO30_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO31_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO31_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO31_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO31_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Enable for proc0
address_offset : 0x258 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO32_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO32_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO32_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO33_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO33_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO33_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO33_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO34_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO34_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO34_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO34_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO35_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO35_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO35_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO35_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO36_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO36_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO36_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO36_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO37_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO37_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO37_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO37_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO38_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO38_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO38_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO38_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO39_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO39_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO39_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO39_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Enable for proc0
address_offset : 0x25C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO40_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO40_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO40_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO40_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO41_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO41_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO41_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO41_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO42_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO42_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO42_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO42_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO43_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO43_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO43_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO43_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO44_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO44_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO44_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO44_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO45_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO45_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO45_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO45_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO46_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO46_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO46_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO46_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO47_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO47_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO47_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO47_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Force for proc0
address_offset : 0x260 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Force for proc0
address_offset : 0x264 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Force for proc0
address_offset : 0x268 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Force for proc0
address_offset : 0x26C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO30_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO30_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO30_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO30_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO31_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO31_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO31_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO31_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Force for proc0
address_offset : 0x270 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO32_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO32_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO32_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO33_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO33_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO33_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO33_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO34_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO34_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO34_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO34_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO35_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO35_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO35_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO35_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO36_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO36_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO36_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO36_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO37_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO37_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO37_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO37_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO38_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO38_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO38_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO38_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO39_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO39_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO39_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO39_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Force for proc0
address_offset : 0x274 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO40_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO40_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO40_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO40_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO41_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO41_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO41_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO41_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO42_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO42_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO42_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO42_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO43_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO43_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO43_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO43_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO44_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO44_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO44_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO44_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO45_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO45_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO45_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO45_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO46_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO46_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO46_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO46_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO47_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO47_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO47_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO47_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt status after masking & forcing for proc0
address_offset : 0x278 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only
GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only
GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only
GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only
GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only
GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only
GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only
GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only
GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only
GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only
GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only
GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only
GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only
GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only
GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only
GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only
Interrupt status after masking & forcing for proc0
address_offset : 0x27C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only
GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only
GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only
GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only
GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only
GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only
GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only
GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only
GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only
GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only
GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only
GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only
GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only
GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only
GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only
GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
Interrupt status after masking & forcing for proc0
address_offset : 0x280 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only
GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only
GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only
GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only
GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only
GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only
GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only
GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only
GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only
GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only
GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only
GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only
GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only
GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only
GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only
GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only
Interrupt status after masking & forcing for proc0
address_offset : 0x284 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only
GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only
GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only
GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only
GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only
GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only
GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only
GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only
GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only
GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only
GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only
GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only
GPIO30_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO30_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO30_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only
GPIO30_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only
GPIO31_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO31_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO31_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only
GPIO31_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only
Interrupt status after masking & forcing for proc0
address_offset : 0x288 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO32_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO32_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only
GPIO32_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only
GPIO33_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO33_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO33_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only
GPIO33_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only
GPIO34_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO34_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO34_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only
GPIO34_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only
GPIO35_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO35_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO35_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only
GPIO35_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only
GPIO36_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO36_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO36_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only
GPIO36_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only
GPIO37_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO37_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO37_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only
GPIO37_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only
GPIO38_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO38_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO38_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only
GPIO38_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only
GPIO39_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO39_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO39_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only
GPIO39_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only
Interrupt status after masking & forcing for proc0
address_offset : 0x28C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO40_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO40_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO40_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only
GPIO40_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only
GPIO41_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO41_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO41_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only
GPIO41_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only
GPIO42_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO42_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO42_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only
GPIO42_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only
GPIO43_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO43_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO43_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only
GPIO43_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only
GPIO44_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO44_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO44_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only
GPIO44_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only
GPIO45_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO45_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO45_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only
GPIO45_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only
GPIO46_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO46_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO46_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only
GPIO46_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only
GPIO47_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO47_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO47_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only
GPIO47_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only
Interrupt Enable for proc1
address_offset : 0x290 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Enable for proc1
address_offset : 0x294 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Enable for proc1
address_offset : 0x298 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Enable for proc1
address_offset : 0x29C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO30_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO30_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO30_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO30_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO31_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO31_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO31_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO31_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Enable for proc1
address_offset : 0x2A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO32_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO32_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO32_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO33_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO33_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO33_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO33_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO34_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO34_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO34_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO34_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO35_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO35_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO35_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO35_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO36_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO36_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO36_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO36_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO37_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO37_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO37_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO37_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO38_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO38_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO38_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO38_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO39_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO39_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO39_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO39_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Enable for proc1
address_offset : 0x2A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO40_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO40_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO40_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO40_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO41_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO41_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO41_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO41_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO42_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO42_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO42_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO42_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO43_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO43_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO43_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO43_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO44_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO44_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO44_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO44_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO45_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO45_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO45_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO45_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO46_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO46_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO46_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO46_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO47_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO47_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO47_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO47_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Force for proc1
address_offset : 0x2A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Force for proc1
address_offset : 0x2AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Force for proc1
address_offset : 0x2B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Force for proc1
address_offset : 0x2B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO30_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO30_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO30_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO30_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO31_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO31_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO31_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO31_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Force for proc1
address_offset : 0x2B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO32_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO32_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO32_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO33_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO33_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO33_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO33_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO34_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO34_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO34_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO34_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO35_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO35_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO35_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO35_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO36_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO36_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO36_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO36_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO37_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO37_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO37_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO37_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO38_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO38_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO38_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO38_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO39_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO39_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO39_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO39_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Force for proc1
address_offset : 0x2BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO40_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO40_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO40_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO40_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO41_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO41_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO41_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO41_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO42_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO42_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO42_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO42_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO43_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO43_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO43_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO43_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO44_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO44_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO44_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO44_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO45_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO45_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO45_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO45_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO46_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO46_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO46_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO46_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO47_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO47_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO47_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO47_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi0_ss_n
2 : uart1_rx
3 : i2c0_scl
4 : pwm_b_2
5 : siob_proc_5
6 : pio0_5
7 : pio1_5
8 : pio2_5
9 : coresight_tracedata_3
10 : usb_muxing_vbus_en
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
Interrupt status after masking & forcing for proc1
address_offset : 0x2C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only
GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only
GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only
GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only
GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only
GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only
GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only
GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only
GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only
GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only
GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only
GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only
GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only
GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only
GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only
GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only
Interrupt status after masking & forcing for proc1
address_offset : 0x2C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only
GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only
GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only
GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only
GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only
GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only
GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only
GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only
GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only
GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only
GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only
GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only
GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only
GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only
GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only
GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only
Interrupt status after masking & forcing for proc1
address_offset : 0x2C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only
GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only
GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only
GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only
GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only
GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only
GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only
GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only
GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only
GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only
GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only
GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only
GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only
GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only
GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only
GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only
Interrupt status after masking & forcing for proc1
address_offset : 0x2CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only
GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only
GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only
GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only
GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only
GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only
GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only
GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only
GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only
GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only
GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only
GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only
GPIO30_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO30_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO30_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only
GPIO30_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only
GPIO31_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO31_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO31_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only
GPIO31_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only
Interrupt status after masking & forcing for proc1
address_offset : 0x2D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO32_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO32_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only
GPIO32_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only
GPIO33_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO33_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO33_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only
GPIO33_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only
GPIO34_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO34_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO34_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only
GPIO34_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only
GPIO35_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO35_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO35_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only
GPIO35_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only
GPIO36_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO36_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO36_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only
GPIO36_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only
GPIO37_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO37_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO37_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only
GPIO37_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only
GPIO38_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO38_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO38_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only
GPIO38_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only
GPIO39_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO39_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO39_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only
GPIO39_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only
Interrupt status after masking & forcing for proc1
address_offset : 0x2D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO40_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO40_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO40_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only
GPIO40_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only
GPIO41_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO41_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO41_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only
GPIO41_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only
GPIO42_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO42_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO42_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only
GPIO42_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only
GPIO43_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO43_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO43_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only
GPIO43_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only
GPIO44_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO44_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO44_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only
GPIO44_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only
GPIO45_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO45_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO45_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only
GPIO45_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only
GPIO46_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO46_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO46_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only
GPIO46_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only
GPIO47_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO47_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO47_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only
GPIO47_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only
Interrupt Enable for dormant_wake
address_offset : 0x2D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Enable for dormant_wake
address_offset : 0x2DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Enable for dormant_wake
address_offset : 0x2E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Enable for dormant_wake
address_offset : 0x2E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO30_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO30_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO30_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO30_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO31_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO31_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO31_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO31_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Enable for dormant_wake
address_offset : 0x2E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO32_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO32_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO32_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO33_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO33_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO33_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO33_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO34_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO34_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO34_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO34_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO35_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO35_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO35_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO35_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO36_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO36_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO36_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO36_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO37_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO37_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO37_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO37_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO38_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO38_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO38_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO38_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO39_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO39_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO39_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO39_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Enable for dormant_wake
address_offset : 0x2EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO40_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO40_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO40_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO40_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO41_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO41_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO41_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO41_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO42_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO42_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO42_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO42_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO43_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO43_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO43_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO43_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO44_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO44_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO44_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO44_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO45_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO45_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO45_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO45_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO46_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO46_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO46_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO46_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO47_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO47_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO47_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO47_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Force for dormant_wake
address_offset : 0x2F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Force for dormant_wake
address_offset : 0x2F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Force for dormant_wake
address_offset : 0x2F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Force for dormant_wake
address_offset : 0x2FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO30_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO30_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO30_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO30_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO31_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO31_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO31_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO31_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
Interrupt Force for dormant_wake
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO32_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO32_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO32_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO33_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO33_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO33_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO33_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO34_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO34_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO34_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO34_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO35_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO35_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO35_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO35_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO36_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO36_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO36_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO36_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO37_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO37_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO37_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO37_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO38_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO38_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO38_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO38_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO39_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO39_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO39_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO39_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Force for dormant_wake
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO40_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write
GPIO40_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write
GPIO40_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write
GPIO40_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write
GPIO41_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write
GPIO41_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write
GPIO41_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write
GPIO41_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write
GPIO42_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write
GPIO42_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write
GPIO42_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write
GPIO42_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write
GPIO43_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write
GPIO43_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write
GPIO43_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write
GPIO43_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write
GPIO44_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write
GPIO44_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write
GPIO44_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write
GPIO44_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write
GPIO45_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write
GPIO45_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write
GPIO45_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write
GPIO45_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write
GPIO46_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write
GPIO46_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write
GPIO46_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write
GPIO46_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write
GPIO47_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write
GPIO47_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write
GPIO47_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write
GPIO47_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write
Interrupt status after masking & forcing for dormant_wake
address_offset : 0x308 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only
GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only
GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only
GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only
GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only
GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only
GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only
GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only
GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only
GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only
GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only
GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only
GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only
GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only
GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only
GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only
Interrupt status after masking & forcing for dormant_wake
address_offset : 0x30C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only
GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only
GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only
GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only
GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only
GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only
GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only
GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only
GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only
GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only
GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only
GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only
GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only
GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only
GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only
GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only
Interrupt status after masking & forcing for dormant_wake
address_offset : 0x310 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only
GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only
GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only
GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only
GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only
GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only
GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only
GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only
GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only
GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only
GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only
GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only
GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only
GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only
GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only
GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only
Interrupt status after masking & forcing for dormant_wake
address_offset : 0x314 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only
GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only
GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only
GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only
GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only
GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only
GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only
GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only
GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only
GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only
GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only
GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only
GPIO30_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO30_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO30_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only
GPIO30_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only
GPIO31_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO31_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO31_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only
GPIO31_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only
Interrupt status after masking & forcing for dormant_wake
address_offset : 0x318 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO32_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO32_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only
GPIO32_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only
GPIO33_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO33_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO33_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only
GPIO33_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only
GPIO34_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO34_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO34_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only
GPIO34_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only
GPIO35_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO35_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO35_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only
GPIO35_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only
GPIO36_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO36_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO36_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only
GPIO36_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only
GPIO37_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO37_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO37_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only
GPIO37_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only
GPIO38_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO38_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO38_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only
GPIO38_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only
GPIO39_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO39_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO39_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only
GPIO39_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only
Interrupt status after masking & forcing for dormant_wake
address_offset : 0x31C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO40_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only
GPIO40_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only
GPIO40_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only
GPIO40_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only
GPIO41_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only
GPIO41_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only
GPIO41_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only
GPIO41_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only
GPIO42_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only
GPIO42_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only
GPIO42_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only
GPIO42_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only
GPIO43_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only
GPIO43_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only
GPIO43_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only
GPIO43_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only
GPIO44_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only
GPIO44_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only
GPIO44_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only
GPIO44_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only
GPIO45_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only
GPIO45_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only
GPIO45_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only
GPIO45_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only
GPIO46_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only
GPIO46_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only
GPIO46_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only
GPIO46_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only
GPIO47_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only
GPIO47_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only
GPIO47_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only
GPIO47_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi0_sclk
2 : uart1_cts
3 : i2c1_sda
4 : pwm_a_3
5 : siob_proc_6
6 : pio0_6
7 : pio1_6
8 : pio2_6
10 : usb_muxing_overcurr_detect
11 : uart1_tx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi0_tx
2 : uart1_rts
3 : i2c1_scl
4 : pwm_b_3
5 : siob_proc_7
6 : pio0_7
7 : pio1_7
8 : pio2_7
10 : usb_muxing_vbus_detect
11 : uart1_rx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
0 : jtag_tck
1 : spi0_rx
2 : uart0_tx
3 : i2c0_sda
4 : pwm_a_0
5 : siob_proc_0
6 : pio0_0
7 : pio1_0
8 : pio2_0
9 : xip_ss_n_1
10 : usb_muxing_overcurr_detect
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_rx
2 : uart1_tx
3 : i2c0_sda
4 : pwm_a_4
5 : siob_proc_8
6 : pio0_8
7 : pio1_8
8 : pio2_8
9 : xip_ss_n_1
10 : usb_muxing_vbus_en
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_ss_n
2 : uart1_rx
3 : i2c0_scl
4 : pwm_b_4
5 : siob_proc_9
6 : pio0_9
7 : pio1_9
8 : pio2_9
10 : usb_muxing_overcurr_detect
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_sclk
2 : uart1_cts
3 : i2c1_sda
4 : pwm_a_5
5 : siob_proc_10
6 : pio0_10
7 : pio1_10
8 : pio2_10
10 : usb_muxing_vbus_detect
11 : uart1_tx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_tx
2 : uart1_rts
3 : i2c1_scl
4 : pwm_b_5
5 : siob_proc_11
6 : pio0_11
7 : pio1_11
8 : pio2_11
10 : usb_muxing_vbus_en
11 : uart1_rx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
0 : hstx_0
1 : spi1_rx
2 : uart0_tx
3 : i2c0_sda
4 : pwm_a_6
5 : siob_proc_12
6 : pio0_12
7 : pio1_12
8 : pio2_12
9 : clocks_gpin_0
10 : usb_muxing_overcurr_detect
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
0 : hstx_1
1 : spi1_ss_n
2 : uart0_rx
3 : i2c0_scl
4 : pwm_b_6
5 : siob_proc_13
6 : pio0_13
7 : pio1_13
8 : pio2_13
9 : clocks_gpout_0
10 : usb_muxing_vbus_detect
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
0 : hstx_2
1 : spi1_sclk
2 : uart0_cts
3 : i2c1_sda
4 : pwm_a_7
5 : siob_proc_14
6 : pio0_14
7 : pio1_14
8 : pio2_14
9 : clocks_gpin_1
10 : usb_muxing_vbus_en
11 : uart0_tx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
0 : hstx_3
1 : spi1_tx
2 : uart0_rts
3 : i2c1_scl
4 : pwm_b_7
5 : siob_proc_15
6 : pio0_15
7 : pio1_15
8 : pio2_15
9 : clocks_gpout_1
10 : usb_muxing_overcurr_detect
11 : uart0_rx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
0 : hstx_4
1 : spi0_rx
2 : uart0_tx
3 : i2c0_sda
4 : pwm_a_0
5 : siob_proc_16
6 : pio0_16
7 : pio1_16
8 : pio2_16
10 : usb_muxing_vbus_detect
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
0 : hstx_5
1 : spi0_ss_n
2 : uart0_rx
3 : i2c0_scl
4 : pwm_b_0
5 : siob_proc_17
6 : pio0_17
7 : pio1_17
8 : pio2_17
10 : usb_muxing_vbus_en
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
0 : hstx_6
1 : spi0_sclk
2 : uart0_cts
3 : i2c1_sda
4 : pwm_a_1
5 : siob_proc_18
6 : pio0_18
7 : pio1_18
8 : pio2_18
10 : usb_muxing_overcurr_detect
11 : uart0_tx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
0 : hstx_7
1 : spi0_tx
2 : uart0_rts
3 : i2c1_scl
4 : pwm_b_1
5 : siob_proc_19
6 : pio0_19
7 : pio1_19
8 : pio2_19
9 : xip_ss_n_1
10 : usb_muxing_vbus_detect
11 : uart0_rx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi0_rx
2 : uart1_tx
3 : i2c0_sda
4 : pwm_a_2
5 : siob_proc_20
6 : pio0_20
7 : pio1_20
8 : pio2_20
9 : clocks_gpin_0
10 : usb_muxing_vbus_en
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi0_ss_n
2 : uart1_rx
3 : i2c0_scl
4 : pwm_b_2
5 : siob_proc_21
6 : pio0_21
7 : pio1_21
8 : pio2_21
9 : clocks_gpout_0
10 : usb_muxing_overcurr_detect
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi0_sclk
2 : uart1_cts
3 : i2c1_sda
4 : pwm_a_3
5 : siob_proc_22
6 : pio0_22
7 : pio1_22
8 : pio2_22
9 : clocks_gpin_1
10 : usb_muxing_vbus_detect
11 : uart1_tx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi0_tx
2 : uart1_rts
3 : i2c1_scl
4 : pwm_b_3
5 : siob_proc_23
6 : pio0_23
7 : pio1_23
8 : pio2_23
9 : clocks_gpout_1
10 : usb_muxing_vbus_en
11 : uart1_rx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
0 : jtag_tms
1 : spi0_ss_n
2 : uart0_rx
3 : i2c0_scl
4 : pwm_b_0
5 : siob_proc_1
6 : pio0_1
7 : pio1_1
8 : pio2_1
9 : coresight_traceclk
10 : usb_muxing_vbus_detect
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_rx
2 : uart1_tx
3 : i2c0_sda
4 : pwm_a_4
5 : siob_proc_24
6 : pio0_24
7 : pio1_24
8 : pio2_24
9 : clocks_gpout_2
10 : usb_muxing_overcurr_detect
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_ss_n
2 : uart1_rx
3 : i2c0_scl
4 : pwm_b_4
5 : siob_proc_25
6 : pio0_25
7 : pio1_25
8 : pio2_25
9 : clocks_gpout_3
10 : usb_muxing_vbus_detect
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_sclk
2 : uart1_cts
3 : i2c1_sda
4 : pwm_a_5
5 : siob_proc_26
6 : pio0_26
7 : pio1_26
8 : pio2_26
10 : usb_muxing_vbus_en
11 : uart1_tx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_tx
2 : uart1_rts
3 : i2c1_scl
4 : pwm_b_5
5 : siob_proc_27
6 : pio0_27
7 : pio1_27
8 : pio2_27
10 : usb_muxing_overcurr_detect
11 : uart1_rx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_rx
2 : uart0_tx
3 : i2c0_sda
4 : pwm_a_6
5 : siob_proc_28
6 : pio0_28
7 : pio1_28
8 : pio2_28
10 : usb_muxing_vbus_detect
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_ss_n
2 : uart0_rx
3 : i2c0_scl
4 : pwm_b_6
5 : siob_proc_29
6 : pio0_29
7 : pio1_29
8 : pio2_29
10 : usb_muxing_vbus_en
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_sclk
2 : uart0_cts
3 : i2c1_sda
4 : pwm_a_7
5 : siob_proc_30
6 : pio0_30
7 : pio1_30
8 : pio2_30
10 : usb_muxing_overcurr_detect
11 : uart0_tx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only
OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only
INFROMPAD : input signal from pad, before filtering and override are applied
bits : 17 - 17 (1 bit)
access : read-only
IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUNCSEL : 0-31 -> selects pin function according to the gpio table
31 == NULL
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
1 : spi1_tx
2 : uart0_rts
3 : i2c1_scl
4 : pwm_b_7
5 : siob_proc_31
6 : pio0_31
7 : pio1_31
8 : pio2_31
10 : usb_muxing_vbus_detect
11 : uart0_rx
31 : null
End of enumeration elements list.
OUTOVER :
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output from peripheral signal selected by funcsel
1 : INVERT
drive output from inverse of peripheral signal selected by funcsel
2 : LOW
drive output low
3 : HIGH
drive output high
End of enumeration elements list.
OEOVER :
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
drive output enable from peripheral signal selected by funcsel
1 : INVERT
drive output enable from inverse of peripheral signal selected by funcsel
2 : DISABLE
disable output
3 : ENABLE
enable output
End of enumeration elements list.
INOVER :
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the peri input
1 : INVERT
invert the peri input
2 : LOW
drive peri input low
3 : HIGH
drive peri input high
End of enumeration elements list.
IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : NORMAL
don't invert the interrupt
1 : INVERT
invert the interrupt
2 : LOW
drive interrupt low
3 : HIGH
drive interrupt high
End of enumeration elements list.
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