WATCHDOG

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2C byte (0x0)
mem_usage : registers
protection :

Registers

CTRL

SCRATCH1

SCRATCH2

SCRATCH3

SCRATCH4

SCRATCH5

SCRATCH6

SCRATCH7

LOAD

REASON

SCRATCH0


CTRL

Watchdog control The rst_wdsel register determines which subsystems are reset when the watchdog is triggered. The watchdog can be triggered in software.
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIME PAUSE_JTAG PAUSE_DBG0 PAUSE_DBG1 ENABLE TRIGGER

TIME : Indicates the time in usec before a watchdog reset will be triggered
bits : 0 - 23 (24 bit)
access : read-only

PAUSE_JTAG : Pause the watchdog timer when JTAG is accessing the bus fabric
bits : 24 - 24 (1 bit)
access : read-write

PAUSE_DBG0 : Pause the watchdog timer when processor 0 is in debug mode
bits : 25 - 25 (1 bit)
access : read-write

PAUSE_DBG1 : Pause the watchdog timer when processor 1 is in debug mode
bits : 26 - 26 (1 bit)
access : read-write

ENABLE : When not enabled the watchdog timer is paused
bits : 30 - 30 (1 bit)
access : read-write

TRIGGER : Trigger a watchdog reset
bits : 31 - 31 (1 bit)
access : write-only


SCRATCH1

Scratch register. Information persists through soft reset of the chip.
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCRATCH1 SCRATCH1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCRATCH1

SCRATCH1 :
bits : 0 - 31 (32 bit)
access : read-write


SCRATCH2

Scratch register. Information persists through soft reset of the chip.
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCRATCH2 SCRATCH2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCRATCH2

SCRATCH2 :
bits : 0 - 31 (32 bit)
access : read-write


SCRATCH3

Scratch register. Information persists through soft reset of the chip.
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCRATCH3 SCRATCH3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCRATCH3

SCRATCH3 :
bits : 0 - 31 (32 bit)
access : read-write


SCRATCH4

Scratch register. Information persists through soft reset of the chip.
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCRATCH4 SCRATCH4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCRATCH4

SCRATCH4 :
bits : 0 - 31 (32 bit)
access : read-write


SCRATCH5

Scratch register. Information persists through soft reset of the chip.
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCRATCH5 SCRATCH5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCRATCH5

SCRATCH5 :
bits : 0 - 31 (32 bit)
access : read-write


SCRATCH6

Scratch register. Information persists through soft reset of the chip.
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCRATCH6 SCRATCH6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCRATCH6

SCRATCH6 :
bits : 0 - 31 (32 bit)
access : read-write


SCRATCH7

Scratch register. Information persists through soft reset of the chip.
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCRATCH7 SCRATCH7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCRATCH7

SCRATCH7 :
bits : 0 - 31 (32 bit)
access : read-write


LOAD

Load the watchdog timer. The maximum setting is 0xffffff which corresponds to approximately 16 seconds.
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOAD LOAD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOAD

LOAD :
bits : 0 - 23 (24 bit)
access : write-only


REASON

Logs the reason for the last reset. Both bits are zero for the case of a hardware reset. Additionally, as of RP2350, a debugger warm reset of either core (SYSRESETREQ or hartreset) will also clear the watchdog reason register, so that software loaded under the debugger following a watchdog timeout will not continue to see the timeout condition.
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

REASON REASON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIMER FORCE

TIMER :
bits : 0 - 0 (1 bit)
access : read-only

FORCE :
bits : 1 - 1 (1 bit)
access : read-only


SCRATCH0

Scratch register. Information persists through soft reset of the chip.
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCRATCH0 SCRATCH0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCRATCH0

SCRATCH0 :
bits : 0 - 31 (32 bit)
access : read-write



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