TRNG

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1EC byte (0x0)
mem_usage : registers
protection :

Registers

RNG_IMR

RNG_ISR

RNG_ICR

TRNG_CONFIG

TRNG_VALID

EHR_DATA0

EHR_DATA1

EHR_DATA2

EHR_DATA3

EHR_DATA4

EHR_DATA5

RND_SOURCE_ENABLE

SAMPLE_CNT1

AUTOCORR_STATISTIC

TRNG_DEBUG_CONTROL

TRNG_SW_RESET

RNG_DEBUG_EN_INPUT

TRNG_BUSY

RST_BITS_COUNTER

RNG_VERSION

RNG_BIST_CNTR_0

RNG_BIST_CNTR_1

RNG_BIST_CNTR_2


RNG_IMR

Interrupt masking.
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RNG_IMR RNG_IMR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EHR_VALID_INT_MASK AUTOCORR_ERR_INT_MASK CRNGT_ERR_INT_MASK VN_ERR_INT_MASK RESERVED

EHR_VALID_INT_MASK : 1'b1-mask interrupt, no interrupt will be generated. See RNG_ISR for an explanation on this interrupt.
bits : 0 - 0 (1 bit)
access : read-write

AUTOCORR_ERR_INT_MASK : 1'b1-mask interrupt, no interrupt will be generated. See RNG_ISR for an explanation on this interrupt.
bits : 1 - 1 (1 bit)
access : read-write

CRNGT_ERR_INT_MASK : 1'b1-mask interrupt, no interrupt will be generated. See RNG_ISR for an explanation on this interrupt.
bits : 2 - 2 (1 bit)
access : read-write

VN_ERR_INT_MASK : 1'b1-mask interrupt, no interrupt will be generated. See RNG_ISR for an explanation on this interrupt.
bits : 3 - 3 (1 bit)
access : read-write

RESERVED : RESERVED
bits : 4 - 31 (28 bit)
access : read-only


RNG_ISR

RNG status register. If corresponding RNG_IMR bit is unmasked, an interrupt will be generated.
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RNG_ISR RNG_ISR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EHR_VALID AUTOCORR_ERR CRNGT_ERR VN_ERR RESERVED

EHR_VALID : 1'b1 indicates that 192 bits have been collected in the RNG, and are ready to be read.
bits : 0 - 0 (1 bit)
access : read-only

AUTOCORR_ERR : 1'b1 indicates Autocorrelation test failed four times in a row. When set, RNG cease from functioning until next reset.
bits : 1 - 1 (1 bit)
access : read-only

CRNGT_ERR : 1'b1 indicates CRNGT in the RNG test failed. Failure occurs when two consecutive blocks of 16 collected bits are equal.
bits : 2 - 2 (1 bit)
access : read-only

VN_ERR : 1'b1 indicates Von Neuman error. Error in von Neuman occurs if 32 consecutive collected bits are identical, ZERO or ONE.
bits : 3 - 3 (1 bit)
access : read-only

RESERVED : RESERVED
bits : 4 - 31 (28 bit)
access : read-only


RNG_ICR

Interrupt/status bit clear Register.
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RNG_ICR RNG_ICR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EHR_VALID AUTOCORR_ERR CRNGT_ERR VN_ERR RESERVED

EHR_VALID : Write 1'b1 - clear corresponding bit in RNG_ISR.
bits : 0 - 0 (1 bit)
access : read-write

AUTOCORR_ERR : Cannot be cleared by SW! Only RNG reset clears this bit.
bits : 1 - 1 (1 bit)
access : read-write

CRNGT_ERR : Write 1'b1 - clear corresponding bit in RNG_ISR.
bits : 2 - 2 (1 bit)
access : read-write

VN_ERR : Write 1'b1 - clear corresponding bit in RNG_ISR.
bits : 3 - 3 (1 bit)
access : read-write

RESERVED : RESERVED
bits : 4 - 31 (28 bit)
access : read-only


TRNG_CONFIG

Selecting the inverter-chain length.
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TRNG_CONFIG TRNG_CONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RND_SRC_SEL RESERVED

RND_SRC_SEL : Selects the number of inverters (out of four possible selections) in the ring oscillator (the entropy source).
bits : 0 - 1 (2 bit)
access : read-write

RESERVED : RESERVED
bits : 2 - 31 (30 bit)
access : read-only


TRNG_VALID

192 bit collection indication.
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TRNG_VALID TRNG_VALID read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EHR_VALID RESERVED

EHR_VALID : 1'b1 indicates that collection of bits in the RNG is completed, and data can be read from EHR_DATA register.
bits : 0 - 0 (1 bit)
access : read-only

RESERVED : RESERVED
bits : 1 - 31 (31 bit)
access : read-only


EHR_DATA0

RNG collected bits.
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EHR_DATA0 EHR_DATA0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EHR_DATA0

EHR_DATA0 : Bits [31:0] of Entropy Holding Register (EHR) - RNG output register
bits : 0 - 31 (32 bit)
access : read-only


EHR_DATA1

RNG collected bits.
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EHR_DATA1 EHR_DATA1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EHR_DATA1

EHR_DATA1 : Bits [63:32] of Entropy Holding Register (EHR) - RNG output register
bits : 0 - 31 (32 bit)
access : read-only


EHR_DATA2

RNG collected bits.
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EHR_DATA2 EHR_DATA2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EHR_DATA2

EHR_DATA2 : Bits [95:64] of Entropy Holding Register (EHR) - RNG output register
bits : 0 - 31 (32 bit)
access : read-only


EHR_DATA3

RNG collected bits.
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EHR_DATA3 EHR_DATA3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EHR_DATA3

EHR_DATA3 : Bits [127:96] of Entropy Holding Register (EHR) - RNG output register
bits : 0 - 31 (32 bit)
access : read-only


EHR_DATA4

RNG collected bits.
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EHR_DATA4 EHR_DATA4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EHR_DATA4

EHR_DATA4 : Bits [159:128] of Entropy Holding Register (EHR) - RNG output register
bits : 0 - 31 (32 bit)
access : read-only


EHR_DATA5

RNG collected bits.
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EHR_DATA5 EHR_DATA5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EHR_DATA5

EHR_DATA5 : Bits [191:160] of Entropy Holding Register (EHR) - RNG output register
bits : 0 - 31 (32 bit)
access : read-only


RND_SOURCE_ENABLE

Enable signal for the random source.
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RND_SOURCE_ENABLE RND_SOURCE_ENABLE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RND_SRC_EN RESERVED

RND_SRC_EN : * 1'b1 - entropy source is enabled. *1'b0 - entropy source is disabled
bits : 0 - 0 (1 bit)
access : read-write

RESERVED : RESERVED
bits : 1 - 31 (31 bit)
access : read-only


SAMPLE_CNT1

Counts clocks between sampling of random bit.
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SAMPLE_CNT1 SAMPLE_CNT1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SAMPLE_CNTR1

SAMPLE_CNTR1 : Sets the number of rng_clk cycles between two consecutive ring oscillator samples. Note! If the Von-Neuman is bypassed, the minimum value for sample counter must not be less then decimal seventeen
bits : 0 - 31 (32 bit)
access : read-write


AUTOCORR_STATISTIC

Statistic about Autocorrelation test activations.
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AUTOCORR_STATISTIC AUTOCORR_STATISTIC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AUTOCORR_TRYS AUTOCORR_FAILS RESERVED

AUTOCORR_TRYS : Count each time an autocorrelation test starts. Any write to the register reset the counter. Stop collecting statistic if one of the counters reached the limit.
bits : 0 - 13 (14 bit)
access : read-write

AUTOCORR_FAILS : Count each time an autocorrelation test fails. Any write to the register reset the counter. Stop collecting statistic if one of the counters reached the limit.
bits : 14 - 21 (8 bit)
access : read-write

RESERVED : RESERVED
bits : 22 - 31 (10 bit)
access : read-only


TRNG_DEBUG_CONTROL

Debug register.
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TRNG_DEBUG_CONTROL TRNG_DEBUG_CONTROL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED VNC_BYPASS TRNG_CRNGT_BYPASS AUTO_CORRELATE_BYPASS

RESERVED : N/A
bits : 0 - 0 (1 bit)
access : read-only

VNC_BYPASS : When set, the Von-Neuman balancer is bypassed (including the 32 consecutive bits test).
bits : 1 - 1 (1 bit)
access : read-write

TRNG_CRNGT_BYPASS : When set, the CRNGT test in the RNG is bypassed.
bits : 2 - 2 (1 bit)
access : read-write

AUTO_CORRELATE_BYPASS : When set, the autocorrelation test in the TRNG module is bypassed.
bits : 3 - 3 (1 bit)
access : read-write


TRNG_SW_RESET

Generate internal SW reset within the RNG block.
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TRNG_SW_RESET TRNG_SW_RESET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRNG_SW_RESET RESERVED

TRNG_SW_RESET : Writing 1'b1 to this register causes an internal RNG reset.
bits : 0 - 0 (1 bit)
access : read-write

RESERVED : RESERVED
bits : 1 - 31 (31 bit)
access : read-only


RNG_DEBUG_EN_INPUT

Enable the RNG debug mode
address_offset : 0x1B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RNG_DEBUG_EN_INPUT RNG_DEBUG_EN_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RNG_DEBUG_EN RESERVED

RNG_DEBUG_EN : * 1'b1 - debug mode is enabled. *1'b0 - debug mode is disabled
bits : 0 - 0 (1 bit)
access : read-write

RESERVED : RESERVED
bits : 1 - 31 (31 bit)
access : read-only


TRNG_BUSY

RNG Busy indication.
address_offset : 0x1B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TRNG_BUSY TRNG_BUSY read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRNG_BUSY RESERVED

TRNG_BUSY : Reflects rng_busy status.
bits : 0 - 0 (1 bit)
access : read-only

RESERVED : RESERVED
bits : 1 - 31 (31 bit)
access : read-only


RST_BITS_COUNTER

Reset the counter of collected bits in the RNG.
address_offset : 0x1BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RST_BITS_COUNTER RST_BITS_COUNTER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RST_BITS_COUNTER RESERVED

RST_BITS_COUNTER : Writing any value to this address will reset the bits counter and RNG valid registers. RND_SORCE_ENABLE register must be unset in order for the reset to take place.
bits : 0 - 0 (1 bit)
access : read-write

RESERVED : RESERVED
bits : 1 - 31 (31 bit)
access : read-only


RNG_VERSION

Displays the version settings of the TRNG.
address_offset : 0x1C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RNG_VERSION RNG_VERSION read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EHR_WIDTH_192 CRNGT_EXISTS AUTOCORR_EXISTS TRNG_TESTS_BYPASS_EN PRNG_EXISTS KAT_EXISTS RESEEDING_EXISTS RNG_USE_5_SBOXES RESERVED

EHR_WIDTH_192 : * 1'b1 - 192-bit EHR. *1'b0 - 128-bit EHR
bits : 0 - 0 (1 bit)
access : read-only

CRNGT_EXISTS : * 1'b1 - Exists. *1'b0 - Does not exist
bits : 1 - 1 (1 bit)
access : read-only

AUTOCORR_EXISTS : * 1'b1 - Exists. *1'b0 - Does not exist
bits : 2 - 2 (1 bit)
access : read-only

TRNG_TESTS_BYPASS_EN : * 1'b1 - Exists. *1'b0 - Does not exist
bits : 3 - 3 (1 bit)
access : read-only

PRNG_EXISTS : * 1'b1 - Exists. *1'b0 - Does not exist
bits : 4 - 4 (1 bit)
access : read-only

KAT_EXISTS : * 1'b1 - Exists. *1'b0 - Does not exist
bits : 5 - 5 (1 bit)
access : read-only

RESEEDING_EXISTS : * 1'b1 - Exists. *1'b0 - Does not exist
bits : 6 - 6 (1 bit)
access : read-only

RNG_USE_5_SBOXES : * 1'b1 - 5 SBOX AES. *1'b0 - 20 SBOX AES
bits : 7 - 7 (1 bit)
access : read-only

RESERVED : RESERVED
bits : 8 - 31 (24 bit)
access : read-only


RNG_BIST_CNTR_0

Collected BIST results.
address_offset : 0x1E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RNG_BIST_CNTR_0 RNG_BIST_CNTR_0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ROSC_CNTR_VAL RESERVED

ROSC_CNTR_VAL : Reflects the results of RNG BIST counter.
bits : 0 - 21 (22 bit)
access : read-only

RESERVED : RESERVED
bits : 22 - 31 (10 bit)
access : read-only


RNG_BIST_CNTR_1

Collected BIST results.
address_offset : 0x1E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RNG_BIST_CNTR_1 RNG_BIST_CNTR_1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ROSC_CNTR_VAL RESERVED

ROSC_CNTR_VAL : Reflects the results of RNG BIST counter.
bits : 0 - 21 (22 bit)
access : read-only

RESERVED : RESERVED
bits : 22 - 31 (10 bit)
access : read-only


RNG_BIST_CNTR_2

Collected BIST results.
address_offset : 0x1E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RNG_BIST_CNTR_2 RNG_BIST_CNTR_2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ROSC_CNTR_VAL RESERVED

ROSC_CNTR_VAL : Reflects the results of RNG BIST counter.
bits : 0 - 21 (22 bit)
access : read-only

RESERVED : RESERVED
bits : 22 - 31 (10 bit)
access : read-only



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