Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x174 byte (0x0)
mem_usage : registers
protection :
Software lock register for page 0.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 4.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Dispatch instructions to the SBPI interface, used for programming the OTP fuses.
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SHORT_WDATA : wdata to be used only when payload_size_m1=0
bits : 0 - 7 (8 bit)
access : read-write
CMD :
bits : 8 - 15 (8 bit)
access : read-write
TARGET : Instruction target, it can be PMC (0x3a) or DAP (0x02)
bits : 16 - 23 (8 bit)
access : read-write
PAYLOAD_SIZE_M1 : Instruction payload size in bytes minus 1
bits : 24 - 27 (4 bit)
access : read-write
HAS_PAYLOAD : Instruction has payload (data to be written or to be read)
bits : 28 - 28 (1 bit)
access : read-write
IS_WR : Payload type is write
bits : 29 - 29 (1 bit)
access : read-write
EXEC : Execute instruction
bits : 30 - 30 (1 bit)
access : write-only
SBPI write payload bytes 3..0
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SBPI_WDATA_0 :
bits : 0 - 31 (32 bit)
access : read-write
SBPI write payload bytes 7..4
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SBPI_WDATA_1 :
bits : 0 - 31 (32 bit)
access : read-write
SBPI write payload bytes 11..8
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SBPI_WDATA_2 :
bits : 0 - 31 (32 bit)
access : read-write
SBPI write payload bytes 15..12
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SBPI_WDATA_3 :
bits : 0 - 31 (32 bit)
access : read-write
Read payload bytes 3..0. Once read, the data in the register will automatically clear to 0.
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SBPI_RDATA_0 :
bits : 0 - 31 (32 bit)
access : read-only
Read payload bytes 7..4. Once read, the data in the register will automatically clear to 0.
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SBPI_RDATA_1 :
bits : 0 - 31 (32 bit)
access : read-only
Read payload bytes 11..8. Once read, the data in the register will automatically clear to 0.
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SBPI_RDATA_2 :
bits : 0 - 31 (32 bit)
access : read-only
Read payload bytes 15..12. Once read, the data in the register will automatically clear to 0.
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SBPI_RDATA_3 :
bits : 0 - 31 (32 bit)
access : read-only
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RDATA_VLD : Read command has returned data
bits : 0 - 0 (1 bit)
access : read-write
INSTR_DONE : Last instruction done
bits : 4 - 4 (1 bit)
access : read-write
INSTR_MISS : Last instruction missed (dropped), as the previous has not finished running
bits : 8 - 8 (1 bit)
access : read-write
FLAG : SBPI flag
bits : 12 - 12 (1 bit)
access : read-only
MISO : SBPI MISO (master in - slave out): response from SBPI
bits : 16 - 23 (8 bit)
access : read-only
Controls for APB data read interface (USER interface)
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DCTRL : 1 enables USER interface 0 disables USER interface (enables SBPI).
This bit must be cleared before performing any SBPI access, such as when programming the OTP. The APB data read interface (USER interface) will be inaccessible during this time, and will return a bus error if any read is attempted.
bits : 0 - 0 (1 bit)
access : read-write
PD : Power-down 1 disables current reference. Must be 0 to read data from the OTP.
bits : 4 - 4 (1 bit)
access : read-write
Debug for OTP power-on state machine
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PSM_DONE : PSM done status flag
bits : 0 - 0 (1 bit)
access : read-only
BOOT_DONE : PSM boot done status flag
bits : 1 - 1 (1 bit)
access : read-only
ROSC_UP_SEEN : Ring oscillator was seen up and running
bits : 2 - 2 (1 bit)
access : read-write
ROSC_UP : Ring oscillator is up and running
bits : 3 - 3 (1 bit)
access : read-only
PSM_STATE : Monitor the PSM FSM's state
bits : 4 - 7 (4 bit)
access : read-only
CUSTOMER_RMA_FLAG : The chip is in RMA mode
bits : 12 - 12 (1 bit)
access : read-only
During BIST, count address locations that have at least one leaky bit
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT : Number of locations that have at least one leaky bit. Note: This count is true only if the BIST was initiated without the fix option.
bits : 0 - 12 (13 bit)
access : read-only
CNT_MAX : The cnt_fail flag will be set if the number of leaky locations exceeds this number
bits : 16 - 27 (12 bit)
access : read-write
CNT_ENA : Enable the counter before the BIST function is initiated
bits : 28 - 28 (1 bit)
access : read-write
CNT_CLR : Clear counter before use
bits : 29 - 29 (1 bit)
access : write-only
CNT_FAIL : Flag if the count of address locations with at least one leaky bit exceeds cnt_max
bits : 30 - 30 (1 bit)
access : read-only
Word 0 (bits 31..0) of the key. Write only, read returns 0x0
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CRT_KEY_W0 :
bits : 0 - 31 (32 bit)
access : write-only
Word 1 (bits 63..32) of the key. Write only, read returns 0x0
address_offset : 0x13C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CRT_KEY_W1 :
bits : 0 - 31 (32 bit)
access : write-only
Software lock register for page 5.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Word 2 (bits 95..64) of the key. Write only, read returns 0x0
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CRT_KEY_W2 :
bits : 0 - 31 (32 bit)
access : write-only
Word 3 (bits 127..96) of the key. Write only, read returns 0x0
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CRT_KEY_W3 :
bits : 0 - 31 (32 bit)
access : write-only
Quickly check values of critical flags read during boot up
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECURE_BOOT_ENABLE :
bits : 0 - 0 (1 bit)
access : read-only
SECURE_DEBUG_DISABLE :
bits : 1 - 1 (1 bit)
access : read-only
DEBUG_DISABLE :
bits : 2 - 2 (1 bit)
access : read-only
DEFAULT_ARCHSEL :
bits : 3 - 3 (1 bit)
access : read-only
GLITCH_DETECTOR_ENABLE :
bits : 4 - 4 (1 bit)
access : read-only
GLITCH_DETECTOR_SENS :
bits : 5 - 6 (2 bit)
access : read-only
ARM_DISABLE :
bits : 16 - 16 (1 bit)
access : read-only
RISCV_DISABLE :
bits : 17 - 17 (1 bit)
access : read-only
Which keys were valid (enrolled) at boot time
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KEY_VALID :
bits : 0 - 7 (8 bit)
access : read-only
Enable a debug feature that has been disabled. Debug features are disabled if one of the relevant critical boot flags is set in OTP (DEBUG_DISABLE or SECURE_DEBUG_DISABLE), OR if a debug key is marked valid in OTP, and the matching key value has not been supplied over SWD.
Specifically:
- The DEBUG_DISABLE flag disables all debug features. This can be fully overridden by setting all bits of this register.
- The SECURE_DEBUG_DISABLE flag disables secure processor debug. This can be fully overridden by setting the PROC0_SECURE and PROC1_SECURE bits of this register.
- If a single debug key has been registered, and no matching key value has been supplied over SWD, then all debug features are disabled. This can be fully overridden by setting all bits of this register.
- If both debug keys have been registered, and the Non-secure key's value (key 6) has been supplied over SWD, secure processor debug is disabled. This can be fully overridden by setting the PROC0_SECURE and PROC1_SECURE bits of this register.
- If both debug keys have been registered, and the Secure key's value (key 5) has been supplied over SWD, then no debug features are disabled by the key mechanism. However, note that in this case debug features may still be disabled by the critical boot flags.
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROC0 : Enable core 0's Mem-AP if it is currently disabled.
The Mem-AP is disabled by default if either of the debug disable critical flags is set, or if at least one debug key has been enrolled and the least secure of these enrolled key values has not been provided over SWD.
Note also that core Mem-APs are unconditionally disabled when a core is switched to RISC-V mode (by setting the ARCHSEL bit and performing a warm reset of the core).
bits : 0 - 0 (1 bit)
access : read-write
PROC0_SECURE : Permit core 0's Mem-AP to generate Secure accesses, assuming it is enabled at all. Also enable secure debug of core 0 (SPIDEN and SPNIDEN).
Secure debug of core 0 is disabled by default if the secure debug disable critical flag is set, or if at least one debug key has been enrolled and the most secure of these enrolled key values not yet provided over SWD.
Note also that core Mem-APs are unconditionally disabled when a core is switched to RISC-V mode (by setting the ARCHSEL bit and performing a warm reset of the core).
bits : 1 - 1 (1 bit)
access : read-write
PROC1 : Enable core 1's Mem-AP if it is currently disabled.
The Mem-AP is disabled by default if either of the debug disable critical flags is set, or if at least one debug key has been enrolled and the least secure of these enrolled key values has not been provided over SWD.
bits : 2 - 2 (1 bit)
access : read-write
PROC1_SECURE : Permit core 1's Mem-AP to generate Secure accesses, assuming it is enabled at all. Also enable secure debug of core 1 (SPIDEN and SPNIDEN).
Secure debug of core 1 is disabled by default if the secure debug disable critical flag is set, or if at least one debug key has been enrolled and the most secure of these enrolled key values not yet provided over SWD.
bits : 3 - 3 (1 bit)
access : read-write
MISC : Enable other debug components. Specifically, the CTI, and the APB-AP used to access the RISC-V Debug Module.
These components are disabled by default if either of the debug disable critical flags is set, or if at least one debug key has been enrolled and the least secure of these enrolled key values has not been provided over SWD.
bits : 8 - 8 (1 bit)
access : read-write
Write 1s to lock corresponding bits in DEBUGEN. This register is reset by the processor cold reset.
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROC0 : Write 1 to lock the PROC0 bit of DEBUGEN. Can't be cleared once set.
bits : 0 - 0 (1 bit)
access : read-write
PROC0_SECURE : Write 1 to lock the PROC0_SECURE bit of DEBUGEN. Can't be cleared once set.
bits : 1 - 1 (1 bit)
access : read-write
PROC1 : Write 1 to lock the PROC1 bit of DEBUGEN. Can't be cleared once set.
bits : 2 - 2 (1 bit)
access : read-write
PROC1_SECURE : Write 1 to lock the PROC1_SECURE bit of DEBUGEN. Can't be cleared once set.
bits : 3 - 3 (1 bit)
access : read-write
MISC : Write 1 to lock the MISC bit of DEBUGEN. Can't be cleared once set.
bits : 8 - 8 (1 bit)
access : read-write
Architecture select (Arm/RISC-V). The default and allowable values of this register are constrained by the critical boot flags.
This register is reset by the earliest reset in the switched core power domain (before a processor cold reset).
Cores sample their architecture select signal on a warm reset. The source of the warm reset could be the system power-up state machine, the watchdog timer, Arm SYSRESETREQ or from RISC-V hartresetreq.
Note that when an Arm core is deselected, its cold reset domain is also held in reset, since in particular the SYSRESETREQ bit becomes inaccessible once the core is deselected. Note also the RISC-V cores do not have a cold reset domain, since their corresponding controls are located in the Debug Module.
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CORE0 : Select architecture for core 0.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : arm
Switch core 0 to Arm (Cortex-M33)
1 : riscv
Switch core 0 to RISC-V (Hazard3)
End of enumeration elements list.
CORE1 : Select architecture for core 1.
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : arm
Switch core 1 to Arm (Cortex-M33)
1 : riscv
Switch core 1 to RISC-V (Hazard3)
End of enumeration elements list.
Get the current architecture select state of each core. Cores sample the current value of the ARCHSEL register when their warm reset is released, at which point the corresponding bit in this register will also update.
address_offset : 0x15C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CORE0 : Current architecture for core 0. Updated on processor warm reset.
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
0 : arm
Core 0 is currently Arm (Cortex-M33)
1 : riscv
Core 0 is currently RISC-V (Hazard3)
End of enumeration elements list.
CORE1 : Current architecture for core 0. Updated on processor warm reset.
bits : 1 - 1 (1 bit)
access : read-only
Enumeration:
0 : arm
Core 1 is currently Arm (Cortex-M33)
1 : riscv
Core 1 is currently RISC-V (Hazard3)
End of enumeration elements list.
Tell the bootrom to ignore scratch register boot vectors (both power manager and watchdog) on the next power up.
If an early boot stage has soft-locked some OTP pages in order to protect their contents from later stages, there is a risk that Secure code running at a later stage can unlock the pages by performing a watchdog reset that resets the OTP.
This register can be used to ensure that the bootloader runs as normal on the next power up, preventing Secure code at a later stage from accessing OTP in its unlocked state.
Should be used in conjunction with the power manager BOOTDIS register.
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NOW : When the core is powered down, the current value of BOOTDIS_NEXT is OR'd into BOOTDIS_NOW, and BOOTDIS_NEXT is cleared.
The bootrom checks this flag before reading the boot scratch registers. If it is set, the bootrom clears it, and ignores the BOOT registers. This prevents Secure software from diverting the boot path before a bootloader has had the chance to soft lock OTP pages containing sensitive data.
bits : 0 - 0 (1 bit)
access : read-write
NEXT : This flag always ORs writes into its current contents. It can be set but not cleared by software.
The BOOTDIS_NEXT bit is OR'd into the BOOTDIS_NOW bit when the core is powered down. Simultaneously, the BOOTDIS_NEXT bit is cleared. Setting this bit means that the boot scratch registers will be ignored following the next core power down.
This flag should be set by an early boot stage that has soft-locked OTP pages, to prevent later stages from unlocking it via watchdog reset.
bits : 1 - 1 (1 bit)
access : read-write
Raw Interrupts
address_offset : 0x164 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SBPI_FLAG_N :
bits : 0 - 0 (1 bit)
access : read-only
SBPI_WR_FAIL :
bits : 1 - 1 (1 bit)
access : read-write
APB_DCTRL_FAIL :
bits : 2 - 2 (1 bit)
access : read-write
APB_RD_SEC_FAIL :
bits : 3 - 3 (1 bit)
access : read-write
APB_RD_NSEC_FAIL :
bits : 4 - 4 (1 bit)
access : read-write
Interrupt Enable
address_offset : 0x168 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SBPI_FLAG_N :
bits : 0 - 0 (1 bit)
access : read-write
SBPI_WR_FAIL :
bits : 1 - 1 (1 bit)
access : read-write
APB_DCTRL_FAIL :
bits : 2 - 2 (1 bit)
access : read-write
APB_RD_SEC_FAIL :
bits : 3 - 3 (1 bit)
access : read-write
APB_RD_NSEC_FAIL :
bits : 4 - 4 (1 bit)
access : read-write
Interrupt Force
address_offset : 0x16C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SBPI_FLAG_N :
bits : 0 - 0 (1 bit)
access : read-write
SBPI_WR_FAIL :
bits : 1 - 1 (1 bit)
access : read-write
APB_DCTRL_FAIL :
bits : 2 - 2 (1 bit)
access : read-write
APB_RD_SEC_FAIL :
bits : 3 - 3 (1 bit)
access : read-write
APB_RD_NSEC_FAIL :
bits : 4 - 4 (1 bit)
access : read-write
Interrupt status after masking & forcing
address_offset : 0x170 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SBPI_FLAG_N :
bits : 0 - 0 (1 bit)
access : read-only
SBPI_WR_FAIL :
bits : 1 - 1 (1 bit)
access : read-only
APB_DCTRL_FAIL :
bits : 2 - 2 (1 bit)
access : read-only
APB_RD_SEC_FAIL :
bits : 3 - 3 (1 bit)
access : read-only
APB_RD_NSEC_FAIL :
bits : 4 - 4 (1 bit)
access : read-only
Software lock register for page 6.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 7.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 8.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 9.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 10.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 11.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 12.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 13.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 14.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 15.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 1.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 16.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 17.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 18.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 19.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 20.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 21.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 22.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 23.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 24.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 25.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 26.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 27.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 28.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 29.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 30.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 31.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 2.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 32.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 33.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 34.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 35.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 36.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 37.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 38.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 39.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 40.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 41.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 42.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 43.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 44.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 45.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 46.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 47.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 3.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 48.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 49.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 50.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 51.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 52.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 53.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 54.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 55.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 56.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 57.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 58.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 59.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 60.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 61.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 62.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
Software lock register for page 63.
Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEC : Secure lock status. Writes are OR'd with the current value. This field is read-only to Non-secure code.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
NSEC : Non-secure lock status. Writes are OR'd with the current value.
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : read_write
1 : read_only
3 : inaccessible
End of enumeration elements list.
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