\n
address_offset : 0x0 Bytes (0x0)
size : 0x4C0 byte (0x0)
mem_usage : registers
protection : not protected
I2C_SCL_LOW_PERIOD
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PERIOD :
bits : 0 - 13 (14 bit)
I2C_SLAVE_ADDR
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLAVE_ADDR :
bits : 0 - 14 (15 bit)
ADDR_10BIT_EN :
bits : 31 - 31 (1 bit)
I2C_RXFIFO_ST
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RXFIFO_START_ADDR :
bits : 0 - 4 (5 bit)
RXFIFO_END_ADDR :
bits : 5 - 9 (5 bit)
TXFIFO_START_ADDR :
bits : 10 - 14 (5 bit)
TXFIFO_END_ADDR :
bits : 15 - 19 (5 bit)
I2C_FIFO_CONF
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RXFIFO_FULL_THRHD :
bits : 0 - 4 (5 bit)
TXFIFO_EMPTY_THRHD :
bits : 5 - 9 (5 bit)
NONFIFO_EN :
bits : 10 - 10 (1 bit)
FIFO_ADDR_CFG_EN :
bits : 11 - 11 (1 bit)
RX_FIFO_RST :
bits : 12 - 12 (1 bit)
TX_FIFO_RST :
bits : 13 - 13 (1 bit)
NONFIFO_RX_THRES :
bits : 14 - 19 (6 bit)
NONFIFO_TX_THRES :
bits : 20 - 25 (6 bit)
I2C_DATA
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIFO_RDATA :
bits : 0 - 7 (8 bit)
I2C_INT_RAW
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RXFIFO_FULL_INT_RAW :
bits : 0 - 0 (1 bit)
TXFIFO_EMPTY_INT_RAW :
bits : 1 - 1 (1 bit)
RXFIFO_OVF_INT_RAW :
bits : 2 - 2 (1 bit)
END_DETECT_INT_RAW :
bits : 3 - 3 (1 bit)
SLAVE_TRAN_COMP_INT_RAW :
bits : 4 - 4 (1 bit)
ARBITRATION_LOST_INT_RAW :
bits : 5 - 5 (1 bit)
MASTER_TRAN_COMP_INT_RAW :
bits : 6 - 6 (1 bit)
TRANS_COMPLETE_INT_RAW :
bits : 7 - 7 (1 bit)
TIME_OUT_INT_RAW :
bits : 8 - 8 (1 bit)
TRANS_START_INT_RAW :
bits : 9 - 9 (1 bit)
ACK_ERR_INT_RAW :
bits : 10 - 10 (1 bit)
RX_REC_FULL_INT_RAW :
bits : 11 - 11 (1 bit)
TX_SEND_EMPTY_INT_RAW :
bits : 12 - 12 (1 bit)
I2C_INT_CLR
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RXFIFO_FULL_INT_CLR :
bits : 0 - 0 (1 bit)
TXFIFO_EMPTY_INT_CLR :
bits : 1 - 1 (1 bit)
RXFIFO_OVF_INT_CLR :
bits : 2 - 2 (1 bit)
END_DETECT_INT_CLR :
bits : 3 - 3 (1 bit)
SLAVE_TRAN_COMP_INT_CLR :
bits : 4 - 4 (1 bit)
ARBITRATION_LOST_INT_CLR :
bits : 5 - 5 (1 bit)
MASTER_TRAN_COMP_INT_CLR :
bits : 6 - 6 (1 bit)
TRANS_COMPLETE_INT_CLR :
bits : 7 - 7 (1 bit)
TIME_OUT_INT_CLR :
bits : 8 - 8 (1 bit)
TRANS_START_INT_CLR :
bits : 9 - 9 (1 bit)
ACK_ERR_INT_CLR :
bits : 10 - 10 (1 bit)
RX_REC_FULL_INT_CLR :
bits : 11 - 11 (1 bit)
TX_SEND_EMPTY_INT_CLR :
bits : 12 - 12 (1 bit)
I2C_INT_ENA
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RXFIFO_FULL_INT_ENA :
bits : 0 - 0 (1 bit)
TXFIFO_EMPTY_INT_ENA :
bits : 1 - 1 (1 bit)
RXFIFO_OVF_INT_ENA :
bits : 2 - 2 (1 bit)
END_DETECT_INT_ENA :
bits : 3 - 3 (1 bit)
SLAVE_TRAN_COMP_INT_ENA :
bits : 4 - 4 (1 bit)
ARBITRATION_LOST_INT_ENA :
bits : 5 - 5 (1 bit)
MASTER_TRAN_COMP_INT_ENA :
bits : 6 - 6 (1 bit)
TRANS_COMPLETE_INT_ENA :
bits : 7 - 7 (1 bit)
TIME_OUT_INT_ENA :
bits : 8 - 8 (1 bit)
TRANS_START_INT_ENA :
bits : 9 - 9 (1 bit)
ACK_ERR_INT_ENA :
bits : 10 - 10 (1 bit)
RX_REC_FULL_INT_ENA :
bits : 11 - 11 (1 bit)
TX_SEND_EMPTY_INT_ENA :
bits : 12 - 12 (1 bit)
I2C_INT_STATUS
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RXFIFO_FULL_INT_ST :
bits : 0 - 0 (1 bit)
TXFIFO_EMPTY_INT_ST :
bits : 1 - 1 (1 bit)
RXFIFO_OVF_INT_ST :
bits : 2 - 2 (1 bit)
END_DETECT_INT_ST :
bits : 3 - 3 (1 bit)
SLAVE_TRAN_COMP_INT_ST :
bits : 4 - 4 (1 bit)
ARBITRATION_LOST_INT_ST :
bits : 5 - 5 (1 bit)
MASTER_TRAN_COMP_INT_ST :
bits : 6 - 6 (1 bit)
TRANS_COMPLETE_INT_ST :
bits : 7 - 7 (1 bit)
TIME_OUT_INT_ST :
bits : 8 - 8 (1 bit)
TRANS_START_INT_ST :
bits : 9 - 9 (1 bit)
ACK_ERR_INT_ST :
bits : 10 - 10 (1 bit)
RX_REC_FULL_INT_ST :
bits : 11 - 11 (1 bit)
TX_SEND_EMPTY_INT_ST :
bits : 12 - 12 (1 bit)
I2C_SDA_HOLD
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME :
bits : 0 - 9 (10 bit)
I2C_SDA_SAMPLE
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME :
bits : 0 - 9 (10 bit)
I2C_SCL_HIGH_PERIOD
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PERIOD :
bits : 0 - 13 (14 bit)
I2C_CTR
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDA_FORCE_OUT :
bits : 0 - 0 (1 bit)
SCL_FORCE_OUT :
bits : 1 - 1 (1 bit)
SAMPLE_SCL_LEVEL :
bits : 2 - 2 (1 bit)
MS_MODE :
bits : 4 - 4 (1 bit)
TRANS_START :
bits : 5 - 5 (1 bit)
TX_LSB_FIRST :
bits : 6 - 6 (1 bit)
RX_LSB_FIRST :
bits : 7 - 7 (1 bit)
CLK_EN :
bits : 8 - 8 (1 bit)
I2C_SCL_START_HOLD
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME :
bits : 0 - 9 (10 bit)
I2C_SCL_RSTART_SETUP
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME :
bits : 0 - 9 (10 bit)
I2C_SCL_STOP_HOLD
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME :
bits : 0 - 13 (14 bit)
I2C_SCL_STOP_SETUP
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME :
bits : 0 - 9 (10 bit)
I2C_SCL_FILTER_CFG
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCL_FILTER_THRES :
bits : 0 - 2 (3 bit)
SCL_FILTER_EN :
bits : 3 - 3 (1 bit)
I2C_SDA_FILTER_CFG
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDA_FILTER_THRES :
bits : 0 - 2 (3 bit)
SDA_FILTER_EN :
bits : 3 - 3 (1 bit)
I2C_COMD0
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMMAND0 :
bits : 0 - 13 (14 bit)
COMMAND0_DONE :
bits : 31 - 31 (1 bit)
I2C_COMD1
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMMAND1 :
bits : 0 - 13 (14 bit)
COMMAND1_DONE :
bits : 31 - 31 (1 bit)
I2C_COMD2
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMMAND2 :
bits : 0 - 13 (14 bit)
COMMAND2_DONE :
bits : 31 - 31 (1 bit)
I2C_COMD3
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMMAND3 :
bits : 0 - 13 (14 bit)
COMMAND3_DONE :
bits : 31 - 31 (1 bit)
I2C_COMD4
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMMAND4 :
bits : 0 - 13 (14 bit)
COMMAND4_DONE :
bits : 31 - 31 (1 bit)
I2C_COMD5
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMMAND5 :
bits : 0 - 13 (14 bit)
COMMAND5_DONE :
bits : 31 - 31 (1 bit)
I2C_COMD6
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMMAND6 :
bits : 0 - 13 (14 bit)
COMMAND6_DONE :
bits : 31 - 31 (1 bit)
I2C_COMD7
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMMAND7 :
bits : 0 - 13 (14 bit)
COMMAND7_DONE :
bits : 31 - 31 (1 bit)
I2C_COMD8
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMMAND8 :
bits : 0 - 13 (14 bit)
COMMAND8_DONE :
bits : 31 - 31 (1 bit)
I2C_COMD9
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMMAND9 :
bits : 0 - 13 (14 bit)
COMMAND9_DONE :
bits : 31 - 31 (1 bit)
I2C_SR
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACK_REC :
bits : 0 - 0 (1 bit)
SLAVE_RW :
bits : 1 - 1 (1 bit)
TIME_OUT :
bits : 2 - 2 (1 bit)
ARB_LOST :
bits : 3 - 3 (1 bit)
BUS_BUSY :
bits : 4 - 4 (1 bit)
SLAVE_ADDRESSED :
bits : 5 - 5 (1 bit)
BYTE_TRANS :
bits : 6 - 6 (1 bit)
RXFIFO_CNT :
bits : 8 - 13 (6 bit)
TXFIFO_CNT :
bits : 18 - 23 (6 bit)
SCL_MAIN_STATE_LAST :
bits : 24 - 26 (3 bit)
SCL_STATE_LAST :
bits : 28 - 30 (3 bit)
I2C_COMD10
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMMAND10 :
bits : 0 - 13 (14 bit)
COMMAND10_DONE :
bits : 31 - 31 (1 bit)
I2C_COMD11
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMMAND11 :
bits : 0 - 13 (14 bit)
COMMAND11_DONE :
bits : 31 - 31 (1 bit)
I2C_COMD12
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMMAND12 :
bits : 0 - 13 (14 bit)
COMMAND12_DONE :
bits : 31 - 31 (1 bit)
I2C_COMD13
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMMAND13 :
bits : 0 - 13 (14 bit)
COMMAND13_DONE :
bits : 31 - 31 (1 bit)
I2C_COMD14
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMMAND14 :
bits : 0 - 13 (14 bit)
COMMAND14_DONE :
bits : 31 - 31 (1 bit)
I2C_COMD15
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMMAND15 :
bits : 0 - 13 (14 bit)
COMMAND15_DONE :
bits : 31 - 31 (1 bit)
I2C_TO
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_OUT_REG :
bits : 0 - 19 (20 bit)
I2C_DATE
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATE :
bits : 0 - 31 (32 bit)
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