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RTC_I2C

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x160 byte (0x0)
mem_usage : registers
protection : not protected

Registers

SCL_LOW_PERIOD

SLAVE_ADDR

INT_RAW

INT_CLR

SDA_DUTY

SCL_HIGH_PERIOD

CTRL

SCL_START_PERIOD

SCL_STOP_PERIOD

DEBUG_STATUS

TIMEOUT


SCL_LOW_PERIOD

RTC_I2C_SCL_LOW_PERIOD
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCL_LOW_PERIOD SCL_LOW_PERIOD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCL_LOW_PERIOD

SCL_LOW_PERIOD :
bits : 0 - 18 (19 bit)


SLAVE_ADDR

RTC_I2C_SLAVE_ADDR
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SLAVE_ADDR SLAVE_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLAVE_ADDR SLAVE_ADDR_10BIT

SLAVE_ADDR :
bits : 0 - 14 (15 bit)

SLAVE_ADDR_10BIT :
bits : 31 - 31 (1 bit)


INT_RAW

RTC_I2C_INT_RAW
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INT_RAW INT_RAW read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLAVE_TRANS_COMPLETE_INT_RAW ARBITRATION_LOST_INT_RAW MASTER_TRANS_COMPLETE_INT_RAW TRANS_COMPLETE_INT_RAW TIME_OUT_INT_RAW

SLAVE_TRANS_COMPLETE_INT_RAW :
bits : 3 - 3 (1 bit)

ARBITRATION_LOST_INT_RAW :
bits : 4 - 4 (1 bit)

MASTER_TRANS_COMPLETE_INT_RAW :
bits : 5 - 5 (1 bit)

TRANS_COMPLETE_INT_RAW :
bits : 6 - 6 (1 bit)

TIME_OUT_INT_RAW :
bits : 7 - 7 (1 bit)


INT_CLR

RTC_I2C_INT_CLR
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INT_CLR INT_CLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLAVE_TRANS_COMPLETE_INT_CLR ARBITRATION_LOST_INT_CLR MASTER_TRANS_COMPLETE_INT_CLR TRANS_COMPLETE_INT_CLR TIME_OUT_INT_CLR

SLAVE_TRANS_COMPLETE_INT_CLR :
bits : 4 - 4 (1 bit)

ARBITRATION_LOST_INT_CLR :
bits : 5 - 5 (1 bit)

MASTER_TRANS_COMPLETE_INT_CLR :
bits : 6 - 6 (1 bit)

TRANS_COMPLETE_INT_CLR :
bits : 7 - 7 (1 bit)

TIME_OUT_INT_CLR :
bits : 8 - 8 (1 bit)


SDA_DUTY

RTC_I2C_SDA_DUTY
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SDA_DUTY SDA_DUTY read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SDA_DUTY

SDA_DUTY :
bits : 0 - 19 (20 bit)


SCL_HIGH_PERIOD

RTC_I2C_SCL_HIGH_PERIOD
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCL_HIGH_PERIOD SCL_HIGH_PERIOD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCL_HIGH_PERIOD

SCL_HIGH_PERIOD :
bits : 0 - 19 (20 bit)


CTRL

RTC_I2C_CTRL
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SDA_FORCE_OUT SCL_FORCE_OUT MS_MODE TRANS_START TX_LSB_FIRST RX_LSB_FIRST

SDA_FORCE_OUT :
bits : 0 - 0 (1 bit)

SCL_FORCE_OUT :
bits : 1 - 1 (1 bit)

MS_MODE :
bits : 4 - 4 (1 bit)

TRANS_START :
bits : 5 - 5 (1 bit)

TX_LSB_FIRST :
bits : 6 - 6 (1 bit)

RX_LSB_FIRST :
bits : 7 - 7 (1 bit)


SCL_START_PERIOD

RTC_I2C_SCL_START_PERIOD
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCL_START_PERIOD SCL_START_PERIOD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCL_START_PERIOD

SCL_START_PERIOD :
bits : 0 - 19 (20 bit)


SCL_STOP_PERIOD

RTC_I2C_SCL_STOP_PERIOD
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCL_STOP_PERIOD SCL_STOP_PERIOD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCL_STOP_PERIOD

SCL_STOP_PERIOD :
bits : 0 - 19 (20 bit)


DEBUG_STATUS

RTC_I2C_DEBUG_STATUS
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DEBUG_STATUS DEBUG_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACK_VAL SLAVE_RW TIMED_OUT ARB_LOST BUS_BUSY SLAVE_ADDR_MATCH BYTE_TRANS MAIN_STATE SCL_STATE

ACK_VAL :
bits : 0 - 0 (1 bit)

SLAVE_RW :
bits : 1 - 1 (1 bit)

TIMED_OUT :
bits : 2 - 2 (1 bit)

ARB_LOST :
bits : 3 - 3 (1 bit)

BUS_BUSY :
bits : 4 - 4 (1 bit)

SLAVE_ADDR_MATCH :
bits : 5 - 5 (1 bit)

BYTE_TRANS :
bits : 6 - 6 (1 bit)

MAIN_STATE :
bits : 25 - 27 (3 bit)

SCL_STATE :
bits : 28 - 30 (3 bit)


TIMEOUT

RTC_I2C_TIMEOUT
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMEOUT TIMEOUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIMEOUT

TIMEOUT :
bits : 0 - 19 (20 bit)



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