\n
address_offset : 0x0 Bytes (0x0)
size : 0x3A0 byte (0x0)
mem_usage : registers
protection : not protected
BT-Coexist Selection register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_OUT_DATA : The output value when the GPIO pin is set as output.
bits : 0 - 15 (16 bit)
access : read-write
GPIO_BT_SEL : BT-Coexist Selection register
bits : 16 - 31 (16 bit)
access : read-write
GPIO_ENABLE_W1TS
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_ENABLE_DATA_W1TS : Writing 1 into a bit in this register will set the related bit in GPIO_ENABLE_DATA
bits : 0 - 15 (16 bit)
access : write-only
GPIO_ENABLE_W1TC
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_ENABLE_DATA_W1TC : Writing 1 into a bit in this register will clear the related bit in GPIO_ENABLE_DATA
bits : 0 - 15 (16 bit)
access : write-only
The values of the strapping pins.
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_IN_DATA : The values of the GPIO pins when the GPIO pin is set as input.
bits : 0 - 15 (16 bit)
access : read-write
GPIO_STRAPPING : The values of the strapping pins.
bits : 16 - 31 (16 bit)
access : read-write
GPIO_STATUS
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_STATUS_INTERRUPT : Interrupt enable register.
bits : 0 - 15 (16 bit)
access : read-write
GPIO_STATUS_W1TS
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_STATUS_INTERRUPT_W1TS : Writing 1 into a bit in this register will set the related bit in GPIO_STATUS_INTERRUPT
bits : 0 - 15 (16 bit)
access : write-only
GPIO_STATUS_W1TC
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_STATUS_INTERRUPT_W1TC : Writing 1 into a bit in this register will clear the related bit in GPIO_STATUS_INTERRUPT
bits : 0 - 15 (16 bit)
access : write-only
GPIO_PIN0
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_PIN0_SOURCE : 1: sigma-delta; 0: GPIO_DATA
bits : 0 - 0 (1 bit)
access : read-write
Enumeration: GPIO_PIN0_SOURCE ( read-write )
0 : sigma_delta
sigma-delta
1 : gpio_data
gpio data
End of enumeration elements list.
GPIO_PIN0_DRIVER : 1: open drain; 0: normal
bits : 2 - 2 (1 bit)
access : read-write
Enumeration: GPIO_PIN0_DRIVER ( read-write )
0 : open_drain
open drain
1 : normal
normal
End of enumeration elements list.
GPIO_PIN0_INT_TYPE : 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
bits : 7 - 9 (3 bit)
access : read-write
Enumeration: GPIO_PIN0_INT_TYPE ( read-write )
0 : disabled
interrupt is disabled
1 : positive_edge
interrupt is triggered on the positive edge
2 : negative_edge
interrupt is triggered on the negative edge
3 : both_edges
interrupt is triggered on both edges
4 : low_level
interrupt is triggered on the low level
5 : high_level
interrupt is triggered on the high level
End of enumeration elements list.
GPIO_PIN0_WAKEUP_ENABLE : 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
bits : 10 - 10 (1 bit)
access : read-write
GPIO_PIN1
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_PIN1_SOURCE : 1: sigma-delta; 0: GPIO_DATA
bits : 0 - 0 (1 bit)
access : read-write
Enumeration: GPIO_PIN1_SOURCE ( read-write )
0 : sigma_delta
sigma-delta
1 : gpio_data
gpio data
End of enumeration elements list.
GPIO_PIN1_DRIVER : 1: open drain; 0: normal
bits : 2 - 2 (1 bit)
access : read-write
Enumeration: GPIO_PIN1_DRIVER ( read-write )
0 : open_drain
open drain
1 : normal
normal
End of enumeration elements list.
GPIO_PIN1_INT_TYPE : 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
bits : 7 - 9 (3 bit)
access : read-write
Enumeration: GPIO_PIN1_INT_TYPE ( read-write )
0 : disabled
interrupt is disabled
1 : positive_edge
interrupt is triggered on the positive edge
2 : negative_edge
interrupt is triggered on the negative edge
3 : both_edges
interrupt is triggered on both edges
4 : low_level
interrupt is triggered on the low level
5 : high_level
interrupt is triggered on the high level
End of enumeration elements list.
GPIO_PIN1_WAKEUP_ENABLE : 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
bits : 10 - 10 (1 bit)
access : read-write
GPIO_PIN2
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_PIN2_SOURCE : 1: sigma-delta; 0: GPIO_DATA
bits : 0 - 0 (1 bit)
access : read-write
Enumeration: GPIO_PIN2_SOURCE ( read-write )
0 : sigma_delta
sigma-delta
1 : gpio_data
gpio data
End of enumeration elements list.
GPIO_PIN2_DRIVER : 1: open drain; 0: normal
bits : 2 - 2 (1 bit)
access : read-write
Enumeration: GPIO_PIN2_DRIVER ( read-write )
0 : open_drain
open drain
1 : normal
normal
End of enumeration elements list.
GPIO_PIN2_INT_TYPE : 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
bits : 7 - 9 (3 bit)
access : read-write
Enumeration: GPIO_PIN2_INT_TYPE ( read-write )
0 : disabled
interrupt is disabled
1 : positive_edge
interrupt is triggered on the positive edge
2 : negative_edge
interrupt is triggered on the negative edge
3 : both_edges
interrupt is triggered on both edges
4 : low_level
interrupt is triggered on the low level
5 : high_level
interrupt is triggered on the high level
End of enumeration elements list.
GPIO_PIN2_WAKEUP_ENABLE : 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
bits : 10 - 10 (1 bit)
access : read-write
GPIO_PIN3
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_PIN3_SOURCE : 1: sigma-delta; 0: GPIO_DATA
bits : 0 - 0 (1 bit)
access : read-write
Enumeration: GPIO_PIN3_SOURCE ( read-write )
0 : sigma_delta
sigma-delta
1 : gpio_data
gpio data
End of enumeration elements list.
GPIO_PIN3_DRIVER : 1: open drain; 0: normal
bits : 2 - 2 (1 bit)
access : read-write
Enumeration: GPIO_PIN3_DRIVER ( read-write )
0 : open_drain
open drain
1 : normal
normal
End of enumeration elements list.
GPIO_PIN3_INT_TYPE : 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
bits : 7 - 9 (3 bit)
access : read-write
Enumeration: GPIO_PIN3_INT_TYPE ( read-write )
0 : disabled
interrupt is disabled
1 : positive_edge
interrupt is triggered on the positive edge
2 : negative_edge
interrupt is triggered on the negative edge
3 : both_edges
interrupt is triggered on both edges
4 : low_level
interrupt is triggered on the low level
5 : high_level
interrupt is triggered on the high level
End of enumeration elements list.
GPIO_PIN3_WAKEUP_ENABLE : 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
bits : 10 - 10 (1 bit)
access : read-write
GPIO_PIN4
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_PIN4_SOURCE : 1: sigma-delta; 0: GPIO_DATA
bits : 0 - 0 (1 bit)
access : read-write
Enumeration: GPIO_PIN4_SOURCE ( read-write )
0 : sigma_delta
sigma-delta
1 : gpio_data
gpio data
End of enumeration elements list.
GPIO_PIN4_DRIVER : 1: open drain; 0: normal
bits : 2 - 2 (1 bit)
access : read-write
Enumeration: GPIO_PIN4_DRIVER ( read-write )
0 : open_drain
open drain
1 : normal
normal
End of enumeration elements list.
GPIO_PIN4_INT_TYPE : 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
bits : 7 - 9 (3 bit)
access : read-write
Enumeration: GPIO_PIN4_INT_TYPE ( read-write )
0 : disabled
interrupt is disabled
1 : positive_edge
interrupt is triggered on the positive edge
2 : negative_edge
interrupt is triggered on the negative edge
3 : both_edges
interrupt is triggered on both edges
4 : low_level
interrupt is triggered on the low level
5 : high_level
interrupt is triggered on the high level
End of enumeration elements list.
GPIO_PIN4_WAKEUP_ENABLE : 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
bits : 10 - 10 (1 bit)
access : read-write
GPIO_PIN5
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_PIN5_SOURCE : 1: sigma-delta; 0: GPIO_DATA
bits : 0 - 0 (1 bit)
access : read-write
Enumeration: GPIO_PIN5_SOURCE ( read-write )
0 : sigma_delta
sigma-delta
1 : gpio_data
gpio data
End of enumeration elements list.
GPIO_PIN5_DRIVER : 1: open drain; 0: normal
bits : 2 - 2 (1 bit)
access : read-write
Enumeration: GPIO_PIN5_DRIVER ( read-write )
0 : open_drain
open drain
1 : normal
normal
End of enumeration elements list.
GPIO_PIN5_INT_TYPE : 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
bits : 7 - 9 (3 bit)
access : read-write
Enumeration: GPIO_PIN5_INT_TYPE ( read-write )
0 : disabled
interrupt is disabled
1 : positive_edge
interrupt is triggered on the positive edge
2 : negative_edge
interrupt is triggered on the negative edge
3 : both_edges
interrupt is triggered on both edges
4 : low_level
interrupt is triggered on the low level
5 : high_level
interrupt is triggered on the high level
End of enumeration elements list.
GPIO_PIN5_WAKEUP_ENABLE : 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
bits : 10 - 10 (1 bit)
access : read-write
GPIO_OUT_W1TS
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_OUT_DATA_W1TS : Writing 1 into a bit in this register will set the related bit in GPIO_OUT_DATA
bits : 0 - 15 (16 bit)
access : write-only
GPIO_PIN6
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_PIN6_SOURCE : 1: sigma-delta; 0: GPIO_DATA
bits : 0 - 0 (1 bit)
access : read-write
Enumeration: GPIO_PIN6_SOURCE ( read-write )
0 : sigma_delta
sigma-delta
1 : gpio_data
gpio data
End of enumeration elements list.
GPIO_PIN6_DRIVER : 1: open drain; 0: normal
bits : 2 - 2 (1 bit)
access : read-write
Enumeration: GPIO_PIN6_DRIVER ( read-write )
0 : open_drain
open drain
1 : normal
normal
End of enumeration elements list.
GPIO_PIN6_INT_TYPE : 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
bits : 7 - 9 (3 bit)
access : read-write
Enumeration: GPIO_PIN6_INT_TYPE ( read-write )
0 : disabled
interrupt is disabled
1 : positive_edge
interrupt is triggered on the positive edge
2 : negative_edge
interrupt is triggered on the negative edge
3 : both_edges
interrupt is triggered on both edges
4 : low_level
interrupt is triggered on the low level
5 : high_level
interrupt is triggered on the high level
End of enumeration elements list.
GPIO_PIN6_WAKEUP_ENABLE : 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
bits : 10 - 10 (1 bit)
access : read-write
GPIO_PIN7
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_PIN7_SOURCE : 1: sigma-delta; 0: GPIO_DATA
bits : 0 - 0 (1 bit)
access : read-write
Enumeration: GPIO_PIN7_SOURCE ( read-write )
0 : sigma_delta
sigma-delta
1 : gpio_data
gpio data
End of enumeration elements list.
GPIO_PIN7_DRIVER : 1: open drain; 0: normal
bits : 2 - 2 (1 bit)
access : read-write
Enumeration: GPIO_PIN7_DRIVER ( read-write )
0 : open_drain
open drain
1 : normal
normal
End of enumeration elements list.
GPIO_PIN7_INT_TYPE : 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
bits : 7 - 9 (3 bit)
access : read-write
Enumeration: GPIO_PIN7_INT_TYPE ( read-write )
0 : disabled
interrupt is disabled
1 : positive_edge
interrupt is triggered on the positive edge
2 : negative_edge
interrupt is triggered on the negative edge
3 : both_edges
interrupt is triggered on both edges
4 : low_level
interrupt is triggered on the low level
5 : high_level
interrupt is triggered on the high level
End of enumeration elements list.
GPIO_PIN7_WAKEUP_ENABLE : 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
bits : 10 - 10 (1 bit)
access : read-write
GPIO_PIN8
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_PIN8_SOURCE : 1: sigma-delta; 0: GPIO_DATA
bits : 0 - 0 (1 bit)
access : read-write
Enumeration: GPIO_PIN8_SOURCE ( read-write )
0 : sigma_delta
sigma-delta
1 : gpio_data
gpio data
End of enumeration elements list.
GPIO_PIN8_DRIVER : 1: open drain; 0: normal
bits : 2 - 2 (1 bit)
access : read-write
Enumeration: GPIO_PIN8_DRIVER ( read-write )
0 : open_drain
open drain
1 : normal
normal
End of enumeration elements list.
GPIO_PIN8_INT_TYPE : 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
bits : 7 - 9 (3 bit)
access : read-write
Enumeration: GPIO_PIN8_INT_TYPE ( read-write )
0 : disabled
interrupt is disabled
1 : positive_edge
interrupt is triggered on the positive edge
2 : negative_edge
interrupt is triggered on the negative edge
3 : both_edges
interrupt is triggered on both edges
4 : low_level
interrupt is triggered on the low level
5 : high_level
interrupt is triggered on the high level
End of enumeration elements list.
GPIO_PIN8_WAKEUP_ENABLE : 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
bits : 10 - 10 (1 bit)
access : read-write
GPIO_PIN9
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_PIN9_SOURCE : 1: sigma-delta; 0: GPIO_DATA
bits : 0 - 0 (1 bit)
access : read-write
Enumeration: GPIO_PIN9_SOURCE ( read-write )
0 : sigma_delta
sigma-delta
1 : gpio_data
gpio data
End of enumeration elements list.
GPIO_PIN9_DRIVER : 1: open drain; 0: normal
bits : 2 - 2 (1 bit)
access : read-write
Enumeration: GPIO_PIN9_DRIVER ( read-write )
0 : open_drain
open drain
1 : normal
normal
End of enumeration elements list.
GPIO_PIN9_INT_TYPE : 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
bits : 7 - 9 (3 bit)
access : read-write
Enumeration: GPIO_PIN9_INT_TYPE ( read-write )
0 : disabled
interrupt is disabled
1 : positive_edge
interrupt is triggered on the positive edge
2 : negative_edge
interrupt is triggered on the negative edge
3 : both_edges
interrupt is triggered on both edges
4 : low_level
interrupt is triggered on the low level
5 : high_level
interrupt is triggered on the high level
End of enumeration elements list.
GPIO_PIN9_WAKEUP_ENABLE : 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
bits : 10 - 10 (1 bit)
access : read-write
GPIO_PIN10
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_PIN10_SOURCE : 1: sigma-delta; 0: GPIO_DATA
bits : 0 - 0 (1 bit)
access : read-write
Enumeration: GPIO_PIN10_SOURCE ( read-write )
0 : sigma_delta
sigma-delta
1 : gpio_data
gpio data
End of enumeration elements list.
GPIO_PIN10_DRIVER : 1: open drain; 0: normal
bits : 2 - 2 (1 bit)
access : read-write
Enumeration: GPIO_PIN10_DRIVER ( read-write )
0 : open_drain
open drain
1 : normal
normal
End of enumeration elements list.
GPIO_PIN10_INT_TYPE : 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
bits : 7 - 9 (3 bit)
access : read-write
Enumeration: GPIO_PIN10_INT_TYPE ( read-write )
0 : disabled
interrupt is disabled
1 : positive_edge
interrupt is triggered on the positive edge
2 : negative_edge
interrupt is triggered on the negative edge
3 : both_edges
interrupt is triggered on both edges
4 : low_level
interrupt is triggered on the low level
5 : high_level
interrupt is triggered on the high level
End of enumeration elements list.
GPIO_PIN10_WAKEUP_ENABLE : 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
bits : 10 - 10 (1 bit)
access : read-write
GPIO_PIN11
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_PIN11_SOURCE : 1: sigma-delta; 0: GPIO_DATA
bits : 0 - 0 (1 bit)
access : read-write
Enumeration: GPIO_PIN11_SOURCE ( read-write )
0 : sigma_delta
sigma-delta
1 : gpio_data
gpio data
End of enumeration elements list.
GPIO_PIN11_DRIVER : 1: open drain; 0: normal
bits : 2 - 2 (1 bit)
access : read-write
Enumeration: GPIO_PIN11_DRIVER ( read-write )
0 : open_drain
open drain
1 : normal
normal
End of enumeration elements list.
GPIO_PIN11_INT_TYPE : 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
bits : 7 - 9 (3 bit)
access : read-write
Enumeration: GPIO_PIN11_INT_TYPE ( read-write )
0 : disabled
interrupt is disabled
1 : positive_edge
interrupt is triggered on the positive edge
2 : negative_edge
interrupt is triggered on the negative edge
3 : both_edges
interrupt is triggered on both edges
4 : low_level
interrupt is triggered on the low level
5 : high_level
interrupt is triggered on the high level
End of enumeration elements list.
GPIO_PIN11_WAKEUP_ENABLE : 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
bits : 10 - 10 (1 bit)
access : read-write
GPIO_PIN12
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_PIN12_SOURCE : 1: sigma-delta; 0: GPIO_DATA
bits : 0 - 0 (1 bit)
access : read-write
Enumeration: GPIO_PIN12_SOURCE ( read-write )
0 : sigma_delta
sigma-delta
1 : gpio_data
gpio data
End of enumeration elements list.
GPIO_PIN12_DRIVER : 1: open drain; 0: normal
bits : 2 - 2 (1 bit)
access : read-write
Enumeration: GPIO_PIN12_DRIVER ( read-write )
0 : open_drain
open drain
1 : normal
normal
End of enumeration elements list.
GPIO_PIN12_INT_TYPE : 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
bits : 7 - 9 (3 bit)
access : read-write
Enumeration: GPIO_PIN12_INT_TYPE ( read-write )
0 : disabled
interrupt is disabled
1 : positive_edge
interrupt is triggered on the positive edge
2 : negative_edge
interrupt is triggered on the negative edge
3 : both_edges
interrupt is triggered on both edges
4 : low_level
interrupt is triggered on the low level
5 : high_level
interrupt is triggered on the high level
End of enumeration elements list.
GPIO_PIN12_WAKEUP_ENABLE : 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
bits : 10 - 10 (1 bit)
access : read-write
GPIO_PIN13
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_PIN13_SOURCE : 1: sigma-delta; 0: GPIO_DATA
bits : 0 - 0 (1 bit)
access : read-write
Enumeration: GPIO_PIN13_SOURCE ( read-write )
0 : sigma_delta
sigma-delta
1 : gpio_data
gpio data
End of enumeration elements list.
GPIO_PIN13_DRIVER : 1: open drain; 0: normal
bits : 2 - 2 (1 bit)
access : read-write
Enumeration: GPIO_PIN13_DRIVER ( read-write )
0 : open_drain
open drain
1 : normal
normal
End of enumeration elements list.
GPIO_PIN13_INT_TYPE : 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
bits : 7 - 9 (3 bit)
access : read-write
Enumeration: GPIO_PIN13_INT_TYPE ( read-write )
0 : disabled
interrupt is disabled
1 : positive_edge
interrupt is triggered on the positive edge
2 : negative_edge
interrupt is triggered on the negative edge
3 : both_edges
interrupt is triggered on both edges
4 : low_level
interrupt is triggered on the low level
5 : high_level
interrupt is triggered on the high level
End of enumeration elements list.
GPIO_PIN13_WAKEUP_ENABLE : 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
bits : 10 - 10 (1 bit)
access : read-write
GPIO_PIN14
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_PIN14_SOURCE : 1: sigma-delta; 0: GPIO_DATA
bits : 0 - 0 (1 bit)
access : read-write
Enumeration: GPIO_PIN14_SOURCE ( read-write )
0 : sigma_delta
sigma-delta
1 : gpio_data
gpio data
End of enumeration elements list.
GPIO_PIN14_DRIVER : 1: open drain; 0: normal
bits : 2 - 2 (1 bit)
access : read-write
Enumeration: GPIO_PIN14_DRIVER ( read-write )
0 : open_drain
open drain
1 : normal
normal
End of enumeration elements list.
GPIO_PIN14_INT_TYPE : 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
bits : 7 - 9 (3 bit)
access : read-write
Enumeration: GPIO_PIN14_INT_TYPE ( read-write )
0 : disabled
interrupt is disabled
1 : positive_edge
interrupt is triggered on the positive edge
2 : negative_edge
interrupt is triggered on the negative edge
3 : both_edges
interrupt is triggered on both edges
4 : low_level
interrupt is triggered on the low level
5 : high_level
interrupt is triggered on the high level
End of enumeration elements list.
GPIO_PIN14_WAKEUP_ENABLE : 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
bits : 10 - 10 (1 bit)
access : read-write
GPIO_PIN15
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_PIN15_SOURCE : 1: sigma-delta; 0: GPIO_DATA
bits : 0 - 0 (1 bit)
access : read-write
Enumeration: GPIO_PIN15_SOURCE ( read-write )
0 : sigma_delta
sigma-delta
1 : gpio_data
gpio data
End of enumeration elements list.
GPIO_PIN15_DRIVER : 1: open drain; 0: normal
bits : 2 - 2 (1 bit)
access : read-write
Enumeration: GPIO_PIN15_DRIVER ( read-write )
0 : open_drain
open drain
1 : normal
normal
End of enumeration elements list.
GPIO_PIN15_INT_TYPE : 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level
bits : 7 - 9 (3 bit)
access : read-write
Enumeration: GPIO_PIN15_INT_TYPE ( read-write )
0 : disabled
interrupt is disabled
1 : positive_edge
interrupt is triggered on the positive edge
2 : negative_edge
interrupt is triggered on the negative edge
3 : both_edges
interrupt is triggered on both edges
4 : low_level
interrupt is triggered on the low level
5 : high_level
interrupt is triggered on the high level
End of enumeration elements list.
GPIO_PIN15_WAKEUP_ENABLE : 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
bits : 10 - 10 (1 bit)
access : read-write
GPIO_SIGMA_DELTA
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SIGMA_DELTA_TARGET : target level of the sigma-delta. It is a signed byte.
bits : 0 - 7 (8 bit)
access : read-write
SIGMA_DELTA_PRESCALAR : Clock pre-divider for sigma-delta.
bits : 8 - 15 (8 bit)
access : read-write
SIGMA_DELTA_ENABLE : 1: enable sigma-delta; 0: disable
bits : 16 - 16 (1 bit)
access : read-write
Positvie edge of this bit will trigger the RTC-clock-calibration process.
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RTC_PERIOD_NUM : The cycle number of RTC-clock during RTC-clock-calibration
bits : 0 - 9 (10 bit)
access : read-write
RTC_CALIB_START : Positvie edge of this bit will trigger the RTC-clock-calibration process.
bits : 31 - 31 (1 bit)
access : read-write
0: during RTC-clock-calibration; 1: RTC-clock-calibration is done
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RTC_CALIB_VALUE : The cycle number of clk_xtal (crystal clock) for the RTC_PERIOD_NUM cycles of RTC-clock
bits : 0 - 19 (20 bit)
access : read-write
RTC_CALIB_RDY_REAL : 0: during RTC-clock-calibration; 1: RTC-clock-calibration is done
bits : 30 - 30 (1 bit)
access : read-write
RTC_CALIB_RDY : 0: during RTC-clock-calibration; 1: RTC-clock-calibration is done
bits : 31 - 31 (1 bit)
access : read-write
GPIO_OUT_W1TC
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_OUT_DATA_W1TC : Writing 1 into a bit in this register will clear the related bit in GPIO_OUT_DATA
bits : 0 - 15 (16 bit)
access : write-only
GPIO_ENABLE
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO_ENABLE_DATA : The output enable register.
bits : 0 - 15 (16 bit)
access : read-write
GPIO_SDIO_SEL : SDIO-dis selection register
bits : 16 - 21 (6 bit)
access : read-write
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