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TIMER

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x120 byte (0x0)
mem_usage : registers
protection : not protected

Registers

FRC1_LOAD

FRC2_LOAD

FRC2_COUNT

FRC2_CTRL

FRC2_INT

FRC2_ALARM

FRC1_COUNT

FRC1_CTRL

FRC1_INT


FRC1_LOAD

the load value into the counter
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRC1_LOAD FRC1_LOAD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 frc1_load_value

frc1_load_value : the load value into the counter
bits : 0 - 22 (23 bit)
access : read-write


FRC2_LOAD

the load value into the counter
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRC2_LOAD FRC2_LOAD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 frc2_load_value

frc2_load_value : the load value into the counter
bits : 0 - 31 (32 bit)
access : read-write


FRC2_COUNT

the current value of the counter. It is a increasingcounter.
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRC2_COUNT FRC2_COUNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 frc2_count

frc2_count : the current value of the counter. It is a increasingcounter.
bits : 0 - 31 (32 bit)
access : read-only


FRC2_CTRL

FRC2_CTRL
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRC2_CTRL FRC2_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 frc2_ctrl interrupt_type prescale_divider rollover timer_enable frc2_int

frc2_ctrl : bit[7]: timer enable, bit[6]: automatically reload, when the counter isequal to zero, bit[3:2]: prescale-divider, 0: divided by 1, 1: dividedby 16, 2 or 3: divided by 256, bit[0]: interrupt type, 0:edge, 1:level
bits : 0 - 7 (8 bit)
access : read-write

interrupt_type : Configure the interrupt type
bits : 0 - 0 (1 bit)
access : read-write

Enumeration: interrupt_type ( read-write )

0 : edge

edge

1 : level

level

End of enumeration elements list.

prescale_divider : Pre-scale divider for the timer
bits : 2 - 3 (2 bit)
access : read-write

Enumeration: prescale_divider ( read-write )

0 : devided_by_1

divided by 1

1 : devided_by_16

divided by 16

2 : devided_by_256

divided by 256

End of enumeration elements list.

rollover : Automatically reload when the counter hits zero
bits : 6 - 6 (1 bit)
access : read-write

timer_enable : Enable or disable the timer
bits : 7 - 7 (1 bit)
access : read-write

frc2_int : the status of the interrupt, when the count is equal tothe alarm value
bits : 8 - 8 (1 bit)
access : read-only


FRC2_INT

FRC2_INT
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRC2_INT FRC2_INT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 frc2_int_clr_mask

frc2_int_clr_mask : write to clear the status of the interrupt, if theinterrupt type is "level"
bits : 0 - 0 (1 bit)
access : read-write


FRC2_ALARM

the alarm value for the counter
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRC2_ALARM FRC2_ALARM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 frc2_alarm

frc2_alarm : the alarm value for the counter
bits : 0 - 31 (32 bit)
access : read-write


FRC1_COUNT

the current value of the counter. It is a decreasingcounter.
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRC1_COUNT FRC1_COUNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 frc1_count

frc1_count : the current value of the counter. It is a decreasingcounter.
bits : 0 - 22 (23 bit)
access : read-only


FRC1_CTRL

FRC1_CTRL
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRC1_CTRL FRC1_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 frc1_ctrl interrupt_type prescale_divider rollover timer_enable frc1_int

frc1_ctrl : bit[7]: timer enable, bit[6]: automatically reload, when the counter isequal to zero, bit[3:2]: prescale-divider, 0: divided by 1, 1: dividedby 16, 2 or 3: divided by 256, bit[0]: interrupt type, 0:edge, 1:level
bits : 0 - 7 (8 bit)
access : read-write

interrupt_type : Configure the interrupt type
bits : 0 - 0 (1 bit)
access : read-write

Enumeration: interrupt_type ( read-write )

0 : edge

edge

1 : level

level

End of enumeration elements list.

prescale_divider : Pre-scale divider for the timer
bits : 2 - 3 (2 bit)
access : read-write

Enumeration: prescale_divider ( read-write )

0 : devided_by_1

divided by 1

1 : devided_by_16

divided by 16

2 : devided_by_256

divided by 256

End of enumeration elements list.

rollover : Automatically reload when the counter hits zero
bits : 6 - 6 (1 bit)
access : read-write

timer_enable : Enable or disable the timer
bits : 7 - 7 (1 bit)
access : read-write

frc1_int : the status of the interrupt, when the count isdereased to zero
bits : 8 - 8 (1 bit)
access : read-only


FRC1_INT

FRC1_INT
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRC1_INT FRC1_INT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 frc1_int_clr_mask

frc1_int_clr_mask : write to clear the status of the interrupt, if theinterrupt type is "level"
bits : 0 - 0 (1 bit)
access : read-write



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