\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected
OTG_FS control and status register (OTG_FS_GOTGCTL)
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SRQSCS : Session request success
bits : 0 - 0 (1 bit)
access : read-only
SRQ : Session request
bits : 1 - 1 (1 bit)
access : read-write
VBVALOEN : VBUS valid override enable
bits : 2 - 2 (1 bit)
access : read-write
VBVALOVAL : VBUS valid override value
bits : 3 - 3 (1 bit)
access : read-write
AVALOEN : A-peripheral session valid override enable
bits : 4 - 4 (1 bit)
access : read-write
AVALOVAL : A-peripheral session valid override value
bits : 5 - 5 (1 bit)
access : read-write
BVALOEN : B-peripheral session valid override enable
bits : 6 - 6 (1 bit)
access : read-write
BVALOVAL : B-peripheral session valid override value
bits : 7 - 7 (1 bit)
access : read-write
HNGSCS : Host negotiation success
bits : 8 - 8 (1 bit)
access : read-only
HNPRQ : HNP request
bits : 9 - 9 (1 bit)
access : read-write
HSHNPEN : Host set HNP enable
bits : 10 - 10 (1 bit)
access : read-write
DHNPEN : Device HNP enabled
bits : 11 - 11 (1 bit)
access : read-write
EHEN : Embedded host enable
bits : 12 - 12 (1 bit)
access : read-write
CIDSTS : Connector ID status
bits : 16 - 16 (1 bit)
access : read-only
DBCT : Long/short debounce time
bits : 17 - 17 (1 bit)
access : read-only
ASVLD : A-session valid
bits : 18 - 18 (1 bit)
access : read-only
BSVLD : B-session valid
bits : 19 - 19 (1 bit)
access : read-only
OTGVER : OTG version
bits : 20 - 20 (1 bit)
access : read-write
OTG_FS reset register (OTG_FS_GRSTCTL)
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSRST : Core soft reset
bits : 0 - 0 (1 bit)
access : read-write
HSRST : HCLK soft reset
bits : 1 - 1 (1 bit)
access : read-write
FCRST : Host frame counter reset
bits : 2 - 2 (1 bit)
access : read-write
RXFFLSH : RxFIFO flush
bits : 4 - 4 (1 bit)
access : read-write
TXFFLSH : TxFIFO flush
bits : 5 - 5 (1 bit)
access : read-write
TXFNUM : TxFIFO number
bits : 6 - 10 (5 bit)
access : read-write
AHBIDL : AHB master idle
bits : 31 - 31 (1 bit)
access : read-only
OTG_FS Host periodic transmit FIFO size register (OTG_FS_HPTXFSIZ)
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PTXSA : Host periodic TxFIFO start address
bits : 0 - 15 (16 bit)
PTXFSIZ : Host periodic TxFIFO depth
bits : 16 - 31 (16 bit)
OTG_FS device IN endpoint transmit FIFO size register (OTG_FS_DIEPTXF1)
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INEPTXSA : IN endpoint FIFO2 transmit RAM start address
bits : 0 - 15 (16 bit)
INEPTXFD : IN endpoint TxFIFO depth
bits : 16 - 31 (16 bit)
OTG_FS device IN endpoint transmit FIFO size register (OTG_FS_DIEPTXF2)
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INEPTXSA : IN endpoint FIFO3 transmit RAM start address
bits : 0 - 15 (16 bit)
INEPTXFD : IN endpoint TxFIFO depth
bits : 16 - 31 (16 bit)
OTG_FS device IN endpoint transmit FIFO size register (OTG_FS_DIEPTXF3)
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INEPTXSA : IN endpoint FIFO4 transmit RAM start address
bits : 0 - 15 (16 bit)
INEPTXFD : IN endpoint TxFIFO depth
bits : 16 - 31 (16 bit)
OTG_FS device IN endpoint transmit FIFO size register (OTG_FS_DIEPTXF4)
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INEPTXSA : IN endpoint FIFOx transmit RAM start address
bits : 0 - 15 (16 bit)
INEPTXFD : IN endpoint Tx FIFO depth
bits : 16 - 31 (16 bit)
OTG_FS device IN endpoint transmit FIFO size register (OTG_FS_DIEPTXF5)
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INEPTXSA : IN endpoint FIFOx transmit RAM start address
bits : 0 - 15 (16 bit)
INEPTXFD : IN endpoint Tx FIFO depth
bits : 16 - 31 (16 bit)
OTG_FS core interrupt register (OTG_FS_GINTSTS)
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMOD : Current mode of operation
bits : 0 - 0 (1 bit)
access : read-only
MMIS : Mode mismatch interrupt
bits : 1 - 1 (1 bit)
access : read-write
OTGINT : OTG interrupt
bits : 2 - 2 (1 bit)
access : read-only
SOF : Start of frame
bits : 3 - 3 (1 bit)
access : read-write
RXFLVL : RxFIFO non-empty
bits : 4 - 4 (1 bit)
access : read-only
NPTXFE : Non-periodic TxFIFO empty
bits : 5 - 5 (1 bit)
access : read-only
GINAKEFF : Global IN non-periodic NAK effective
bits : 6 - 6 (1 bit)
access : read-only
GOUTNAKEFF : Global OUT NAK effective
bits : 7 - 7 (1 bit)
access : read-only
ESUSP : Early suspend
bits : 10 - 10 (1 bit)
access : read-write
USBSUSP : USB suspend
bits : 11 - 11 (1 bit)
access : read-write
USBRST : USB reset
bits : 12 - 12 (1 bit)
access : read-write
ENUMDNE : Enumeration done
bits : 13 - 13 (1 bit)
access : read-write
ISOODRP : Isochronous OUT packet dropped interrupt
bits : 14 - 14 (1 bit)
access : read-write
EOPF : End of periodic frame interrupt
bits : 15 - 15 (1 bit)
access : read-write
IEPINT : IN endpoint interrupt
bits : 18 - 18 (1 bit)
access : read-only
OEPINT : OUT endpoint interrupt
bits : 19 - 19 (1 bit)
access : read-only
IISOIXFR : Incomplete isochronous IN transfer
bits : 20 - 20 (1 bit)
access : read-write
IPXFR_INCOMPISOOUT : Incomplete periodic transfer(Host mode)/Incomplete isochronous OUT transfer(Device mode)
bits : 21 - 21 (1 bit)
access : read-write
RSTDET : Reset detected interrupt
bits : 23 - 23 (1 bit)
access : read-write
HPRTINT : Host port interrupt
bits : 24 - 24 (1 bit)
access : read-only
HCINT : Host channels interrupt
bits : 25 - 25 (1 bit)
access : read-only
PTXFE : Periodic TxFIFO empty
bits : 26 - 26 (1 bit)
access : read-only
CIDSCHG : Connector ID status change
bits : 28 - 28 (1 bit)
access : read-write
DISCINT : Disconnect detected interrupt
bits : 29 - 29 (1 bit)
access : read-write
SRQINT : Session request/new session detected interrupt
bits : 30 - 30 (1 bit)
access : read-write
WKUPINT : Resume/remote wakeup detected interrupt
bits : 31 - 31 (1 bit)
access : read-write
OTG_FS interrupt mask register (OTG_FS_GINTMSK)
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMISM : Mode mismatch interrupt mask
bits : 1 - 1 (1 bit)
access : read-write
OTGINT : OTG interrupt mask
bits : 2 - 2 (1 bit)
access : read-write
SOFM : Start of frame mask
bits : 3 - 3 (1 bit)
access : read-write
RXFLVLM : Receive FIFO non-empty mask
bits : 4 - 4 (1 bit)
access : read-write
NPTXFEM : Non-periodic TxFIFO empty mask
bits : 5 - 5 (1 bit)
access : read-write
GINAKEFFM : Global non-periodic IN NAK effective mask
bits : 6 - 6 (1 bit)
access : read-write
GONAKEFFM : Global OUT NAK effective mask
bits : 7 - 7 (1 bit)
access : read-write
ESUSPM : Early suspend mask
bits : 10 - 10 (1 bit)
access : read-write
USBSUSPM : USB suspend mask
bits : 11 - 11 (1 bit)
access : read-write
USBRST : USB reset mask
bits : 12 - 12 (1 bit)
access : read-write
ENUMDNEM : Enumeration done mask
bits : 13 - 13 (1 bit)
access : read-write
ISOODRPM : Isochronous OUT packet dropped interrupt mask
bits : 14 - 14 (1 bit)
access : read-write
EOPFM : End of periodic frame interrupt mask
bits : 15 - 15 (1 bit)
access : read-write
IEPINT : IN endpoints interrupt mask
bits : 18 - 18 (1 bit)
access : read-write
OEPINT : OUT endpoints interrupt mask
bits : 19 - 19 (1 bit)
access : read-write
IISOIXFRM : Incomplete isochronous IN transfer mask
bits : 20 - 20 (1 bit)
access : read-write
IPXFRM_IISOOXFRM : Incomplete periodic transfer mask(Host mode)/Incomplete isochronous OUT transfer mask(Device mode)
bits : 21 - 21 (1 bit)
access : read-write
RSTDETM : Reset detected interrupt mask
bits : 23 - 23 (1 bit)
access : read-write
PRTIM : Host port interrupt mask
bits : 24 - 24 (1 bit)
access : read-only
HCIM : Host channels interrupt mask
bits : 25 - 25 (1 bit)
access : read-write
PTXFEM : Periodic TxFIFO empty mask
bits : 26 - 26 (1 bit)
access : read-write
LPMIN : LPM interrupt mask
bits : 27 - 27 (1 bit)
access : read-write
CIDSCHGM : Connector ID status change mask
bits : 28 - 28 (1 bit)
access : read-write
DISCINT : Disconnect detected interrupt mask
bits : 29 - 29 (1 bit)
access : read-write
SRQIM : Session request/new session detected interrupt mask
bits : 30 - 30 (1 bit)
access : read-write
WUIM : Resume/remote wakeup detected interrupt mask
bits : 31 - 31 (1 bit)
access : read-write
OTG_FS Receive status debug read(Device mode)
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
EPNUM : Endpoint number
bits : 0 - 3 (4 bit)
BCNT : Byte count
bits : 4 - 14 (11 bit)
DPID : Data PID
bits : 15 - 16 (2 bit)
PKTSTS : Packet status
bits : 17 - 20 (4 bit)
FRMNUM : Frame number
bits : 21 - 24 (4 bit)
OTG_FS Receive status debug read(Host mode)
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
alternate_register : OTG_FS_GRXSTSR_Device
reset_Mask : 0x0
CHNUM : Endpoint number
bits : 0 - 3 (4 bit)
BCNT : Byte count
bits : 4 - 14 (11 bit)
DPID : Data PID
bits : 15 - 16 (2 bit)
PKTSTS : Packet status
bits : 17 - 20 (4 bit)
OTG status read and pop register (Device mode)
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
EPNUM : Endpoint number
bits : 0 - 3 (4 bit)
BCNT : Byte count
bits : 4 - 14 (11 bit)
DPID : Data PID
bits : 15 - 16 (2 bit)
PKTSTS : Packet status
bits : 17 - 20 (4 bit)
FRMNUM : Frame number
bits : 21 - 24 (4 bit)
OTG status read and pop register (Host mode)
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
alternate_register : OTG_FS_GRXSTSP_Device
reset_Mask : 0x0
CHNUM : Channel number
bits : 0 - 3 (4 bit)
BCNT : Byte count
bits : 4 - 14 (11 bit)
DPID : Data PID
bits : 15 - 16 (2 bit)
PKTSTS : Packet status
bits : 17 - 20 (4 bit)
OTG_FS Receive FIFO size register (OTG_FS_GRXFSIZ)
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RXFD : RxFIFO depth
bits : 0 - 15 (16 bit)
OTG_FS Endpoint 0 Transmit FIFO size
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TX0FSA : Endpoint 0 transmit RAM start address
bits : 0 - 15 (16 bit)
TX0FD : Endpoint 0 TxFIFO depth
bits : 16 - 31 (16 bit)
OTG_FS Host non-periodic transmit FIFO size register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : OTG_FS_DIEPTXF0_Device
reset_Mask : 0x0
NPTXFSA : Non-periodic transmit RAM start address
bits : 0 - 15 (16 bit)
NPTXFD : Non-periodic TxFIFO depth
bits : 16 - 31 (16 bit)
OTG_FS non-periodic transmit FIFO/queue status register (OTG_FS_GNPTXSTS)
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
NPTXFSAV : Non-periodic TxFIFO space available
bits : 0 - 15 (16 bit)
NPTQXSAV : Non-periodic transmit request queue space available
bits : 16 - 23 (8 bit)
NPTXQTOP : Top of the non-periodic transmit request queue
bits : 24 - 30 (7 bit)
OTG I2C access register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RWDATA : I2C Read/Write Data
bits : 0 - 7 (8 bit)
REGADDR : I2C Register Address
bits : 8 - 15 (8 bit)
ADDR : I2C Address
bits : 16 - 22 (7 bit)
I2CEN : I2C Enable
bits : 23 - 23 (1 bit)
ACK : I2C ACK
bits : 24 - 24 (1 bit)
I2CDEVADR : I2C Device Address
bits : 26 - 27 (2 bit)
I2CDATSE0 : I2C DatSe0 USB mode
bits : 28 - 28 (1 bit)
RW : Read/Write Indicator
bits : 30 - 30 (1 bit)
BSYDNE : I2C Busy/Done
bits : 31 - 31 (1 bit)
OTG_FS general core configuration register (OTG_FS_GCCFG)
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DCDET : Data contact detection (DCD) status
bits : 0 - 0 (1 bit)
PDET : Primary detection (PD) status
bits : 1 - 1 (1 bit)
SDET : Secondary detection (SD) status
bits : 2 - 2 (1 bit)
PS2DET : DM pull-up detection status
bits : 3 - 3 (1 bit)
PWRDWN : Power down
bits : 16 - 16 (1 bit)
BCDEN : Battery charging detector (BCD) enable
bits : 17 - 17 (1 bit)
DCDEN : Data contact detection (DCD) mode enable
bits : 18 - 18 (1 bit)
PDEN : Primary detection (PD) mode enable
bits : 19 - 19 (1 bit)
SDEN : Secondary detection (SD) mode enable
bits : 20 - 20 (1 bit)
VBDEN : USB VBUS detection enable
bits : 21 - 21 (1 bit)
core ID register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRODUCT_ID : Product ID field
bits : 0 - 31 (32 bit)
OTG_FS interrupt register (OTG_FS_GOTGINT)
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEDET : Session end detected
bits : 2 - 2 (1 bit)
SRSSCHG : Session request success status change
bits : 8 - 8 (1 bit)
HNSSCHG : Host negotiation success status change
bits : 9 - 9 (1 bit)
HNGDET : Host negotiation detected
bits : 17 - 17 (1 bit)
ADTOCHG : A-device timeout change
bits : 18 - 18 (1 bit)
DBCDNE : Debounce done
bits : 19 - 19 (1 bit)
IDCHNG : ID input pin changed
bits : 20 - 20 (1 bit)
OTG core LPM configuration register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LPMEN : LPM support enable
bits : 0 - 0 (1 bit)
access : read-write
LPMACK : LPM token acknowledge enable
bits : 1 - 1 (1 bit)
access : read-write
BESL : Best effort service latency
bits : 2 - 5 (4 bit)
access : read-write
REMWAKE : bRemoteWake value
bits : 6 - 6 (1 bit)
access : read-write
L1SSEN : L1 Shallow Sleep enable
bits : 7 - 7 (1 bit)
access : read-write
BESLTHRS : BESL threshold
bits : 8 - 11 (4 bit)
access : read-write
L1DSEN : L1 deep sleep enable
bits : 12 - 12 (1 bit)
access : read-write
LPMRST : LPM response
bits : 13 - 14 (2 bit)
access : read-only
SLPSTS : Port sleep status
bits : 15 - 15 (1 bit)
access : read-only
L1RSMOK : Sleep State Resume OK
bits : 16 - 16 (1 bit)
access : read-only
LPMCHIDX : LPM Channel Index
bits : 17 - 20 (4 bit)
access : read-write
LPMRCNT : LPM retry count
bits : 21 - 23 (3 bit)
access : read-write
SNDLPM : Send LPM transaction
bits : 24 - 24 (1 bit)
access : read-write
LPMRCNTSTS : LPM retry count status
bits : 25 - 27 (3 bit)
access : read-only
ENBESL : Enable best effort service latency
bits : 28 - 28 (1 bit)
access : read-write
OTG power down register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADPMEN : ADP module enable
bits : 0 - 0 (1 bit)
ADPIF : ADP interrupt flag
bits : 23 - 23 (1 bit)
OTG ADP timer, control and status register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRBDSCHG : Probe discharge
bits : 0 - 1 (2 bit)
access : read-write
PRBDELTA : Probe delta
bits : 2 - 3 (2 bit)
access : read-write
PRBPER : Probe period
bits : 4 - 5 (2 bit)
access : read-write
RTIM : Ramp time
bits : 6 - 16 (11 bit)
access : read-only
ENAPRB : Enable probe
bits : 17 - 17 (1 bit)
access : read-write
ENASNS : Enable sense
bits : 18 - 18 (1 bit)
access : read-write
ADPRST : ADP reset
bits : 19 - 19 (1 bit)
access : read-only
ADPEN : ADP enable
bits : 20 - 20 (1 bit)
access : read-write
ADPPRBIF : ADP probe interrupt flag
bits : 21 - 21 (1 bit)
access : read-write
ADPSNSIF : ADP sense interrupt flag
bits : 22 - 22 (1 bit)
access : read-write
ADPTOIF : ADP timeout interrupt flag
bits : 23 - 23 (1 bit)
access : read-write
ADPPRBIM : ADP probe interrupt mask
bits : 24 - 24 (1 bit)
access : read-write
ADPSNSIM : ADP sense interrupt mask
bits : 25 - 25 (1 bit)
access : read-write
ADPTOIM : ADP timeout interrupt mask
bits : 26 - 26 (1 bit)
access : read-write
AR : Access request
bits : 27 - 28 (2 bit)
access : read-write
OTG_FS AHB configuration register (OTG_FS_GAHBCFG)
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GINT : Global interrupt mask
bits : 0 - 0 (1 bit)
TXFELVL : TxFIFO empty level
bits : 7 - 7 (1 bit)
PTXFELVL : Periodic TxFIFO empty level
bits : 8 - 8 (1 bit)
OTG_FS USB configuration register (OTG_FS_GUSBCFG)
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TOCAL : FS timeout calibration
bits : 0 - 2 (3 bit)
access : read-write
PHYSEL : Full Speed serial transceiver select
bits : 6 - 6 (1 bit)
access : write-only
SRPCAP : SRP-capable
bits : 8 - 8 (1 bit)
access : read-write
HNPCAP : HNP-capable
bits : 9 - 9 (1 bit)
access : read-write
TRDT : USB turnaround time
bits : 10 - 13 (4 bit)
access : read-write
FHMOD : Force host mode
bits : 29 - 29 (1 bit)
access : read-write
FDMOD : Force device mode
bits : 30 - 30 (1 bit)
access : read-write
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