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address_offset : 0x0 Bytes (0x0)
size : 0x41 byte (0x0)
mem_usage : registers
protection : not protected
CPUID base register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Revision : Revision number
bits : 0 - 3 (4 bit)
PartNo : Part number of the processor
bits : 4 - 15 (12 bit)
Architecture : Reads as 0xF
bits : 16 - 19 (4 bit)
Variant : Variant number
bits : 20 - 23 (4 bit)
Implementer : Implementer code
bits : 24 - 31 (8 bit)
System control register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLEEPONEXIT : SLEEPONEXIT
bits : 1 - 1 (1 bit)
SLEEPDEEP : SLEEPDEEP
bits : 2 - 2 (1 bit)
SEVEONPEND : Send Event on Pending bit
bits : 4 - 4 (1 bit)
Configuration and control register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NONBASETHRDENA : Configures how the processor enters Thread mode
bits : 0 - 0 (1 bit)
USERSETMPEND : USERSETMPEND
bits : 1 - 1 (1 bit)
UNALIGN__TRP : UNALIGN_ TRP
bits : 3 - 3 (1 bit)
DIV_0_TRP : DIV_0_TRP
bits : 4 - 4 (1 bit)
BFHFNMIGN : BFHFNMIGN
bits : 8 - 8 (1 bit)
STKALIGN : STKALIGN
bits : 9 - 9 (1 bit)
System handler priority registers
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_11 : Priority of system handler 11
bits : 24 - 31 (8 bit)
System handler priority registers
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_14 : Priority of system handler 14
bits : 16 - 23 (8 bit)
PRI_15 : Priority of system handler 15
bits : 24 - 31 (8 bit)
Interrupt control and state register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VECTACTIVE : Active vector
bits : 0 - 8 (9 bit)
RETTOBASE : Return to base level
bits : 11 - 11 (1 bit)
VECTPENDING : Pending vector
bits : 12 - 18 (7 bit)
ISRPENDING : Interrupt pending flag
bits : 22 - 22 (1 bit)
PENDSTCLR : SysTick exception clear-pending bit
bits : 25 - 25 (1 bit)
PENDSTSET : SysTick exception set-pending bit
bits : 26 - 26 (1 bit)
PENDSVCLR : PendSV clear-pending bit
bits : 27 - 27 (1 bit)
PENDSVSET : PendSV set-pending bit
bits : 28 - 28 (1 bit)
NMIPENDSET : NMI set-pending bit.
bits : 31 - 31 (1 bit)
Vector table offset register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TBLOFF : Vector table base offset field
bits : 7 - 31 (25 bit)
Application interrupt and reset control register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VECTCLRACTIVE : VECTCLRACTIVE
bits : 1 - 1 (1 bit)
SYSRESETREQ : SYSRESETREQ
bits : 2 - 2 (1 bit)
ENDIANESS : ENDIANESS
bits : 15 - 15 (1 bit)
VECTKEYSTAT : Register key
bits : 16 - 31 (16 bit)
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