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MFS0

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x4 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x8 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0xC Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x10 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x1D Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

Registers

UART_SMR

CSIO_SMR

I2C_SMR

UART_SCR

CSIO_SCR

I2C_IBCR

I2C_ISBA

I2C_ISMK

I2C_EIBCR

UART_ESCR

CSIO_ESCR

I2C_IBSR

UART_SSR

CSIO_SSR

I2C_SSR

UART_RDR

UART_TDR

CSIO_RDR

CSIO_TDR

I2C_RDR

I2C_TDR

UART_BGR

CSIO_BGR

I2C_BGR


UART_SMR

Serial Mode Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_SMR UART_SMR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SOE BDS SBL WUCR MD

SOE : Serial data output enable bit
bits : 0 - -1 (0 bit)
access : read-write

BDS : Transfer direction select bit
bits : 2 - 1 (0 bit)
access : read-write

SBL : Stop bit length select bit
bits : 3 - 2 (0 bit)
access : read-write

WUCR : Wake-up control bit
bits : 4 - 3 (0 bit)
access : read-write

MD : Operation mode set bit
bits : 5 - 6 (2 bit)
access : read-write


CSIO_SMR

Serial Mode Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SMR CSIO_SMR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SOE SCKE BDS SCINV WUCR MD

SOE : Serial data output enable bit
bits : 0 - -1 (0 bit)
access : read-write

SCKE : Master mode serial clock output enable bit
bits : 1 - 0 (0 bit)
access : read-write

BDS : Transfer direction select bit
bits : 2 - 1 (0 bit)
access : read-write

SCINV : Serial clock invert bit
bits : 3 - 2 (0 bit)
access : read-write

WUCR : Wake-up control bit
bits : 4 - 3 (0 bit)
access : read-write

MD : Operation mode set bits
bits : 5 - 6 (2 bit)
access : read-write


I2C_SMR

Serial Mode Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_SMR I2C_SMR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TIE RIE WUCR MD

TIE : Transmit interrupt enable bit
bits : 2 - 1 (0 bit)
access : read-write

RIE : Received interrupt enable bit
bits : 3 - 2 (0 bit)
access : read-write

WUCR : Wake-up control bit
bits : 4 - 3 (0 bit)
access : read-write

MD : operation mode set bits
bits : 5 - 6 (2 bit)
access : read-write


UART_SCR

Serial Control Register
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_SCR UART_SCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TXE RXE TBIE TIE RIE UPCL

TXE : Transmission operation enable bit
bits : 0 - -1 (0 bit)
access : read-write

RXE : Received operation enable bit
bits : 1 - 0 (0 bit)
access : read-write

TBIE : Transmit bus idle interrupt enable bit
bits : 2 - 1 (0 bit)
access : read-write

TIE : Transmit interrupt enable bit
bits : 3 - 2 (0 bit)
access : read-write

RIE : Received interrupt enable bit
bits : 4 - 3 (0 bit)
access : read-write

UPCL : Programmable Clear bit
bits : 7 - 6 (0 bit)
access : read-write


CSIO_SCR

Serial Control Register
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SCR CSIO_SCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TXE RXE TBIE TIE RIE SPI MS UPCL

TXE : Data transmission enable bit
bits : 0 - -1 (0 bit)
access : read-write

RXE : Data received enable bit
bits : 1 - 0 (0 bit)
access : read-write

TBIE : Transmit bus idle interrupt enable bit
bits : 2 - 1 (0 bit)
access : read-write

TIE : Transmit interrupt enable bit
bits : 3 - 2 (0 bit)
access : read-write

RIE : Received interrupt enable bit
bits : 4 - 3 (0 bit)
access : read-write

SPI : SPI corresponding bit
bits : 5 - 4 (0 bit)
access : read-write

MS : Master/Slave function select bit
bits : 6 - 5 (0 bit)
access : read-write

UPCL : Programmable clear bit
bits : 7 - 6 (0 bit)
access : read-write


I2C_IBCR

I2C Bus Control Register
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_IBCR I2C_IBCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INT BER INTE CNDE WSEL ACKE ACT_SCC MSS

INT : interrupt flag bit
bits : 0 - -1 (0 bit)
access : read-write

BER : Bus error flag bit
bits : 1 - 0 (0 bit)
access : read-only

INTE : Interrupt enable bit
bits : 2 - 1 (0 bit)
access : read-write

CNDE : Condition detection interrupt enable bit
bits : 3 - 2 (0 bit)
access : read-write

WSEL : Wait selection bit
bits : 4 - 3 (0 bit)
access : read-write

ACKE : Data byte acknowledge enable bit
bits : 5 - 4 (0 bit)
access : read-write

ACT_SCC : Operation flag/iteration start condition generation bit
bits : 6 - 5 (0 bit)
access : read-write

MSS : Master/slave select bit
bits : 7 - 6 (0 bit)
access : read-write


I2C_ISBA

7-bit Slave Address Register
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_ISBA I2C_ISBA read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SA SAEN

SA : 7-bit slave address
bits : 0 - 5 (6 bit)
access : read-write

SAEN : Slave address enable bit
bits : 7 - 6 (0 bit)
access : read-write


I2C_ISMK

7-bit Slave Address Mask Register
address_offset : 0x11 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_ISMK I2C_ISMK read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SM EN

SM : Slave address mask bits
bits : 0 - 5 (6 bit)
access : read-write

EN : I2C interface operation enable bit
bits : 7 - 6 (0 bit)
access : read-write


I2C_EIBCR

Extension I2C Bus Control Register
address_offset : 0x1D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_EIBCR I2C_EIBCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BEC SOCE SCLC SDAC SCLS SDAS

BEC : Bus error control bit
bits : 0 - -1 (0 bit)
access : read-write

SOCE : Serial output enabled bit
bits : 1 - 0 (0 bit)
access : read-write

SCLC : SCL output control bit
bits : 2 - 1 (0 bit)
access : read-write

SDAC : SDA output control bit
bits : 3 - 2 (0 bit)
access : read-write

SCLS : SCL status bit
bits : 4 - 3 (0 bit)
access : read-write

SDAS : SDA status bit
bits : 5 - 4 (0 bit)
access : read-write


UART_ESCR

Extended Communication Control Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_ESCR UART_ESCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 L P PEN INV ESBL FLWEN

L : Data length select bit
bits : 0 - 1 (2 bit)
access : read-write

P : Parity select bit (only functions in operation mode 0)
bits : 3 - 2 (0 bit)
access : read-write

PEN : Parity enable bit (only functions in operation mode 0)
bits : 4 - 3 (0 bit)
access : read-write

INV : Inverted serial data format bit
bits : 5 - 4 (0 bit)
access : read-write

ESBL : Extension stop bit length select bit
bits : 6 - 5 (0 bit)
access : read-write

FLWEN : Flow control enable bit
bits : 7 - 6 (0 bit)
access : read-write


CSIO_ESCR

Extended Communication Control Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_ESCR CSIO_ESCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 L WT SOP

L : Data length select bits
bits : 0 - 1 (2 bit)
access : read-write

WT : Data transmit/received wait select bits
bits : 3 - 3 (1 bit)
access : read-write

SOP : Serial output pin set bit
bits : 7 - 6 (0 bit)
access : read-write


I2C_IBSR

I2C Bus Status Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_IBSR I2C_IBSR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BB SPC RSC AL TRX RSA RACK FBT

BB : Bus state bit
bits : 0 - -1 (0 bit)
access : read-only

SPC : Stop condition check bit
bits : 1 - 0 (0 bit)
access : read-write

RSC : Iteration start condition check bit
bits : 2 - 1 (0 bit)
access : read-write

AL : Arbitration lost bit
bits : 3 - 2 (0 bit)
access : read-only

TRX : Data direction bit
bits : 4 - 3 (0 bit)
access : read-only

RSA : Reserved address detection bit
bits : 5 - 4 (0 bit)
access : read-only

RACK : Acknowledge flag bit
bits : 6 - 5 (0 bit)
access : read-only

FBT : First byte bit
bits : 7 - 6 (0 bit)
access : read-only


UART_SSR

Serial Status Register
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_SSR UART_SSR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TBI TDRE RDRF ORE FRE PE REC

TBI : Transmit bus idle flag
bits : 0 - -1 (0 bit)
access : read-only

TDRE : Transmit data empty flag bit
bits : 1 - 0 (0 bit)
access : read-only

RDRF : Received data full flag bit
bits : 2 - 1 (0 bit)
access : read-only

ORE : Overrun error flag bit
bits : 3 - 2 (0 bit)
access : read-only

FRE : Framing error flag bit
bits : 4 - 3 (0 bit)
access : read-only

PE : Parity error flag bit (only functions in operation mode 0)
bits : 5 - 4 (0 bit)
access : read-only

REC : Received error flag clear bit
bits : 7 - 6 (0 bit)
access : read-write


CSIO_SSR

Serial Status Register
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SSR CSIO_SSR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TBI TDRE RDRF ORE REC

TBI : Transmit bus idle flag bit
bits : 0 - -1 (0 bit)
access : read-only

TDRE : Transmit data empty flag bit
bits : 1 - 0 (0 bit)
access : read-only

RDRF : Received data full flag bit
bits : 2 - 1 (0 bit)
access : read-only

ORE : Overrun error flag bit
bits : 3 - 2 (0 bit)
access : read-only

REC : Received error flag clear bit
bits : 7 - 6 (0 bit)
access : read-write


I2C_SSR

Serial Status Register
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_SSR I2C_SSR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TBI TDRE RDRF ORE TBIE DMA TSET REC

TBI : Transmit bus idle flag bit (Effective only when DMA mode is enabled)
bits : 0 - -1 (0 bit)
access : read-only

TDRE : Transmit data empty flag bit
bits : 1 - 0 (0 bit)
access : read-only

RDRF : Received data full flag bit
bits : 2 - 1 (0 bit)
access : read-only

ORE : Overrun error flag bit
bits : 3 - 2 (0 bit)
access : read-only

TBIE : Transmit bus idle interrupt enable bit (Effective only when DMA mode is enabled)
bits : 4 - 3 (0 bit)
access : read-write

DMA : DMA mode enable bit
bits : 5 - 4 (0 bit)
access : read-write

TSET : Transmit empty flag set bit
bits : 6 - 5 (0 bit)
access : read-write

REC : Received error flag clear bit
bits : 7 - 6 (0 bit)
access : read-write


UART_RDR

Received Data Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_RDR UART_RDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

UART_TDR

Transmit Data Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : write-only
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_TDR UART_TDR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

CSIO_RDR

Received Data Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_RDR CSIO_RDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

CSIO_TDR

Transmit Data Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : write-only
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_TDR CSIO_TDR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

I2C_RDR

Received Data Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_RDR I2C_RDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

I2C_TDR

Transmit Data Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : write-only
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_TDR I2C_TDR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

UART_BGR

Baud Rate Generator Registers
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_BGR UART_BGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BGR0 BGR1 EXT

BGR0 : Baud Rate Generator Registers 0
bits : 0 - 6 (7 bit)
access : read-write

BGR1 : Baud Rate Generator Registers 1
bits : 8 - 13 (6 bit)
access : read-write

EXT : External clock select bit
bits : 15 - 14 (0 bit)
access : read-write


CSIO_BGR

Baud Rate Generator Registers
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_BGR CSIO_BGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BGR0 BGR1

BGR0 : Baud Rate Generator Registers 0
bits : 0 - 6 (7 bit)
access : read-write

BGR1 : Baud Rate Generator Registers 1
bits : 8 - 13 (6 bit)
access : read-write


I2C_BGR

Baud Rate Generator Registers
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_BGR I2C_BGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BGR0 BGR1

BGR0 : Baud Rate Generator Registers 0
bits : 0 - 6 (7 bit)
access : read-write

BGR1 : Baud Rate Generator Registers 1
bits : 8 - 13 (6 bit)
access : read-write



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