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MFT_PPG

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x14 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x34 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x40 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x48 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x50 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x54 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0xC Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x8 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x10 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x20 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x28 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x30 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x2C Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x100 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x104 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x200 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x204 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x208 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x20C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x210 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x214 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x218 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x240 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x244 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x248 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x24C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x250 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x254 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x258 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x280 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x284 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x288 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x28C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x290 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x294 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x298 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x2C0 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x2C4 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x2C8 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x2CC Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x2D0 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x2D4 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x2D8 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x4C Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x140 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x144 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x300 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x304 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x308 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x30C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x310 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x314 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x318 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x340 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x344 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x348 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x34C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x350 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x354 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x358 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

Registers

TTCR0

COMP4

TRG

REVC

COMP6

TRG1

REVC1

TTCR1

PPGC1

PPGC0

PPGC3

PPGC2

PRLL0

PRLH0

PRLL1

PRLH1

PRLL2

PRLH2

PRLL3

PRLH3

GATEC0

PPGC5

PPGC4

PPGC7

PPGC6

PRLL4

PRLH4

PRLL5

PRLH5

PRLL6

PRLH6

PRLL7

PRLH7

GATEC4

COMP1

PPGC9

PPGC8

PPGC11

PPGC10

PRLL8

PRLH8

PRLL9

PRLH9

PRLL10

PRLH10

PRLL11

PRLH11

GATEC8

COMP3

PPGC13

PPGC12

PPGC15

PPGC14

PRLL12

PRLH12

PRLL13

PRLH13

PRLL14

PRLH14

PRLL15

PRLH15

GATEC12

COMP5

PPGC17

PPGC16

PPGC19

PPGC18

PRLL16

PRLH16

PRLL17

PRLH17

PRLL18

PRLH18

PRLL19

PRLH19

GATEC16

COMP7

PPGC21

PPGC20

PPGC23

PPGC22

PRLL20

PRLH20

PRLL21

PRLH21

PRLL22

PRLH22

PRLL23

PRLH23

GATEC20

TTCR2

COMP8

COMP10

COMP12

COMP14

COMP0

COMP2


TTCR0

PPG Start Trigger Control Register 0
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TTCR0 TTCR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STR0 MONI0 CS0 TRG0O TRG2O TRG4O TRG6O

STR0 : 8-bit UP counter operation enable bit for comparison
bits : 8 - 7 (0 bit)
access : read-write

MONI0 : 8-bit UP counter operation state monitor bit for comparison
bits : 9 - 8 (0 bit)
access : read-only

CS0 : 8-bit UP counter clock select bits for comparison
bits : 10 - 10 (1 bit)
access : read-write

TRG0O : PPG0 trigger stop bit
bits : 12 - 11 (0 bit)
access : read-write

TRG2O : PPG2 trigger stop bit
bits : 13 - 12 (0 bit)
access : read-write

TRG4O : PPG4 trigger stop bit
bits : 14 - 13 (0 bit)
access : read-write

TRG6O : PPG6 trigger stop bit
bits : 15 - 14 (0 bit)
access : read-write


COMP4

PPG Compare Register 4
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP4 COMP4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TRG

PPG Start Register 0
address_offset : 0x100 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TRG TRG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PEN00 PEN01 PEN02 PEN03 PEN04 PEN05 PEN06 PEN07 PEN08 PEN09 PEN10 PEN11 PEN12 PEN13 PEN14 PEN15

PEN00 : PPG0 Start Trigger bit
bits : 0 - -1 (0 bit)
access : read-write

PEN01 : PPG1 Start Trigger bit
bits : 1 - 0 (0 bit)
access : read-write

PEN02 : PPG2 Start Trigger bit
bits : 2 - 1 (0 bit)
access : read-write

PEN03 : PPG3 Start Trigger bit
bits : 3 - 2 (0 bit)
access : read-write

PEN04 : PPG4 Start Trigger bit
bits : 4 - 3 (0 bit)
access : read-write

PEN05 : PPG5 Start Trigger bit
bits : 5 - 4 (0 bit)
access : read-write

PEN06 : PPG6 Start Trigger bit
bits : 6 - 5 (0 bit)
access : read-write

PEN07 : PPG7 Start Trigger bit
bits : 7 - 6 (0 bit)
access : read-write

PEN08 : PPG8 Start Trigger bit
bits : 8 - 7 (0 bit)
access : read-write

PEN09 : PPG9 Start Trigger bit
bits : 9 - 8 (0 bit)
access : read-write

PEN10 : PPG10 Start Trigger bit
bits : 10 - 9 (0 bit)
access : read-write

PEN11 : PPG11 Start Trigger bit
bits : 11 - 10 (0 bit)
access : read-write

PEN12 : PPG12 Start Trigger bit
bits : 12 - 11 (0 bit)
access : read-write

PEN13 : PPG13 Start Trigger bit
bits : 13 - 12 (0 bit)
access : read-write

PEN14 : PPG14 Start Trigger bit
bits : 14 - 13 (0 bit)
access : read-write

PEN15 : PPG15 Start Trigger bit
bits : 15 - 14 (0 bit)
access : read-write


REVC

Output Reverse Register 0
address_offset : 0x104 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

REVC REVC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REV00 REV01 REV02 REV03 REV04 REV05 REV06 REV07 REV08 REV09 REV10 REV11 REV12 REV13 REV14 REV15

REV00 : PPG0 Output Reverse Enable bit
bits : 0 - -1 (0 bit)
access : read-write

REV01 : PPG1 Output Reverse Enable bit
bits : 1 - 0 (0 bit)
access : read-write

REV02 : PPG2 Output Reverse Enable bit
bits : 2 - 1 (0 bit)
access : read-write

REV03 : PPG3 Output Reverse Enable bit
bits : 3 - 2 (0 bit)
access : read-write

REV04 : PPG4 Output Reverse Enable bit
bits : 4 - 3 (0 bit)
access : read-write

REV05 : PPG5 Output Reverse Enable bit
bits : 5 - 4 (0 bit)
access : read-write

REV06 : PPG6 Output Reverse Enable bit
bits : 6 - 5 (0 bit)
access : read-write

REV07 : PPG7 Output Reverse Enable bit
bits : 7 - 6 (0 bit)
access : read-write

REV08 : PPG8 Output Reverse Enable bit
bits : 8 - 7 (0 bit)
access : read-write

REV09 : PPG9 Output Reverse Enable bit
bits : 9 - 8 (0 bit)
access : read-write

REV10 : PPG10 Output Reverse Enable bit
bits : 10 - 9 (0 bit)
access : read-write

REV11 : PPG11 Output Reverse Enable bit
bits : 11 - 10 (0 bit)
access : read-write

REV12 : PPG12 Output Reverse Enable bit
bits : 12 - 11 (0 bit)
access : read-write

REV13 : PPG13 Output Reverse Enable bit
bits : 13 - 12 (0 bit)
access : read-write

REV14 : PPG14 Output Reverse Enable bit
bits : 14 - 13 (0 bit)
access : read-write

REV15 : PPG15 Output Reverse Enable bit
bits : 15 - 14 (0 bit)
access : read-write


COMP6

PPG Compare Register 6
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP6 COMP6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TRG1

PPG Start Register 1
address_offset : 0x140 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TRG1 TRG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PEN16 PEN17 PEN18 PEN19 PEN20 PEN21 PEN22 PEN23

PEN16 : PPG16 Start Trigger bit
bits : 0 - -1 (0 bit)
access : read-write

PEN17 : PPG17 Start Trigger bit
bits : 1 - 0 (0 bit)
access : read-write

PEN18 : PPG18 Start Trigger bit
bits : 2 - 1 (0 bit)
access : read-write

PEN19 : PPG19 Start Trigger bit
bits : 3 - 2 (0 bit)
access : read-write

PEN20 : PPG20 Start Trigger bit
bits : 4 - 3 (0 bit)
access : read-write

PEN21 : PPG21 Start Trigger bit
bits : 5 - 4 (0 bit)
access : read-write

PEN22 : PPG22 Start Trigger bit
bits : 6 - 5 (0 bit)
access : read-write

PEN23 : PPG23 Start Trigger bit
bits : 7 - 6 (0 bit)
access : read-write


REVC1

Output Reverse Register 1
address_offset : 0x144 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

REVC1 REVC1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REV16 REV17 REV18 REV19 REV20 REV21 REV22 REV23

REV16 : PPG16 Output Reverse Enable bit
bits : 0 - -1 (0 bit)
access : read-write

REV17 : PPG17 Output Reverse Enable bit
bits : 1 - 0 (0 bit)
access : read-write

REV18 : PPG18 Output Reverse Enable bit
bits : 2 - 1 (0 bit)
access : read-write

REV19 : PPG19 Output Reverse Enable bit
bits : 3 - 2 (0 bit)
access : read-write

REV20 : PPG20 Output Reverse Enable bit
bits : 4 - 3 (0 bit)
access : read-write

REV21 : PPG21 Output Reverse Enable bit
bits : 5 - 4 (0 bit)
access : read-write

REV22 : PPG22 Output Reverse Enable bit
bits : 6 - 5 (0 bit)
access : read-write

REV23 : PPG23 Output Reverse Enable bit
bits : 7 - 6 (0 bit)
access : read-write


TTCR1

PPG Start Trigger Control Register 1
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TTCR1 TTCR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STR1 MONI1 CS1 TRG1O TRG3O TRG5O TRG7O

STR1 : 8-bit UP counter operation enable bit for comparison
bits : 8 - 7 (0 bit)
access : read-write

MONI1 : 8-bit UP counter operation state monitor bit for comparison
bits : 9 - 8 (0 bit)
access : read-only

CS1 : 8-bit UP counter clock select bits for comparison
bits : 10 - 10 (1 bit)
access : read-write

TRG1O : PPG1 trigger stop bit
bits : 12 - 11 (0 bit)
access : read-write

TRG3O : PPG3 trigger stop bit
bits : 13 - 12 (0 bit)
access : read-write

TRG5O : PPG5 trigger stop bit
bits : 14 - 13 (0 bit)
access : read-write

TRG7O : PPG7 trigger stop bit
bits : 15 - 14 (0 bit)
access : read-write


PPGC1

PPG Operation Mode Control Register 1
address_offset : 0x200 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC1 PPGC1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC0

PPG Operation Mode Control Register 0
address_offset : 0x201 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC0 PPGC0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TTRG MD PCS INTM PUF PIE

TTRG : PPG start trigger select bit
bits : 0 - -1 (0 bit)
access : read-write

MD : PPG Operation Mode Set bits
bits : 1 - 1 (1 bit)
access : read-write

PCS : PPG DOWN Counter Operation Clock Select bits
bits : 3 - 3 (1 bit)
access : read-write

INTM : Interrupt Mode Select bit
bits : 5 - 4 (0 bit)
access : read-write

PUF : PPG Counter Underflow bit
bits : 6 - 5 (0 bit)
access : read-write

PIE : PPG Interrupt Enable bit
bits : 7 - 6 (0 bit)
access : read-write


PPGC3

PPG Operation Mode Control Register 3
address_offset : 0x204 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC3 PPGC3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC2

PPG Operation Mode Control Register 2
address_offset : 0x205 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC2 PPGC2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL0

PPG0 Reload Registers Low
address_offset : 0x208 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL0 PRLL0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRLL

PRLL : Reload Registers Low
bits : 0 - 6 (7 bit)
access : read-write


PRLH0

PPG0 Reload Registers High
address_offset : 0x209 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH0 PRLH0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRLH

PRLH : Reload Registers High
bits : 0 - 6 (7 bit)
access : read-write


PRLL1

PPG1 Reload Registers Low
address_offset : 0x20C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL1 PRLL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH1

PPG1 Reload Registers High
address_offset : 0x20D Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH1 PRLH1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL2

PPG2 Reload Registers Low
address_offset : 0x210 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL2 PRLL2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH2

PPG2 Reload Registers High
address_offset : 0x211 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH2 PRLH2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL3

PPG3 Reload Registers Low
address_offset : 0x214 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL3 PRLL3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH3

PPG3 Reload Registers High
address_offset : 0x215 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH3 PRLH3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

GATEC0

PPG Gate Function Control Registers 0
address_offset : 0x218 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GATEC0 GATEC0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EDGE0 STRG0 EDGE2 STRG2

EDGE0 : Select Start Effective Level for PPG0
bits : 0 - -1 (0 bit)
access : read-write

STRG0 : Select a trigger for PPG0
bits : 1 - 0 (0 bit)
access : read-write

EDGE2 : Select Start Effective Level for PPG2
bits : 4 - 3 (0 bit)
access : read-write

STRG2 : Select a trigger for PPG2
bits : 5 - 4 (0 bit)
access : read-write


PPGC5

PPG Operation Mode Control Register 5
address_offset : 0x240 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC5 PPGC5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC4

PPG Operation Mode Control Register 4
address_offset : 0x241 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC4 PPGC4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC7

PPG Operation Mode Control Register 7
address_offset : 0x244 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC7 PPGC7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC6

PPG Operation Mode Control Register 6
address_offset : 0x245 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC6 PPGC6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL4

PPG4 Reload Registers Low
address_offset : 0x248 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL4 PRLL4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH4

PPG4 Reload Registers High
address_offset : 0x249 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH4 PRLH4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL5

PPG5 Reload Registers Low
address_offset : 0x24C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL5 PRLL5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH5

PPG5 Reload Registers High
address_offset : 0x24D Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH5 PRLH5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL6

PPG6 Reload Registers Low
address_offset : 0x250 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL6 PRLL6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH6

PPG6 Reload Registers High
address_offset : 0x251 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH6 PRLH6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL7

PPG7 Reload Registers Low
address_offset : 0x254 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL7 PRLL7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH7

PPG7 Reload Registers High
address_offset : 0x255 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH7 PRLH7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

GATEC4

PPG Gate Function Control Registers 4
address_offset : 0x258 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GATEC4 GATEC4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EDGE4 STRG4 EDGE6 STRG6

EDGE4 : Select Start Effective Level for PPG4
bits : 0 - -1 (0 bit)
access : read-write

STRG4 : Select a trigger for PPG4
bits : 1 - 0 (0 bit)
access : read-write

EDGE6 : Select Start Effective Level for PPG6
bits : 4 - 3 (0 bit)
access : read-write

STRG6 : Select a trigger for PPG6
bits : 5 - 4 (0 bit)
access : read-write


COMP1

PPG Compare Register 1
address_offset : 0x28 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP1 COMP1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC9

PPG Operation Mode Control Register 9
address_offset : 0x280 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC9 PPGC9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC8

PPG Operation Mode Control Register 8
address_offset : 0x281 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC8 PPGC8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC11

PPG Operation Mode Control Register 11
address_offset : 0x284 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC11 PPGC11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC10

PPG Operation Mode Control Register 10
address_offset : 0x285 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC10 PPGC10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL8

PPG8 Reload Registers Low
address_offset : 0x288 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL8 PRLL8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH8

PPG8 Reload Registers High
address_offset : 0x289 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH8 PRLH8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL9

PPG9 Reload Registers Low
address_offset : 0x28C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL9 PRLL9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH9

PPG9 Reload Registers High
address_offset : 0x28D Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH9 PRLH9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL10

PPG10 Reload Registers Low
address_offset : 0x290 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL10 PRLL10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH10

PPG10 Reload Registers High
address_offset : 0x291 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH10 PRLH10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL11

PPG11 Reload Registers Low
address_offset : 0x294 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL11 PRLL11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH11

PPG11 Reload Registers High
address_offset : 0x295 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH11 PRLH11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

GATEC8

PPG Gate Function Control Registers 8
address_offset : 0x298 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GATEC8 GATEC8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EDGE8 STRG8 EDGE10 STRG10

EDGE8 : Select Start Effective Level for PPG8
bits : 0 - -1 (0 bit)
access : read-write

STRG8 : Select a trigger for PPG8
bits : 1 - 0 (0 bit)
access : read-write

EDGE10 : Select Start Effective Level for PPG10
bits : 4 - 3 (0 bit)
access : read-write

STRG10 : Select a trigger for PPG10
bits : 5 - 4 (0 bit)
access : read-write


COMP3

PPG Compare Register 3
address_offset : 0x2C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP3 COMP3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC13

PPG Operation Mode Control Register 13
address_offset : 0x2C0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC13 PPGC13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC12

PPG Operation Mode Control Register 12
address_offset : 0x2C1 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC12 PPGC12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC15

PPG Operation Mode Control Register 15
address_offset : 0x2C4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC15 PPGC15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC14

PPG Operation Mode Control Register 14
address_offset : 0x2C5 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC14 PPGC14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL12

PPG12 Reload Registers Low
address_offset : 0x2C8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL12 PRLL12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH12

PPG12 Reload Registers High
address_offset : 0x2C9 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH12 PRLH12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL13

PPG13 Reload Registers Low
address_offset : 0x2CC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL13 PRLL13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH13

PPG13 Reload Registers High
address_offset : 0x2CD Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH13 PRLH13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL14

PPG14 Reload Registers Low
address_offset : 0x2D0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL14 PRLL14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH14

PPG14 Reload Registers High
address_offset : 0x2D1 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH14 PRLH14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL15

PPG15 Reload Registers Low
address_offset : 0x2D4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL15 PRLL15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH15

PPG15 Reload Registers High
address_offset : 0x2D5 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH15 PRLH15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

GATEC12

PPG Gate Function Control Registers 12
address_offset : 0x2D8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GATEC12 GATEC12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EDGE12 STRG12 EDGE14 STRG14

EDGE12 : Select Start Effective Level for PPG12
bits : 0 - -1 (0 bit)
access : read-write

STRG12 : Select a trigger for PPG12
bits : 1 - 0 (0 bit)
access : read-write

EDGE14 : Select Start Effective Level for PPG14
bits : 4 - 3 (0 bit)
access : read-write

STRG14 : Select a trigger for PPG14
bits : 5 - 4 (0 bit)
access : read-write


COMP5

PPG Compare Register 5
address_offset : 0x30 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP5 COMP5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC17

PPG Operation Mode Control Register 17
address_offset : 0x300 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC17 PPGC17 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC16

PPG Operation Mode Control Register 16
address_offset : 0x301 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC16 PPGC16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC19

PPG Operation Mode Control Register 19
address_offset : 0x304 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC19 PPGC19 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC18

PPG Operation Mode Control Register 18
address_offset : 0x305 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC18 PPGC18 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL16

PPG16 Reload Registers Low
address_offset : 0x308 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL16 PRLL16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH16

PPG16 Reload Registers High
address_offset : 0x309 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH16 PRLH16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL17

PPG17 Reload Registers Low
address_offset : 0x30C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL17 PRLL17 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH17

PPG17 Reload Registers High
address_offset : 0x30D Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH17 PRLH17 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL18

PPG18 Reload Registers Low
address_offset : 0x310 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL18 PRLL18 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH18

PPG18 Reload Registers High
address_offset : 0x311 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH18 PRLH18 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL19

PPG19 Reload Registers Low
address_offset : 0x314 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL19 PRLL19 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH19

PPG19 Reload Registers High
address_offset : 0x315 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH19 PRLH19 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

GATEC16

PPG Gate Function Control Registers 16
address_offset : 0x318 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GATEC16 GATEC16 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EDGE16 STRG16 EDGE18 STRG18

EDGE16 : Select Start Effective Level for PPG16
bits : 0 - -1 (0 bit)
access : read-write

STRG16 : Select a trigger for PPG16
bits : 1 - 0 (0 bit)
access : read-write

EDGE18 : Select Start Effective Level for PPG18
bits : 4 - 3 (0 bit)
access : read-write

STRG18 : Select a trigger for PPG18
bits : 5 - 4 (0 bit)
access : read-write


COMP7

PPG Compare Register 7
address_offset : 0x34 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP7 COMP7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC21

PPG Operation Mode Control Register 21
address_offset : 0x340 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC21 PPGC21 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC20

PPG Operation Mode Control Register 20
address_offset : 0x341 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC20 PPGC20 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC23

PPG Operation Mode Control Register 23
address_offset : 0x344 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC23 PPGC23 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PPGC22

PPG Operation Mode Control Register 22
address_offset : 0x345 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPGC22 PPGC22 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL20

PPG20 Reload Registers Low
address_offset : 0x348 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL20 PRLL20 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH20

PPG20 Reload Registers High
address_offset : 0x349 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH20 PRLH20 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL21

PPG21 Reload Registers Low
address_offset : 0x34C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL21 PRLL21 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH21

PPG21 Reload Registers High
address_offset : 0x34D Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH21 PRLH21 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL22

PPG22 Reload Registers Low
address_offset : 0x350 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL22 PRLL22 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH22

PPG22 Reload Registers High
address_offset : 0x351 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH22 PRLH22 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLL23

PPG23 Reload Registers Low
address_offset : 0x354 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLL23 PRLL23 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PRLH23

PPG23 Reload Registers High
address_offset : 0x355 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRLH23 PRLH23 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

GATEC20

PPG Gate Function Control Registers 20
address_offset : 0x358 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GATEC20 GATEC20 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EDGE20 STRG20 EDGE22 STRG22

EDGE20 : Select Start Effective Level for PPG20
bits : 0 - -1 (0 bit)
access : read-write

STRG20 : Select a trigger for PPG20
bits : 1 - 0 (0 bit)
access : read-write

EDGE22 : Select Start Effective Level for PPG22
bits : 4 - 3 (0 bit)
access : read-write

STRG22 : Select a trigger for PPG22
bits : 5 - 4 (0 bit)
access : read-write


TTCR2

PPG Start Trigger Control Register 2
address_offset : 0x40 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TTCR2 TTCR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STR2 MONI2 CS2 TRG16O TRG18O TRG20O TRG22O

STR2 : 8-bit UP counter operation enable bit for comparison
bits : 8 - 7 (0 bit)
access : read-write

MONI2 : 8-bit UP counter operation state monitor bit for comparison
bits : 9 - 8 (0 bit)
access : read-only

CS2 : 8-bit UP counter clock select bits for comparison
bits : 10 - 10 (1 bit)
access : read-write

TRG16O : PPG16 trigger stop bit
bits : 12 - 11 (0 bit)
access : read-write

TRG18O : PPG18 trigger stop bit
bits : 13 - 12 (0 bit)
access : read-write

TRG20O : PPG20 trigger stop bit
bits : 14 - 13 (0 bit)
access : read-write

TRG22O : PPG22 trigger stop bit
bits : 15 - 14 (0 bit)
access : read-write


COMP8

PPG Compare Register 8
address_offset : 0x48 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP8 COMP8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

COMP10

PPG Compare Register 10
address_offset : 0x4C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP10 COMP10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

COMP12

PPG Compare Register 12
address_offset : 0x50 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP12 COMP12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

COMP14

PPG Compare Register 14
address_offset : 0x54 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP14 COMP14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

COMP0

PPG Compare Register 0
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP0 COMP0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

COMP2

PPG Compare Register 2
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP2 COMP2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0


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