\n

QPRC0_NF

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x4 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x8 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

Registers

NFCTLA

NFCTLB

NFCTLZ


NFCTLA

AIN Noise Control Register
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NFCTLA NFCTLA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AINNWS AINLV AINMD

AINNWS : Noise filter width select bits
bits : 0 - 1 (2 bit)
access : read-write

AINLV : Input invert bit
bits : 4 - 3 (0 bit)
access : read-write

AINMD : Mask bit
bits : 5 - 4 (0 bit)
access : read-write


NFCTLB

BIN Noise Control Register
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NFCTLB NFCTLB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BINNWS BINLV BINMD

BINNWS : Noise filter width select bits
bits : 0 - 1 (2 bit)
access : read-write

BINLV : Input invert bit
bits : 4 - 3 (0 bit)
access : read-write

BINMD : Mask bit
bits : 5 - 4 (0 bit)
access : read-write


NFCTLZ

ZIN Noise Control Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NFCTLZ NFCTLZ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ZINNWS ZINLV ZINMD

ZINNWS : Noise filter width select bit
bits : 0 - 1 (2 bit)
access : read-write

ZINLV : Input invert bit
bits : 4 - 3 (0 bit)
access : read-write

ZINMD : Mask bit
bits : 5 - 4 (0 bit)
access : read-write



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.