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GPIO

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x100 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x500 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x580 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x200 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x300 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x400 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x600 Bytes (0x0)
size : 0x2C byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x630 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x654 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x700 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x900 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected

Registers

PFR0

PFR4

PCR0

PCR1

PCR2

PCR3

PCR4

PCR5

PCR6

PCR8

PCRE

PFR5

PFR6

PFR8

DDR0

DDR1

DDR2

DDR3

DDR4

DDR5

DDR6

DDR8

DDRE

PDIR0

PDIR1

PDIR2

PDIR3

PDIR4

PDIR5

PDIR6

PDIR8

PDIRE

PFRE

PFR1

PDOR0

PDOR1

PDOR2

PDOR3

PDOR4

PDOR5

PDOR6

PDOR8

PDORE

ADE

SPSR

EPFR00

EPFR01

EPFR02

EPFR03

EPFR04

EPFR05

EPFR06

EPFR07

EPFR08

EPFR09

EPFR12

EPFR13

EPFR14

EPFR15

EPFR16

EPFR17

EPFR18

EPFR21

EPFR22

PZR0

PZR1

PZR2

PZR3

PZR4

PZR5

PZR6

PZR8

PZRE

PFR2

FPOER0

FPOER1

FPOER2

FPOER3

FPOER4

FPOER5

FPOER6

FPOER8

FPOERE

PFR3


PFR0

Port Function Setting Register 0
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PFR0 PFR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P00 P01 P02 P03 P04 P0F

P00 : Bit0 of PFR0
bits : 0 - -1 (0 bit)
access : read-write

P01 : Bit1 of PFR0
bits : 1 - 0 (0 bit)
access : read-write

P02 : Bit2 of PFR0
bits : 2 - 1 (0 bit)
access : read-write

P03 : Bit3 of PFR0
bits : 3 - 2 (0 bit)
access : read-write

P04 : Bit4 of PFR0
bits : 4 - 3 (0 bit)
access : read-write

P0F : Bit15 of PFR0
bits : 15 - 14 (0 bit)
access : read-write


PFR4

Port Function Setting Register 4
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PFR4 PFR4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P46 P47 P49 P4A

P46 : Bit6 of PFR4
bits : 6 - 5 (0 bit)
access : read-write

P47 : Bit7 of PFR4
bits : 7 - 6 (0 bit)
access : read-write

P49 : Bit9 of PFR4
bits : 9 - 8 (0 bit)
access : read-write

P4A : Bit10 of PFR4
bits : 10 - 9 (0 bit)
access : read-write


PCR0

Pull-up Setting Register 0
address_offset : 0x100 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCR0 PCR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PCR1

Pull-up Setting Register 1
address_offset : 0x104 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCR1 PCR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PCR2

Pull-up Setting Register 2
address_offset : 0x108 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCR2 PCR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PCR3

Pull-up Setting Register 3
address_offset : 0x10C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCR3 PCR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PCR4

Pull-up Setting Register 4
address_offset : 0x110 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCR4 PCR4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PCR5

Pull-up Setting Register 5
address_offset : 0x114 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCR5 PCR5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PCR6

Pull-up Setting Register 6
address_offset : 0x118 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCR6 PCR6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PCR8

Pull-up Setting Register 8
address_offset : 0x120 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCR8 PCR8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PCRE

Pull-up Setting Register E
address_offset : 0x138 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCRE PCRE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PFR5

Port Function Setting Register 5
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PFR5 PFR5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P50 P51 P52

P50 : Bit0 of PFR5
bits : 0 - -1 (0 bit)
access : read-write

P51 : Bit1 of PFR5
bits : 1 - 0 (0 bit)
access : read-write

P52 : Bit2 of PFR5
bits : 2 - 1 (0 bit)
access : read-write


PFR6

Port Function Setting Register 6
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PFR6 PFR6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P60 P61

P60 : Bit0 of PFR6
bits : 0 - -1 (0 bit)
access : read-write

P61 : Bit1 of PFR6
bits : 1 - 0 (0 bit)
access : read-write


PFR8

Port Function Setting Register 8
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PFR8 PFR8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P80 P81 P82

P80 : Bit0 of PFR8
bits : 0 - -1 (0 bit)
access : read-write

P81 : Bit1 of PFR8
bits : 1 - 0 (0 bit)
access : read-write

P82 : Bit2 of PFR8
bits : 2 - 1 (0 bit)
access : read-write


DDR0

Port input/output Direction Setting Register 0
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR0 DDR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P00 P01 P02 P03 P04 P0F

P00 : Bit0 of DDR0
bits : 0 - -1 (0 bit)
access : read-write

P01 : Bit1 of DDR0
bits : 1 - 0 (0 bit)
access : read-write

P02 : Bit2 of DDR0
bits : 2 - 1 (0 bit)
access : read-write

P03 : Bit3 of DDR0
bits : 3 - 2 (0 bit)
access : read-write

P04 : Bit4 of DDR0
bits : 4 - 3 (0 bit)
access : read-write

P0F : Bit15 of DDR0
bits : 15 - 14 (0 bit)
access : read-write


DDR1

Port input/output Direction Setting Register 1
address_offset : 0x204 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR1 DDR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

DDR2

Port input/output Direction Setting Register 2
address_offset : 0x208 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR2 DDR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

DDR3

Port input/output Direction Setting Register 3
address_offset : 0x20C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR3 DDR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

DDR4

Port input/output Direction Setting Register 4
address_offset : 0x210 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR4 DDR4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

DDR5

Port input/output Direction Setting Register 5
address_offset : 0x214 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR5 DDR5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

DDR6

Port input/output Direction Setting Register 6
address_offset : 0x218 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR6 DDR6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

DDR8

Port input/output Direction Setting Register 8
address_offset : 0x220 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR8 DDR8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

DDRE

Port input/output Direction Setting Register E
address_offset : 0x238 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDRE DDRE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PDIR0

Port Input Data Register 0
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PDIR0 PDIR0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P00 P01 P02 P03 P04 P0F

P00 : Bit0 of PDIR0
bits : 0 - -1 (0 bit)
access : read-only

P01 : Bit1 of PDIR0
bits : 1 - 0 (0 bit)
access : read-only

P02 : Bit2 of PDIR0
bits : 2 - 1 (0 bit)
access : read-only

P03 : Bit3 of PDIR0
bits : 3 - 2 (0 bit)
access : read-only

P04 : Bit4 of PDIR0
bits : 4 - 3 (0 bit)
access : read-only

P0F : Bit15 of PDIR0
bits : 15 - 14 (0 bit)
access : read-only


PDIR1

Port Input Data Register 1
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PDIR1 PDIR1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P10 P11 P12 P13 P14 P15

P10 : Bit0 of PDIR1
bits : 0 - -1 (0 bit)
access : read-only

P11 : Bit1 of PDIR1
bits : 1 - 0 (0 bit)
access : read-only

P12 : Bit2 of PDIR1
bits : 2 - 1 (0 bit)
access : read-only

P13 : Bit3 of PDIR1
bits : 3 - 2 (0 bit)
access : read-only

P14 : Bit4 of PDIR1
bits : 4 - 3 (0 bit)
access : read-only

P15 : Bit5 of PDIR1
bits : 5 - 4 (0 bit)
access : read-only


PDIR2

Port Input Data Register 2
address_offset : 0x308 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PDIR2 PDIR2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P21 P22 P23

P21 : Bit1 of PDIR2
bits : 1 - 0 (0 bit)
access : read-only

P22 : Bit2 of PDIR2
bits : 2 - 1 (0 bit)
access : read-only

P23 : Bit3 of PDIR2
bits : 3 - 2 (0 bit)
access : read-only


PDIR3

Port Input Data Register 3
address_offset : 0x30C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PDIR3 PDIR3 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P39 P3A P3B P3C P3D P3E P3F

P39 : Bit9 of PDIR3
bits : 9 - 8 (0 bit)
access : read-only

P3A : Bit10 of PDIR3
bits : 10 - 9 (0 bit)
access : read-only

P3B : Bit11 of PDIR3
bits : 11 - 10 (0 bit)
access : read-only

P3C : Bit12 of PDIR3
bits : 12 - 11 (0 bit)
access : read-only

P3D : Bit13 of PDIR3
bits : 13 - 12 (0 bit)
access : read-only

P3E : Bit14 of PDIR3
bits : 14 - 13 (0 bit)
access : read-only

P3F : Bit15 of PDIR3
bits : 15 - 14 (0 bit)
access : read-only


PDIR4

Port Input Data Register 4
address_offset : 0x310 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PDIR4 PDIR4 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P46 P47 P49 P4A

P46 : Bit6 of PDIR4
bits : 6 - 5 (0 bit)
access : read-only

P47 : Bit7 of PDIR4
bits : 7 - 6 (0 bit)
access : read-only

P49 : Bit9 of PDIR4
bits : 9 - 8 (0 bit)
access : read-only

P4A : Bit10 of PDIR4
bits : 10 - 9 (0 bit)
access : read-only


PDIR5

Port Input Data Register 5
address_offset : 0x314 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PDIR5 PDIR5 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P50 P51 P52

P50 : Bit0 of PDIR5
bits : 0 - -1 (0 bit)
access : read-only

P51 : Bit1 of PDIR5
bits : 1 - 0 (0 bit)
access : read-only

P52 : Bit2 of PDIR5
bits : 2 - 1 (0 bit)
access : read-only


PDIR6

Port Input Data Register 6
address_offset : 0x318 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PDIR6 PDIR6 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P60 P61

P60 : Bit0 of PDIR6
bits : 0 - -1 (0 bit)
access : read-only

P61 : Bit1 of PDIR6
bits : 1 - 0 (0 bit)
access : read-only


PDIR8

Port Input Data Register 8
address_offset : 0x320 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PDIR8 PDIR8 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P80 P81 P82

P80 : Bit0 of PDIR8
bits : 0 - -1 (0 bit)
access : read-only

P81 : Bit1 of PDIR8
bits : 1 - 0 (0 bit)
access : read-only

P82 : Bit2 of PDIR8
bits : 2 - 1 (0 bit)
access : read-only


PDIRE

Port Input Data Register E
address_offset : 0x338 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PDIRE PDIRE read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PE0 PE2 PE3

PE0 : Bit0 of PDIRE
bits : 0 - -1 (0 bit)
access : read-only

PE2 : Bit2 of PDIRE
bits : 2 - 1 (0 bit)
access : read-only

PE3 : Bit3 of PDIRE
bits : 3 - 2 (0 bit)
access : read-only


PFRE

Port Function Setting Register E
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PFRE PFRE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PE0 PE2 PE3

PE0 : Bit0 of PFRE
bits : 0 - -1 (0 bit)
access : read-write

PE2 : Bit2 of PFRE
bits : 2 - 1 (0 bit)
access : read-write

PE3 : Bit3 of PFRE
bits : 3 - 2 (0 bit)
access : read-write


PFR1

Port Function Setting Register 1
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PFR1 PFR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P10 P11 P12 P13 P14 P15

P10 : Bit0 of PFR1
bits : 0 - -1 (0 bit)
access : read-write

P11 : Bit1 of PFR1
bits : 1 - 0 (0 bit)
access : read-write

P12 : Bit2 of PFR1
bits : 2 - 1 (0 bit)
access : read-write

P13 : Bit3 of PFR1
bits : 3 - 2 (0 bit)
access : read-write

P14 : Bit4 of PFR1
bits : 4 - 3 (0 bit)
access : read-write

P15 : Bit5 of PFR1
bits : 5 - 4 (0 bit)
access : read-write


PDOR0

Port Output Data Register 0
address_offset : 0x400 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDOR0 PDOR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PDOR1

Port Output Data Register 1
address_offset : 0x404 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDOR1 PDOR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PDOR2

Port Output Data Register 2
address_offset : 0x408 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDOR2 PDOR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PDOR3

Port Output Data Register 3
address_offset : 0x40C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDOR3 PDOR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PDOR4

Port Output Data Register 4
address_offset : 0x410 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDOR4 PDOR4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PDOR5

Port Output Data Register 5
address_offset : 0x414 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDOR5 PDOR5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PDOR6

Port Output Data Register 6
address_offset : 0x418 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDOR6 PDOR6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PDOR8

Port Output Data Register 8
address_offset : 0x420 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDOR8 PDOR8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PDORE

Port Output Data Register E
address_offset : 0x438 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDORE PDORE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADE

Analog Input Setting Register
address_offset : 0x500 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADE ADE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AN00 AN01 AN02 AN03 AN04 AN05 AN06 AN07 AN08 AN09 AN10 AN11 AN12 AN13 AN14 AN15 AN16 AN17 AN18 AN19 AN20 AN21 AN22 AN23 AN24 AN25 AN26 AN27 AN28 AN29 AN30 AN31

AN00 : Analog Input Ch.0 Setting Register
bits : 0 - -1 (0 bit)
access : read-write

AN01 : Analog Input Ch.1 Setting Register
bits : 1 - 0 (0 bit)
access : read-write

AN02 : Analog Input Ch.2 Setting Register
bits : 2 - 1 (0 bit)
access : read-write

AN03 : Analog Input Ch.3 Setting Register
bits : 3 - 2 (0 bit)
access : read-write

AN04 : Analog Input Ch.4 Setting Register
bits : 4 - 3 (0 bit)
access : read-write

AN05 : Analog Input Ch.5 Setting Register
bits : 5 - 4 (0 bit)
access : read-write

AN06 : Analog Input Ch.6 Setting Register
bits : 6 - 5 (0 bit)
access : read-write

AN07 : Analog Input Ch.7 Setting Register
bits : 7 - 6 (0 bit)
access : read-write

AN08 : Analog Input Ch.8 Setting Register
bits : 8 - 7 (0 bit)
access : read-write

AN09 : Analog Input Ch.9 Setting Register
bits : 9 - 8 (0 bit)
access : read-write

AN10 : Analog Input Ch.10 Setting Register
bits : 10 - 9 (0 bit)
access : read-write

AN11 : Analog Input Ch.11 Setting Register
bits : 11 - 10 (0 bit)
access : read-write

AN12 : Analog Input Ch.12 Setting Register
bits : 12 - 11 (0 bit)
access : read-write

AN13 : Analog Input Ch.13 Setting Register
bits : 13 - 12 (0 bit)
access : read-write

AN14 : Analog Input Ch.14 Setting Register
bits : 14 - 13 (0 bit)
access : read-write

AN15 : Analog Input Ch.15 Setting Register
bits : 15 - 14 (0 bit)
access : read-write

AN16 : Analog Input Ch.16 Setting Register
bits : 16 - 15 (0 bit)
access : read-write

AN17 : Analog Input Ch.17 Setting Register
bits : 17 - 16 (0 bit)
access : read-write

AN18 : Analog Input Ch.18 Setting Register
bits : 18 - 17 (0 bit)
access : read-write

AN19 : Analog Input Ch.19 Setting Register
bits : 19 - 18 (0 bit)
access : read-write

AN20 : Analog Input Ch.20 Setting Register
bits : 20 - 19 (0 bit)
access : read-write

AN21 : Analog Input Ch.21 Setting Register
bits : 21 - 20 (0 bit)
access : read-write

AN22 : Analog Input Ch.22 Setting Register
bits : 22 - 21 (0 bit)
access : read-write

AN23 : Analog Input Ch.23 Setting Register
bits : 23 - 22 (0 bit)
access : read-write

AN24 : Analog Input Ch.24 Setting Register
bits : 24 - 23 (0 bit)
access : read-write

AN25 : Analog Input Ch.25 Setting Register
bits : 25 - 24 (0 bit)
access : read-write

AN26 : Analog Input Ch.26 Setting Register
bits : 26 - 25 (0 bit)
access : read-write

AN27 : Analog Input Ch.27 Setting Register
bits : 27 - 26 (0 bit)
access : read-write

AN28 : Analog Input Ch.28 Setting Register
bits : 28 - 27 (0 bit)
access : read-write

AN29 : Analog Input Ch.29 Setting Register
bits : 29 - 28 (0 bit)
access : read-write

AN30 : Analog Input Ch.30 Setting Register
bits : 30 - 29 (0 bit)
access : read-write

AN31 : Analog Input Ch.31 Setting Register
bits : 31 - 30 (0 bit)
access : read-write


SPSR

Special port setting register
address_offset : 0x580 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SPSR SPSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SUBXC MAINXC

SUBXC : Sub Clock (Oscillation) Pin Setting Register
bits : 0 - 0 (1 bit)
access : read-write

MAINXC : Main Clock (Oscillation) Pin Setting Register
bits : 2 - 2 (1 bit)
access : read-write


EPFR00

Extended Pin Function Setting Register 00
address_offset : 0x600 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPFR00 EPFR00 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NMIS CROUTE RTCCOE SUBOUTE SWDEN

NMIS : NMIX Function Select bit
bits : 0 - -1 (0 bit)
access : read-write

CROUTE : Internal high-speed CR Oscillation Output Function Select bit
bits : 1 - 1 (1 bit)
access : read-write

RTCCOE : RTC clock output select bit
bits : 4 - 4 (1 bit)
access : read-write

SUBOUTE : Sub clock divide output function select bit
bits : 6 - 6 (1 bit)
access : read-write

SWDEN : Serial Wire Debug Function Select bit 0
bits : 16 - 15 (0 bit)
access : read-write


EPFR01

Extended Pin Function Setting Register 01
address_offset : 0x604 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPFR01 EPFR01 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RTO00E RTO01E RTO02E RTO03E RTO04E RTO05E DTTI0C IGTRG0 DTTI0S FRCK0S IC00S IC01S IC02S IC03S

RTO00E : RTO00 Output Select bits
bits : 0 - 0 (1 bit)
access : read-write

RTO01E : RTO01 Output Select bits
bits : 2 - 2 (1 bit)
access : read-write

RTO02E : RTO02 Output Select bits
bits : 4 - 4 (1 bit)
access : read-write

RTO03E : RTO03 Output Select bits
bits : 6 - 6 (1 bit)
access : read-write

RTO04E : RTO04 Output Select bits
bits : 8 - 8 (1 bit)
access : read-write

RTO05E : RTO05 Output Select bits
bits : 10 - 10 (1 bit)
access : read-write

DTTI0C : DTTIX0 Function Select bit
bits : 12 - 11 (0 bit)
access : read-write

IGTRG0 : IGTRG0 Input Select bit
bits : 13 - 12 (0 bit)
access : read-write

DTTI0S : DTTIX0 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write

FRCK0S : FRCK0 Input Select bits
bits : 18 - 18 (1 bit)
access : read-write

IC00S : IC00 Input Select bits
bits : 20 - 21 (2 bit)
access : read-write

IC01S : IC01 Input Select bits
bits : 23 - 24 (2 bit)
access : read-write

IC02S : IC02 Input Select bits
bits : 26 - 27 (2 bit)
access : read-write

IC03S : IC03 Input Select bits
bits : 29 - 30 (2 bit)
access : read-write


EPFR02

Extended Pin Function Setting Register 02
address_offset : 0x608 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPFR02 EPFR02 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RTO10E RTO11E RTO12E RTO13E RTO14E RTO15E DTTI1C IGTRG0 DTTI1S FRCK1S IC10S IC11S IC12S IC13S

RTO10E : RTO00 Output Select bits
bits : 0 - 0 (1 bit)
access : read-write

RTO11E : RTO11 Output Select bits
bits : 2 - 2 (1 bit)
access : read-write

RTO12E : RTO12 Output Select bits
bits : 4 - 4 (1 bit)
access : read-write

RTO13E : RTO13 Output Select bits
bits : 6 - 6 (1 bit)
access : read-write

RTO14E : RTO14 Output Select bits
bits : 8 - 8 (1 bit)
access : read-write

RTO15E : RTO15 Output Select bits
bits : 10 - 10 (1 bit)
access : read-write

DTTI1C : DTTIX1 Function Select bit
bits : 12 - 11 (0 bit)
access : read-write

IGTRG0 : IGTRG0 Input Select bit
bits : 13 - 12 (0 bit)
access : read-write

DTTI1S : DTTIX1 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write

FRCK1S : FRCK1 Input Select bits
bits : 18 - 18 (1 bit)
access : read-write

IC10S : IC10 Input Select bits
bits : 20 - 21 (2 bit)
access : read-write

IC11S : IC11 Input Select bits
bits : 23 - 24 (2 bit)
access : read-write

IC12S : IC12 Input Select bits
bits : 26 - 27 (2 bit)
access : read-write

IC13S : IC13 Input Select bits
bits : 29 - 30 (2 bit)
access : read-write


EPFR03

Extended Pin Function Setting Register 03
address_offset : 0x60C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPFR03 EPFR03 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RTO20E RTO21E RTO22E RTO23E RTO24E RTO25E DTTI2C DTTI2S FRCK2S IC20S IC21S IC22S IC23S

RTO20E : RTO20 Output Select bits
bits : 0 - 0 (1 bit)
access : read-write

RTO21E : RTO21 Output Select bits
bits : 2 - 2 (1 bit)
access : read-write

RTO22E : RTO22 Output Select bits
bits : 4 - 4 (1 bit)
access : read-write

RTO23E : RTO23 Output Select bits
bits : 6 - 6 (1 bit)
access : read-write

RTO24E : RTO24 Output Select bits
bits : 8 - 8 (1 bit)
access : read-write

RTO25E : RTO25 Output Select bits
bits : 10 - 10 (1 bit)
access : read-write

DTTI2C : DTTIX2 Function Select bit
bits : 12 - 11 (0 bit)
access : read-write

DTTI2S : DTTIX2 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write

FRCK2S : FRCK2 Input Select bits
bits : 18 - 18 (1 bit)
access : read-write

IC20S : IC20 Input Select bits
bits : 20 - 21 (2 bit)
access : read-write

IC21S : IC21 Input Select bits
bits : 23 - 24 (2 bit)
access : read-write

IC22S : IC22 Input Select bits
bits : 26 - 27 (2 bit)
access : read-write

IC23S : IC23 Input Select bits
bits : 29 - 30 (2 bit)
access : read-write


EPFR04

Extended Pin Function Setting Register 04
address_offset : 0x610 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPFR04 EPFR04 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIOA0E TIOB0S TIOA1S TIOA1E TIOB1S TIOA2E TIOB2S TIOA3S TIOA3E TIOB3S

TIOA0E : TIOA0 Output Select bits
bits : 2 - 2 (1 bit)
access : read-write

TIOB0S : TIOB0 Input Select bits
bits : 4 - 5 (2 bit)
access : read-write

TIOA1S : TIOA1 Input Select bits
bits : 8 - 8 (1 bit)
access : read-write

TIOA1E : TIOA1 Output Select bits
bits : 10 - 10 (1 bit)
access : read-write

TIOB1S : TIOB1 Input Select bits
bits : 12 - 12 (1 bit)
access : read-write

TIOA2E : TIOA2 Output Select bits
bits : 18 - 18 (1 bit)
access : read-write

TIOB2S : TIOB2 Input Select bits
bits : 20 - 20 (1 bit)
access : read-write

TIOA3S : TIOA3 Input Select bits
bits : 24 - 24 (1 bit)
access : read-write

TIOA3E : TIOA3 Output Select bits
bits : 26 - 26 (1 bit)
access : read-write

TIOB3S : TIOB3 Input Select bits
bits : 28 - 28 (1 bit)
access : read-write


EPFR05

Extended Pin Function Setting Register 05
address_offset : 0x614 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPFR05 EPFR05 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIOA4E TIOB4S TIOA5S TIOA5E TIOB5S TIOA6E TIOB6S TIOA7S TIOA7E TIOB7S

TIOA4E : TIOA4 Output Select bits
bits : 2 - 2 (1 bit)
access : read-write

TIOB4S : TIOB4 Input Select bits
bits : 4 - 4 (1 bit)
access : read-write

TIOA5S : TIOA5 Input Select bits
bits : 8 - 8 (1 bit)
access : read-write

TIOA5E : TIOA5 Output Select bits
bits : 10 - 10 (1 bit)
access : read-write

TIOB5S : TIOB5 Input Select bits
bits : 12 - 12 (1 bit)
access : read-write

TIOA6E : TIOA6 Output Select bits
bits : 18 - 18 (1 bit)
access : read-write

TIOB6S : TIOB6 Input Select bits
bits : 20 - 20 (1 bit)
access : read-write

TIOA7S : TIOA7 Input Select bits
bits : 24 - 24 (1 bit)
access : read-write

TIOA7E : TIOA7 Output Select bits
bits : 26 - 26 (1 bit)
access : read-write

TIOB7S : TIOB7 Input Select bits
bits : 28 - 28 (1 bit)
access : read-write


EPFR06

Extended Pin Function Setting Register 06
address_offset : 0x618 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPFR06 EPFR06 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EINT00S EINT01S EINT02S EINT03S EINT04S EINT05S EINT06S EINT07S EINT08S EINT09S EINT10S EINT11S EINT12S EINT13S EINT14S EINT15S

EINT00S : External Interrupt 00 Input Select bits
bits : 0 - 0 (1 bit)
access : read-write

EINT01S : External Interrupt 01 Input Select bits
bits : 2 - 2 (1 bit)
access : read-write

EINT02S : External Interrupt 02 Input Select bits
bits : 4 - 4 (1 bit)
access : read-write

EINT03S : External Interrupt 03 Input Select bits
bits : 6 - 6 (1 bit)
access : read-write

EINT04S : External Interrupt 04 Input Select bits
bits : 8 - 8 (1 bit)
access : read-write

EINT05S : External Interrupt 05 Input Select bits
bits : 10 - 10 (1 bit)
access : read-write

EINT06S : External Interrupt 06 Input Select bits
bits : 12 - 12 (1 bit)
access : read-write

EINT07S : External Interrupt 07 Input Select bits
bits : 14 - 14 (1 bit)
access : read-write

EINT08S : External Interrupt 08 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write

EINT09S : External Interrupt 09 Input Select bits
bits : 18 - 18 (1 bit)
access : read-write

EINT10S : External Interrupt 10 Input Select bits
bits : 20 - 20 (1 bit)
access : read-write

EINT11S : External Interrupt 11 Input Select bits
bits : 22 - 22 (1 bit)
access : read-write

EINT12S : External Interrupt 12 Input Select bits
bits : 24 - 24 (1 bit)
access : read-write

EINT13S : External Interrupt 13 Input Select bits
bits : 26 - 26 (1 bit)
access : read-write

EINT14S : External Interrupt 14 Input Select bits
bits : 28 - 28 (1 bit)
access : read-write

EINT15S : External Interrupt 15 Input Select bits
bits : 30 - 30 (1 bit)
access : read-write


EPFR07

Extended Pin Function Setting Register 07
address_offset : 0x61C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPFR07 EPFR07 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIN0S SOT0B SCK0B SIN1S SOT1B SCK1B SIN2S SOT2B SCK2B SIN3S SOT3B SCK3B

SIN0S : SIN0 Input Select bits
bits : 4 - 4 (1 bit)
access : read-write

SOT0B : SOT0 Input/Output Select bits
bits : 6 - 6 (1 bit)
access : read-write

SCK0B : SCK0 Input/Output Select bits
bits : 8 - 8 (1 bit)
access : read-write

SIN1S : SIN1 Input Select bits
bits : 10 - 10 (1 bit)
access : read-write

SOT1B : SOT1 Input/Output Select bits
bits : 12 - 12 (1 bit)
access : read-write

SCK1B : SCK1 Input/Output Select bits
bits : 14 - 14 (1 bit)
access : read-write

SIN2S : SIN2 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write

SOT2B : SOT2 Input/Output Select bits
bits : 18 - 18 (1 bit)
access : read-write

SCK2B : SCK2 Input/Output Select bits
bits : 20 - 20 (1 bit)
access : read-write

SIN3S : SIN3 Input Select bits
bits : 22 - 22 (1 bit)
access : read-write

SOT3B : SOT3 Input/Output Select bits
bits : 24 - 24 (1 bit)
access : read-write

SCK3B : SCK3 Input/Output Select bits
bits : 26 - 26 (1 bit)
access : read-write


EPFR08

Extended Pin Function Setting Register 08
address_offset : 0x620 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPFR08 EPFR08 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RTS4E CTS4S SIN4S SOT4B SCK4B SIN5S SOT5B SCK5B SIN6S SOT6B SCK6B SIN7S SOT7B SCK7B

RTS4E : RTS4 Output Select bits
bits : 0 - 0 (1 bit)
access : read-write

CTS4S : CTS4 Input Select bits
bits : 2 - 2 (1 bit)
access : read-write

SIN4S : SIN4 Input Select bits
bits : 4 - 4 (1 bit)
access : read-write

SOT4B : SOT4 Input/Output Select bits
bits : 6 - 6 (1 bit)
access : read-write

SCK4B : SCK4 Input/Output Select bits
bits : 8 - 8 (1 bit)
access : read-write

SIN5S : SIN5 Input Select bits
bits : 10 - 10 (1 bit)
access : read-write

SOT5B : SOT5 Input/Output Select bits
bits : 12 - 12 (1 bit)
access : read-write

SCK5B : SCK5 Input/Output Select bits
bits : 14 - 14 (1 bit)
access : read-write

SIN6S : SIN6 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write

SOT6B : SOT6 Input/Output Select bits
bits : 18 - 18 (1 bit)
access : read-write

SCK6B : SCK6 Input/Output Select bits
bits : 20 - 20 (1 bit)
access : read-write

SIN7S : SIN7 Input Select bits
bits : 22 - 22 (1 bit)
access : read-write

SOT7B : SOT7 Input/Output Select bits
bits : 24 - 24 (1 bit)
access : read-write

SCK7B : SCK7 Input/Output Select bits
bits : 26 - 26 (1 bit)
access : read-write


EPFR09

Extended Pin Function Setting Register 09
address_offset : 0x624 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPFR09 EPFR09 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 QAIN0S QBIN0S QZIN0S QAIN1S QBIN1S QZIN1S ADTRG0S ADTRG1S ADTRG2S CRX0S CTX0E CRX1S CTX1E

QAIN0S : QAIN0S Input Select bits
bits : 0 - 0 (1 bit)
access : read-write

QBIN0S : QBIN0S Input Select bits
bits : 2 - 2 (1 bit)
access : read-write

QZIN0S : QZIN0S Input Select bits
bits : 4 - 4 (1 bit)
access : read-write

QAIN1S : QAIN1S Input Select bits
bits : 6 - 6 (1 bit)
access : read-write

QBIN1S : QBIN1S Input Select bits
bits : 8 - 8 (1 bit)
access : read-write

QZIN1S : QZIN1S Input Select bits
bits : 10 - 10 (1 bit)
access : read-write

ADTRG0S : ADTRG0 Input Select bits
bits : 12 - 14 (3 bit)
access : read-write

ADTRG1S : ADTRG1 Input Select bits
bits : 16 - 18 (3 bit)
access : read-write

ADTRG2S : ADTRG2 Input Select bits
bits : 20 - 22 (3 bit)
access : read-write

CRX0S : CRX0S Input Select bits
bits : 24 - 24 (1 bit)
access : read-write

CTX0E : CTX0E Output Select bits
bits : 26 - 26 (1 bit)
access : read-write

CRX1S : CRX1S Input Select bits
bits : 28 - 28 (1 bit)
access : read-write

CTX1E : CTX1E Output Select bits
bits : 30 - 30 (1 bit)
access : read-write


EPFR12

Extended Pin Function Setting Register 12
address_offset : 0x630 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPFR12 EPFR12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIOA8E TIOB8S TIOA9S TIOA9E TIOB9S TIOA10E TIOB10S TIOA11S TIOA11E TIOB11S

TIOA8E : TIOA8 Output Select bits
bits : 2 - 2 (1 bit)
access : read-write

TIOB8S : TIOB8 Input Select bits
bits : 4 - 4 (1 bit)
access : read-write

TIOA9S : TIOA9 Input Select bits
bits : 8 - 8 (1 bit)
access : read-write

TIOA9E : TIOA9 Output Select bits
bits : 10 - 10 (1 bit)
access : read-write

TIOB9S : TIOB9 Input Select bits
bits : 12 - 12 (1 bit)
access : read-write

TIOA10E : TIOA10 Output Select bits
bits : 18 - 18 (1 bit)
access : read-write

TIOB10S : TIOB10 Input Select bits
bits : 20 - 20 (1 bit)
access : read-write

TIOA11S : TIOA11 Input Select bits
bits : 24 - 24 (1 bit)
access : read-write

TIOA11E : TIOA11 Output Select bits
bits : 26 - 26 (1 bit)
access : read-write

TIOB11S : TIOB11 Input Select bits
bits : 28 - 28 (1 bit)
access : read-write


EPFR13

Extended Pin Function Setting Register 13
address_offset : 0x634 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPFR13 EPFR13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIOA12E TIOB12S TIOA13S TIOA13E TIOB13S TIOA14E TIOB14S TIOA15S TIOA15E TIOB15S

TIOA12E : TIOA12 Output Select bits
bits : 2 - 2 (1 bit)
access : read-write

TIOB12S : TIOB12 Input Select bits
bits : 4 - 5 (2 bit)
access : read-write

TIOA13S : TIOA13 Input Select bits
bits : 8 - 8 (1 bit)
access : read-write

TIOA13E : TIOA13 Output Select bits
bits : 10 - 10 (1 bit)
access : read-write

TIOB13S : TIOB13 Input Select bits
bits : 12 - 12 (1 bit)
access : read-write

TIOA14E : TIOA14 Output Select bits
bits : 18 - 18 (1 bit)
access : read-write

TIOB14S : TIOB14 Input Select bits
bits : 20 - 20 (1 bit)
access : read-write

TIOA15S : TIOA15 Input Select bits
bits : 24 - 24 (1 bit)
access : read-write

TIOA15E : TIOA15 Output Select bits
bits : 26 - 26 (1 bit)
access : read-write

TIOB15S : TIOB15 Input Select bits
bits : 28 - 28 (1 bit)
access : read-write


EPFR14

Extended Pin Function Setting Register 14
address_offset : 0x638 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPFR14 EPFR14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 QAIN2S QBIN2S QZIN2S

QAIN2S : QPRC-ch.2 AIN Input Pin bits
bits : 0 - 0 (1 bit)
access : read-write

QBIN2S : QPRC-ch.2 BIN Input Pin bits
bits : 2 - 2 (1 bit)
access : read-write

QZIN2S : QPRC-ch.2 ZIN Input Pin bits
bits : 4 - 4 (1 bit)
access : read-write


EPFR15

Extended Pin Function Setting Register 15
address_offset : 0x63C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPFR15 EPFR15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EINT16S EINT17S EINT18S EINT19S EINT20S EINT21S EINT22S EINT23S EINT24S EINT25S EINT26S EINT27S EINT28S EINT29S EINT30S EINT31S

EINT16S : External Interrupt 16 Input Select bits
bits : 0 - 0 (1 bit)
access : read-write

EINT17S : External Interrupt 17 Input Select bits
bits : 2 - 2 (1 bit)
access : read-write

EINT18S : External Interrupt 18 Input Select bits
bits : 4 - 4 (1 bit)
access : read-write

EINT19S : External Interrupt 19 Input Select bits
bits : 6 - 6 (1 bit)
access : read-write

EINT20S : External Interrupt 20 Input Select bits
bits : 8 - 8 (1 bit)
access : read-write

EINT21S : External Interrupt 21 Input Select bits
bits : 10 - 10 (1 bit)
access : read-write

EINT22S : External Interrupt 22 Input Select bits
bits : 12 - 12 (1 bit)
access : read-write

EINT23S : External Interrupt 23 Input Select bits
bits : 14 - 14 (1 bit)
access : read-write

EINT24S : External Interrupt 24 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write

EINT25S : External Interrupt 25 Input Select bits
bits : 18 - 18 (1 bit)
access : read-write

EINT26S : External Interrupt 26 Input Select bits
bits : 20 - 20 (1 bit)
access : read-write

EINT27S : External Interrupt 27 Input Select bits
bits : 22 - 22 (1 bit)
access : read-write

EINT28S : External Interrupt 28 Input Select bits
bits : 24 - 24 (1 bit)
access : read-write

EINT29S : External Interrupt 29 Input Select bits
bits : 26 - 26 (1 bit)
access : read-write

EINT30S : External Interrupt 30 Input Select bits
bits : 28 - 28 (1 bit)
access : read-write

EINT31S : External Interrupt 31 Input Select bits
bits : 30 - 30 (1 bit)
access : read-write


EPFR16

Extended Pin Function Setting Register 16
address_offset : 0x640 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPFR16 EPFR16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIN8S SOT8B SCK8B SIN9S SOT9B SCK9B SIN10S SOT10B SCK10B SIN11S SOT11B SCK11B

SIN8S : SIN8 Input Select bits
bits : 4 - 4 (1 bit)
access : read-write

SOT8B : SOT8 Input/Output Select bits
bits : 6 - 6 (1 bit)
access : read-write

SCK8B : SCK8 Input/Output Select bits
bits : 8 - 8 (1 bit)
access : read-write

SIN9S : SIN9 Input Select bits
bits : 10 - 10 (1 bit)
access : read-write

SOT9B : SOT9 Input/Output Select bits
bits : 12 - 12 (1 bit)
access : read-write

SCK9B : SCK9 Input/Output Select bits
bits : 14 - 14 (1 bit)
access : read-write

SIN10S : SIN10 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write

SOT10B : SOT10 Input/Output Select bits
bits : 18 - 18 (1 bit)
access : read-write

SCK10B : SCK10 Input/Output Select bits
bits : 20 - 20 (1 bit)
access : read-write

SIN11S : SIN11 Input Select bits
bits : 22 - 22 (1 bit)
access : read-write

SOT11B : SOT11 Input/Output Select bits
bits : 24 - 24 (1 bit)
access : read-write

SCK11B : SCK11 Input/Output Select bits
bits : 26 - 26 (1 bit)
access : read-write


EPFR17

Extended Pin Function Setting Register 18
address_offset : 0x644 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPFR17 EPFR17 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIN12S SOT12B SCK12B SIN13S SOT13B SCK13B SIN14S SOT14B SCK14B SIN15S SOT15B SCK15B

SIN12S : SIN12 Input Select bits
bits : 4 - 4 (1 bit)
access : read-write

SOT12B : SOT12 Input/Output Select bits
bits : 6 - 6 (1 bit)
access : read-write

SCK12B : SCK12 Input/Output Select bits
bits : 8 - 8 (1 bit)
access : read-write

SIN13S : SIN13 Input Select bits
bits : 10 - 10 (1 bit)
access : read-write

SOT13B : SOT13 Input/Output Select bits
bits : 12 - 12 (1 bit)
access : read-write

SCK13B : SCK13 Input/Output Select bits
bits : 14 - 14 (1 bit)
access : read-write

SIN14S : SIN14 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write

SOT14B : SOT14 Input/Output Select bits
bits : 18 - 18 (1 bit)
access : read-write

SCK14B : SCK14 Input/Output Select bits
bits : 20 - 20 (1 bit)
access : read-write

SIN15S : SIN15 Input Select bits
bits : 22 - 22 (1 bit)
access : read-write

SOT15B : SOT15 Input/Output Select bits
bits : 24 - 24 (1 bit)
access : read-write

SCK15B : SCK15 Input/Output Select bits
bits : 26 - 26 (1 bit)
access : read-write


EPFR18

Extended Pin Function Setting Register 18
address_offset : 0x648 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPFR18 EPFR18 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CECR0B CECR1B

CECR0B : CEC0 input/output selection bits
bits : 0 - 0 (1 bit)
access : read-write

CECR1B : CEC1 input/output selection bits
bits : 2 - 2 (1 bit)
access : read-write


EPFR21

Extended Pin Function Setting Register 21
address_offset : 0x654 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPFR21 EPFR21 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 QAIN0S QBIN0S QZIN0S

QAIN0S : QPRC-ch.0 AIN Input Pin bits
bits : 0 - -1 (0 bit)
access : read-write

QBIN0S : QPRC-ch.0 BIN Input Pin bits
bits : 1 - 0 (0 bit)
access : read-write

QZIN0S : QPRC-ch.0 ZIN Input Pin bits
bits : 2 - 1 (0 bit)
access : read-write


EPFR22

Extended Pin Function Setting Register 22
address_offset : 0x658 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPFR22 EPFR22 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCS10B SCS11E SCS30B SCS31E

SCS10B : SCS10 Input/Output Select bits
bits : 4 - 4 (1 bit)
access : read-write

SCS11E : SCS11 Output Select bits
bits : 6 - 6 (1 bit)
access : read-write

SCS30B : SCS30 Input/Output Select bits
bits : 12 - 12 (1 bit)
access : read-write

SCS31E : SCS31 Output Select bits
bits : 14 - 14 (1 bit)
access : read-write


PZR0

Port Pseudo Open Drain Setting Register 0
address_offset : 0x700 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PZR0 PZR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PZR1

Port Pseudo Open Drain Setting Register 1
address_offset : 0x704 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PZR1 PZR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PZR2

Port Pseudo Open Drain Setting Register 2
address_offset : 0x708 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PZR2 PZR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PZR3

Port Pseudo Open Drain Setting Register 3
address_offset : 0x70C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PZR3 PZR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PZR4

Port Pseudo Open Drain Setting Register 4
address_offset : 0x710 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PZR4 PZR4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PZR5

Port Pseudo Open Drain Setting Register 5
address_offset : 0x714 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PZR5 PZR5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PZR6

Port Pseudo Open Drain Setting Register 6
address_offset : 0x718 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PZR6 PZR6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PZR8

Port Pseudo Open Drain Setting Register 8
address_offset : 0x720 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PZR8 PZR8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PZRE

Port Pseudo Open Drain Setting Register E
address_offset : 0x738 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PZRE PZRE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PFR2

Port Function Setting Register 2
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PFR2 PFR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P21 P22 P23

P21 : Bit1 of PFR2
bits : 1 - 0 (0 bit)
access : read-write

P22 : Bit2 of PFR2
bits : 2 - 1 (0 bit)
access : read-write

P23 : Bit3 of PFR2
bits : 3 - 2 (0 bit)
access : read-write


FPOER0

Fast GPIO Output Enable Register 0
address_offset : 0x900 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

FPOER0 FPOER0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P00 P01 P02 P03 P04 P0F

P00 : Bit0 of FPOER0
bits : 0 - -1 (0 bit)
access : write-only

P01 : Bit1 of FPOER0
bits : 1 - 0 (0 bit)
access : write-only

P02 : Bit2 of FPOER0
bits : 2 - 1 (0 bit)
access : write-only

P03 : Bit3 of FPOER0
bits : 3 - 2 (0 bit)
access : write-only

P04 : Bit4 of FPOER0
bits : 4 - 3 (0 bit)
access : write-only

P0F : Bit15 of FPOER0
bits : 15 - 14 (0 bit)
access : write-only


FPOER1

Fast GPIO Output Enable Register 1
address_offset : 0x904 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

FPOER1 FPOER1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P10 P11 P12 P13 P14 P15

P10 : Bit0 of FPOER1
bits : 0 - -1 (0 bit)
access : write-only

P11 : Bit1 of FPOER1
bits : 1 - 0 (0 bit)
access : write-only

P12 : Bit2 of FPOER1
bits : 2 - 1 (0 bit)
access : write-only

P13 : Bit3 of FPOER1
bits : 3 - 2 (0 bit)
access : write-only

P14 : Bit4 of FPOER1
bits : 4 - 3 (0 bit)
access : write-only

P15 : Bit5 of FPOER1
bits : 5 - 4 (0 bit)
access : write-only


FPOER2

Fast GPIO Output Enable Register 2
address_offset : 0x908 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

FPOER2 FPOER2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P21 P22 P23

P21 : Bit1 of FPOER2
bits : 1 - 0 (0 bit)
access : write-only

P22 : Bit2 of FPOER2
bits : 2 - 1 (0 bit)
access : write-only

P23 : Bit3 of FPOER2
bits : 3 - 2 (0 bit)
access : write-only


FPOER3

Fast GPIO Output Enable Register 3
address_offset : 0x90C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

FPOER3 FPOER3 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P39 P3A P3B P3C P3D P3E P3F

P39 : Bit9 of FPOER3
bits : 9 - 8 (0 bit)
access : write-only

P3A : Bit10 of FPOER3
bits : 10 - 9 (0 bit)
access : write-only

P3B : Bit11 of FPOER3
bits : 11 - 10 (0 bit)
access : write-only

P3C : Bit12 of FPOER3
bits : 12 - 11 (0 bit)
access : write-only

P3D : Bit13 of FPOER3
bits : 13 - 12 (0 bit)
access : write-only

P3E : Bit14 of FPOER3
bits : 14 - 13 (0 bit)
access : write-only

P3F : Bit15 of FPOER3
bits : 15 - 14 (0 bit)
access : write-only


FPOER4

Fast GPIO Output Enable Register 4
address_offset : 0x910 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

FPOER4 FPOER4 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P46 P47 P49 P4A

P46 : Bit6 of FPOER4
bits : 6 - 5 (0 bit)
access : write-only

P47 : Bit7 of FPOER4
bits : 7 - 6 (0 bit)
access : write-only

P49 : Bit9 of FPOER4
bits : 9 - 8 (0 bit)
access : write-only

P4A : Bit10 of FPOER4
bits : 10 - 9 (0 bit)
access : write-only


FPOER5

Fast GPIO Output Enable Register 5
address_offset : 0x914 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

FPOER5 FPOER5 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P50 P51 P52

P50 : Bit0 of FPOER5
bits : 0 - -1 (0 bit)
access : write-only

P51 : Bit1 of FPOER5
bits : 1 - 0 (0 bit)
access : write-only

P52 : Bit2 of FPOER5
bits : 2 - 1 (0 bit)
access : write-only


FPOER6

Fast GPIO Output Enable Register 6
address_offset : 0x918 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

FPOER6 FPOER6 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P60 P61

P60 : Bit0 of FPOER6
bits : 0 - -1 (0 bit)
access : write-only

P61 : Bit1 of FPOER6
bits : 1 - 0 (0 bit)
access : write-only


FPOER8

Fast GPIO Output Enable Register 8
address_offset : 0x920 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

FPOER8 FPOER8 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P80 P81 P82

P80 : Bit0 of FPOER8
bits : 0 - -1 (0 bit)
access : write-only

P81 : Bit1 of FPOER8
bits : 1 - 0 (0 bit)
access : write-only

P82 : Bit2 of FPOER8
bits : 2 - 1 (0 bit)
access : write-only


FPOERE

Fast GPIO Output Enable Register E
address_offset : 0x938 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

FPOERE FPOERE write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PE0 PE2 PE3

PE0 : Bit0 of FPOERE
bits : 0 - -1 (0 bit)
access : write-only

PE2 : Bit2 of FPOERE
bits : 2 - 1 (0 bit)
access : write-only

PE3 : Bit3 of FPOERE
bits : 3 - 2 (0 bit)
access : write-only


PFR3

Port Function Setting Register 3
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PFR3 PFR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P39 P3A P3B P3C P3D P3E P3F

P39 : Bit9 of PFR3
bits : 9 - 8 (0 bit)
access : read-write

P3A : Bit10 of PFR3
bits : 10 - 9 (0 bit)
access : read-write

P3B : Bit11 of PFR3
bits : 11 - 10 (0 bit)
access : read-write

P3C : Bit12 of PFR3
bits : 12 - 11 (0 bit)
access : read-write

P3D : Bit13 of PFR3
bits : 13 - 12 (0 bit)
access : read-write

P3E : Bit14 of PFR3
bits : 14 - 13 (0 bit)
access : read-write

P3F : Bit15 of PFR3
bits : 15 - 14 (0 bit)
access : read-write



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