\n
address_offset : 0x0 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x4 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x700 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x704 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x708 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x70C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x710 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x714 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x800 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x804 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x808 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x80C Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
Sub Oscillation Circuit Power Supply Control Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ISUBSEL : Sub oscillation circuit current setting bits
bits : 1 - 1 (1 bit)
access : read-write
Sub Clock Control Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RTCCKE : RTC clock control bit
bits : 0 - -1 (0 bit)
access : read-write
CECCKE : CEC clock control bit
bits : 1 - 0 (0 bit)
access : read-write
RTC Mode Control Register
address_offset : 0x700 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RTCE : RTC mode control bit
bits : 0 - -1 (0 bit)
access : read-write
Deep Standby Return Factor Register 1
address_offset : 0x704 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
WINITX : INITX pin input reset return bit
bits : 0 - -1 (0 bit)
access : read-only
WLVDH : Low-voltage detection reset return bit
bits : 1 - 0 (0 bit)
access : read-only
Deep Standby Return Factor Register 2
address_offset : 0x708 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
WRTCI : RTC interrupt return bit
bits : 0 - -1 (0 bit)
access : read-only
WLVDI : LVD interrupt return bit
bits : 1 - 0 (0 bit)
access : read-only
WUI0 : WKUP0 pin input return bit
bits : 2 - 1 (0 bit)
access : read-only
WUI1 : WKUP1 pin input return bit
bits : 3 - 2 (0 bit)
access : read-only
WUI2 : WKUP2 pin input return bit
bits : 4 - 3 (0 bit)
access : read-only
WUI3 : WKUP3 pin input return bit
bits : 5 - 4 (0 bit)
access : read-only
WUI4 : WKUP4 pin input return bit
bits : 6 - 5 (0 bit)
access : read-only
WUI5 : WKUP5 pin input return bit
bits : 7 - 6 (0 bit)
access : read-only
WCEC0I : CEC ch.0 interrupt return bit
bits : 8 - 7 (0 bit)
access : read-only
WCEC1I : CEC ch.1 interrupt return bit
bits : 9 - 8 (0 bit)
access : read-only
Deep Standby Return Enable Register
address_offset : 0x70C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WRTCE : RTC interrupt return enable bit
bits : 0 - -1 (0 bit)
access : read-write
WLVDE : LVD interrupt return enable bit
bits : 1 - 0 (0 bit)
access : read-write
WUI1E : WKUP1 pin input return enable bit
bits : 3 - 2 (0 bit)
access : read-write
WUE1 : WKUP1 pin input return enable bit
bits : 3 - 2 (0 bit)
access : read-write
WUI2E : WKUP2 pin input return enable bit
bits : 4 - 3 (0 bit)
access : read-write
WUE2 : WKUP2 pin input return enable bit
bits : 4 - 3 (0 bit)
access : read-write
WUI3E : WKUP3 pin input return enable bit
bits : 5 - 4 (0 bit)
access : read-write
WUE3 : WKUP3 pin input return enable bit
bits : 5 - 4 (0 bit)
access : read-write
WUI4E : WKUP4 pin input return enable bit
bits : 6 - 5 (0 bit)
access : read-write
WUE4 : WKUP4 pin input return enable bit
bits : 6 - 5 (0 bit)
access : read-write
WUI5E : WKUP5 pin input return enable bit
bits : 7 - 6 (0 bit)
access : read-write
WUE5 : WKUP5 pin input return enable bit
bits : 7 - 6 (0 bit)
access : read-write
WCEC0E : HDMI-CEC/ Remote Control Reception ch.0 interrupt return enable bit
bits : 8 - 7 (0 bit)
access : read-write
WCEC1E : HDMI-CEC/ Remote Control Reception ch.1 interrupt return enable bit
bits : 9 - 8 (0 bit)
access : read-write
WKUP Pin Input Level Register
address_offset : 0x710 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WUI1LV : WKUP1 pin input level select bit
bits : 0 - -1 (0 bit)
access : read-write
WUI2LV : WKUP2 pin input level select bit
bits : 1 - 0 (0 bit)
access : read-write
WUI3LV : WKUP3 pin input level select bit
bits : 2 - 1 (0 bit)
access : read-write
WUI4LV : WKUP4 pin input level select bit
bits : 3 - 2 (0 bit)
access : read-write
WUI5LV : WKUP5 pin input level select bit
bits : 4 - 3 (0 bit)
access : read-write
Deep Standby RAM Retention Register
address_offset : 0x714 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SRAMR : On-chip SRAM retention control bits
bits : 0 - 0 (1 bit)
access : read-write
Backup Registers01
address_offset : 0x800 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Backup Registers02
address_offset : 0x801 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Backup Registers03
address_offset : 0x802 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Backup Registers04
address_offset : 0x803 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Backup Registers05
address_offset : 0x804 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Backup Registers06
address_offset : 0x805 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Backup Registers07
address_offset : 0x806 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Backup Registers08
address_offset : 0x807 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Backup Registers09
address_offset : 0x808 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Backup Registers10
address_offset : 0x809 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Backup Registers11
address_offset : 0x80A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Backup Registers12
address_offset : 0x80B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Backup Registers13
address_offset : 0x80C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Backup Registers14
address_offset : 0x80D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Backup Registers15
address_offset : 0x80E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Backup Registers16
address_offset : 0x80F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
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