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MFS0

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x38 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x3C Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x40 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x4 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x8 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0xC Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x10 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x14 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x18 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x1C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x20 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x24 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x28 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x2C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x30 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x34 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x3C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x41 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x40 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x3D Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

Registers

UART_SMR

CSIO_SMR

LIN_SMR

I2C_SMR

UART_SCR

CSIO_SCR

LIN_SCR

I2C_IBCR

I2C_ISBA

I2C_ISMK

UART_FCR0

CSIO_FCR0

LIN_FCR0

I2C_FCR0

UART_FCR1

CSIO_FCR1

LIN_FCR1

I2C_FCR1

UART_FBYTE1

CSIO_FBYTE1

LIN_FBYTE1

I2C_FBYTE1

UART_FBYTE2

CSIO_FBYTE2

LIN_FBYTE2

I2C_FBYTE2

CSIO_SCSTR0

I2C_NFCR

CSIO_SCSTR1

I2C_EIBCR

CSIO_SCSTR2

CSIO_SCSTR32

CSIO_SACSR

CSIO_STMR

CSIO_STMCR

CSIO_SCSCR

CSIO_SCSFR0

CSIO_SCSFR1

CSIO_SCSFR2

CSIO_SCSFR3

CSIO_TBYTE0

CSIO_TBYTE1

UART_ESCR

CSIO_ESCR

LIN_ESCR

I2C_IBSR

CSIO_TBYTE2

CSIO_TBYTE3

UART_SSR

CSIO_SSR

LIN_SSR

I2C_SSR

UART_RDR

UART_TDR

CSIO_RDR

CSIO_TDR

LIN_RDR

LIN_TDR

I2C_RDR

I2C_TDR

UART_BGR

CSIO_BGR

LIN_BGR

I2C_BGR


UART_SMR

Serial Mode Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_SMR UART_SMR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SOE BDS SBL MD

SOE : Serial data output enable bit
bits : 0 - -1 (0 bit)
access : read-write

BDS : Transfer direction select bit
bits : 2 - 1 (0 bit)
access : read-write

SBL : Stop bit length select bit
bits : 3 - 2 (0 bit)
access : read-write

MD : Operation mode set bit
bits : 5 - 6 (2 bit)
access : read-write


CSIO_SMR

Serial Mode Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SMR CSIO_SMR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SOE SCKE BDS SCINV MD

SOE : Serial data output enable bit
bits : 0 - -1 (0 bit)
access : read-write

SCKE : Master mode serial clock output enable bit
bits : 1 - 0 (0 bit)
access : read-write

BDS : Transfer direction select bit
bits : 2 - 1 (0 bit)
access : read-write

SCINV : Serial clock invert bit
bits : 3 - 2 (0 bit)
access : read-write

MD : Operation mode set bits
bits : 5 - 6 (2 bit)
access : read-write


LIN_SMR

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_SMR LIN_SMR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SOE SBL MD

SOE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 0 - -1 (0 bit)
access : read-write

SBL : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 3 - 2 (0 bit)
access : read-write

MD : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 5 - 6 (2 bit)
access : read-write


I2C_SMR

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_SMR I2C_SMR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TIE RIE MD

TIE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 2 - 1 (0 bit)
access : read-write

RIE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 3 - 2 (0 bit)
access : read-write

MD : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 5 - 6 (2 bit)
access : read-write


UART_SCR

Serial Control Register
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_SCR UART_SCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TXE RXE TBIE TIE RIE UPCL

TXE : Transmission operation enable bit
bits : 0 - -1 (0 bit)
access : read-write

RXE : Received operation enable bit
bits : 1 - 0 (0 bit)
access : read-write

TBIE : Transmit bus idle interrupt enable bit
bits : 2 - 1 (0 bit)
access : read-write

TIE : Transmit interrupt enable bit
bits : 3 - 2 (0 bit)
access : read-write

RIE : Received interrupt enable bit
bits : 4 - 3 (0 bit)
access : read-write

UPCL : Programmable Clear bit
bits : 7 - 6 (0 bit)
access : read-write


CSIO_SCR

Serial Control Register
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SCR CSIO_SCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TXE RXE TBIE TIE RIE SPI MS UPCL

TXE : Data transmission enable bit
bits : 0 - -1 (0 bit)
access : read-write

RXE : Data received enable bit
bits : 1 - 0 (0 bit)
access : read-write

TBIE : Transmit bus idle interrupt enable bit
bits : 2 - 1 (0 bit)
access : read-write

TIE : Transmit interrupt enable bit
bits : 3 - 2 (0 bit)
access : read-write

RIE : Received interrupt enable bit
bits : 4 - 3 (0 bit)
access : read-write

SPI : SPI corresponding bit
bits : 5 - 4 (0 bit)
access : read-write

MS : Master/Slave function select bit
bits : 6 - 5 (0 bit)
access : read-write

UPCL : Programmable clear bit
bits : 7 - 6 (0 bit)
access : read-write


LIN_SCR

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_SCR LIN_SCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TXE RXE TBIE TIE RIE LBR MS UPCL

TXE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 0 - -1 (0 bit)
access : read-write

RXE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 1 - 0 (0 bit)
access : read-write

TBIE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 2 - 1 (0 bit)
access : read-write

TIE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 3 - 2 (0 bit)
access : read-write

RIE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 4 - 3 (0 bit)
access : read-write

LBR : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 5 - 4 (0 bit)
access : read-write

MS : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 6 - 5 (0 bit)
access : read-write

UPCL : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 7 - 6 (0 bit)
access : read-write


I2C_IBCR

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_IBCR I2C_IBCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INT BER INTE CNDE WSEL ACKE ACT_SCC MSS

INT : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 0 - -1 (0 bit)
access : read-write

BER : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 1 - 0 (0 bit)
access : read-only

INTE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 2 - 1 (0 bit)
access : read-write

CNDE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 3 - 2 (0 bit)
access : read-write

WSEL : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 4 - 3 (0 bit)
access : read-write

ACKE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 5 - 4 (0 bit)
access : read-write

ACT_SCC : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 6 - 5 (0 bit)
access : read-write

MSS : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 7 - 6 (0 bit)
access : read-write


I2C_ISBA

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_ISBA I2C_ISBA read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SA SAEN

SA : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 0 - 5 (6 bit)
access : read-write

SAEN : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 7 - 6 (0 bit)
access : read-write


I2C_ISMK

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x11 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_ISMK I2C_ISMK read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SM EN

SM : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 0 - 5 (6 bit)
access : read-write

EN : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 7 - 6 (0 bit)
access : read-write


UART_FCR0

FIFO Control Register 0
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_FCR0 UART_FCR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FE1 FE2 FCL1 FCL2 FSET FLD FLST

FE1 : FIFO1 operation enable bit
bits : 0 - -1 (0 bit)
access : read-write

FE2 : FIFO2 operation enable bit
bits : 1 - 0 (0 bit)
access : read-write

FCL1 : FIFO1 reset bit
bits : 2 - 1 (0 bit)
access : read-write

FCL2 : FIFO2 reset bit
bits : 3 - 2 (0 bit)
access : read-write

FSET : FIFO pointer save bit
bits : 4 - 3 (0 bit)
access : read-write

FLD : FIFO pointer reload bit
bits : 5 - 4 (0 bit)
access : read-write

FLST : FIFO re-transmit data lost flag bit
bits : 6 - 5 (0 bit)
access : read-only


CSIO_FCR0

FIFO Control Register 0
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_FCR0 CSIO_FCR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FE1 FE2 FCL1 FCL2 FSET FLD FLST

FE1 : FIFO1 operation enable bit
bits : 0 - -1 (0 bit)
access : read-write

FE2 : FIFO2 operation enable bit
bits : 1 - 0 (0 bit)
access : read-write

FCL1 : FIFO1 reset bit
bits : 2 - 1 (0 bit)
access : read-write

FCL2 : FIFO2 reset bit
bits : 3 - 2 (0 bit)
access : read-write

FSET : FIFO pointer save bit
bits : 4 - 3 (0 bit)
access : read-write

FLD : FIFO pointer reload bit
bits : 5 - 4 (0 bit)
access : read-write

FLST : FIFO re-transmit data lost flag bit
bits : 6 - 5 (0 bit)
access : read-only


LIN_FCR0

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_FCR0 LIN_FCR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FE1 FE2 FCL1 FCL2 FSET FLD FLST

FE1 : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 0 - -1 (0 bit)
access : read-write

FE2 : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 1 - 0 (0 bit)
access : read-write

FCL1 : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 2 - 1 (0 bit)
access : read-write

FCL2 : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 3 - 2 (0 bit)
access : read-write

FSET : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 4 - 3 (0 bit)
access : read-write

FLD : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 5 - 4 (0 bit)
access : read-write

FLST : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 6 - 5 (0 bit)
access : read-only


I2C_FCR0

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_FCR0 I2C_FCR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FE1 FE2 FCL1 FCL2 FSET FLD FLST

FE1 : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 0 - -1 (0 bit)
access : read-write

FE2 : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 1 - 0 (0 bit)
access : read-write

FCL1 : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 2 - 1 (0 bit)
access : read-write

FCL2 : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 3 - 2 (0 bit)
access : read-write

FSET : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 4 - 3 (0 bit)
access : read-write

FLD : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 5 - 4 (0 bit)
access : read-write

FLST : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 6 - 5 (0 bit)
access : read-only


UART_FCR1

FIFO Control Register 1
address_offset : 0x15 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_FCR1 UART_FCR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FSEL FTIE FDRQ FRIIE FLSTE

FSEL : FIFO select bit
bits : 0 - -1 (0 bit)
access : read-write

FTIE : Transmit FIFO interrupt enable bit
bits : 1 - 0 (0 bit)
access : read-write

FDRQ : Transmit FIFO data request bit
bits : 2 - 1 (0 bit)
access : read-write

FRIIE : Received FIFO idle detection enable bit
bits : 3 - 2 (0 bit)
access : read-write

FLSTE : Re-transmission data lost detect enable bit
bits : 4 - 3 (0 bit)
access : read-write


CSIO_FCR1

FIFO Control Register 1
address_offset : 0x15 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_FCR1 CSIO_FCR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FSEL FTIE FDRQ FRIIE FLSTE

FSEL : FIFO select bit
bits : 0 - -1 (0 bit)
access : read-write

FTIE : Transmit FIFO interrupt enable bit
bits : 1 - 0 (0 bit)
access : read-write

FDRQ : Transmit FIFO data request bit
bits : 2 - 1 (0 bit)
access : read-write

FRIIE : Received FIFO idle detection enable bit
bits : 3 - 2 (0 bit)
access : read-write

FLSTE : Re-transmit data lost detect enable bit
bits : 4 - 3 (0 bit)
access : read-write


LIN_FCR1

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x15 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_FCR1 LIN_FCR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FSEL FTIE FDRQ FRIIE FLSTE

FSEL : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 0 - -1 (0 bit)
access : read-write

FTIE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 1 - 0 (0 bit)
access : read-write

FDRQ : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 2 - 1 (0 bit)
access : read-write

FRIIE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 3 - 2 (0 bit)
access : read-write

FLSTE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 4 - 3 (0 bit)
access : read-write


I2C_FCR1

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x15 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_FCR1 I2C_FCR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FSEL FTIE FDRQ FRIIE FLSTE

FSEL : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 0 - -1 (0 bit)
access : read-write

FTIE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 1 - 0 (0 bit)
access : read-write

FDRQ : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 2 - 1 (0 bit)
access : read-write

FRIIE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 3 - 2 (0 bit)
access : read-write

FLSTE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 4 - 3 (0 bit)
access : read-write


UART_FBYTE1

FIFO Byte Register 1
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_FBYTE1 UART_FBYTE1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

CSIO_FBYTE1

FIFO Byte Register 1
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_FBYTE1 CSIO_FBYTE1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

LIN_FBYTE1

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_FBYTE1 LIN_FBYTE1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

I2C_FBYTE1

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_FBYTE1 I2C_FBYTE1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

UART_FBYTE2

FIFO Byte Register 2
address_offset : 0x19 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_FBYTE2 UART_FBYTE2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

CSIO_FBYTE2

FIFO Byte Register 2
address_offset : 0x19 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_FBYTE2 CSIO_FBYTE2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

LIN_FBYTE2

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x19 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_FBYTE2 LIN_FBYTE2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

I2C_FBYTE2

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x19 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_FBYTE2 I2C_FBYTE2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

CSIO_SCSTR0

Serial Chip Select Timing Register 0
address_offset : 0x1C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SCSTR0 CSIO_SCSTR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CSHD

CSHD : Serial Chip Select Hold Delay bits
bits : 0 - 6 (7 bit)
access : read-write


I2C_NFCR

Noise Filter Control Register
address_offset : 0x1C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_NFCR I2C_NFCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 NFT

NFT : Noise Filter Time Select bits
bits : 0 - 3 (4 bit)
access : read-write


CSIO_SCSTR1

Serial Chip Select Timing Register 1
address_offset : 0x1D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SCSTR1 CSIO_SCSTR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CSSU

CSSU : Serial Chip Select Setup Delay bits
bits : 0 - 6 (7 bit)
access : read-write


I2C_EIBCR

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x1D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_EIBCR I2C_EIBCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BEC SOCE SCLC SDAC SCLS SDAS

BEC : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 0 - -1 (0 bit)
access : read-write

SOCE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 1 - 0 (0 bit)
access : read-write

SCLC : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 2 - 1 (0 bit)
access : read-write

SDAC : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 3 - 2 (0 bit)
access : read-write

SCLS : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 4 - 3 (0 bit)
access : read-only

SDAS : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 5 - 4 (0 bit)
access : read-only


CSIO_SCSTR2

Serial Chip Select Timing Registers 2/3
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SCSTR2 CSIO_SCSTR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CSDS

CSDS : Serial Chip Deselect bits
bits : 0 - 14 (15 bit)
access : read-write


CSIO_SCSTR32

Serial Chip Select Timing Register 32
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SCSTR32 CSIO_SCSTR32 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CSDS

CSDS : Serial Chip Deselect bits
bits : 0 - 14 (15 bit)
access : read-write


CSIO_SACSR

Serial Support Control Register
address_offset : 0x24 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SACSR CSIO_SACSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TMRE TDIV TSYNE TINTE TINT CSE CSEIE TBEEN

TMRE : Serial Timer Enable bit
bits : 0 - -1 (0 bit)
access : read-write

TDIV : Timer Operation Clock Division bit
bits : 1 - 3 (3 bit)
access : read-write

TSYNE : Synchronous Transmission Enable bit
bits : 6 - 5 (0 bit)
access : read-write

TINTE : Timer Interrupt Enable bit
bits : 7 - 6 (0 bit)
access : read-write

TINT : Timer Interrupt Flag
bits : 8 - 7 (0 bit)
access : read-write

CSE : Chip Select Error Flag
bits : 11 - 10 (0 bit)
access : read-write

CSEIE : Chip Select Error Interupt Enable bit
bits : 12 - 11 (0 bit)
access : read-write

TBEEN : Transfer Byte Error Enable bit
bits : 13 - 12 (0 bit)
access : read-write


CSIO_STMR

Serial Timer Register
address_offset : 0x28 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_STMR CSIO_STMR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TM

TM : Timer Data bits
bits : 0 - 14 (15 bit)
access : read-only


CSIO_STMCR

Serial Timer Comparison Register
address_offset : 0x2C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_STMCR CSIO_STMCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TC

TC : Compare bits
bits : 0 - 14 (15 bit)
access : read-write


CSIO_SCSCR

Serial Chip Select Control Status Register
address_offset : 0x30 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SCSCR CSIO_SCSCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CSOE CSEN0 CSEN1 CSEN2 CSEN3 CSLVL CDIV SCAM SCD SED SST

CSOE : Serial Chip Select Output Enable bit
bits : 0 - -1 (0 bit)
access : read-write

CSEN0 : Serial Chip Select Enable bit
bits : 1 - 0 (0 bit)
access : read-write

CSEN1 : Serial Chip Select Enable bit
bits : 2 - 1 (0 bit)
access : read-write

CSEN2 : Serial Chip Select Enable bit
bits : 3 - 2 (0 bit)
access : read-write

CSEN3 : Serial Chip Select Enable bit
bits : 4 - 3 (0 bit)
access : read-write

CSLVL : Serial Chip Select Level Setting bit
bits : 5 - 4 (0 bit)
access : read-write

CDIV : Serial Chip Select Timing Operation Clock Division bit
bits : 6 - 7 (2 bit)
access : read-write

SCAM : Serial Chip Select Active Hold bit
bits : 9 - 8 (0 bit)
access : read-write

SCD : Serial Chip Select Active Display bit
bits : 11 - 10 (0 bit)
access : read-write

SED : Serial Chip Select Active End bit
bits : 12 - 12 (1 bit)
access : read-write

SST : Serial Chip Select Active Start bit
bits : 14 - 14 (1 bit)
access : read-write


CSIO_SCSFR0

Serial Chip Select Format Register 0
address_offset : 0x34 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SCSFR0 CSIO_SCSFR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CS1L CS1BDS CS1SPI CS1SCINV CS1CSLVL

CS1L : Data length select bits of Serial Chip Select 1
bits : 0 - 2 (3 bit)
access : read-write

CS1BDS : Transfer direction select bit of Serial Chip Select 1
bits : 4 - 3 (0 bit)
access : read-write

CS1SPI : SPI corresponding bit of Serial Chip Select 1
bits : 5 - 4 (0 bit)
access : read-write

CS1SCINV : Serial Clock Invert bit of Serial Chip Select 1
bits : 6 - 5 (0 bit)
access : read-write

CS1CSLVL : Serial Chip Select 1 Level Setting bit
bits : 7 - 6 (0 bit)
access : read-write


CSIO_SCSFR1

Serial Chip Select Format Register 1
address_offset : 0x35 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SCSFR1 CSIO_SCSFR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CS2L CS2BDS CS2SPI CS2SCINV CS2CSLVL

CS2L : Data length select bits of Serial Chip Select 2
bits : 0 - 2 (3 bit)
access : read-write

CS2BDS : Transfer direction select bit of Serial Chip Select 2
bits : 4 - 3 (0 bit)
access : read-write

CS2SPI : SPI corresponding bit of Serial Chip Select 2
bits : 5 - 4 (0 bit)
access : read-write

CS2SCINV : Serial Clock Invert bit of Serial Chip Select 2
bits : 6 - 5 (0 bit)
access : read-write

CS2CSLVL : Serial Chip Select 2 Level Setting bit
bits : 7 - 6 (0 bit)
access : read-write


CSIO_SCSFR2

Serial Chip Select Format Register 0
address_offset : 0x38 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SCSFR2 CSIO_SCSFR2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CS0L CS0BDS CS0SPI CS0SCINV CS0CSLVL

CS0L : Data length select bits of Serial Chip Select 0
bits : 0 - 2 (3 bit)
access : read-write

CS0BDS : Transfer direction select bit of Serial Chip Select 0
bits : 4 - 3 (0 bit)
access : read-write

CS0SPI : SPI corresponding bit of Serial Chip Select 0
bits : 5 - 4 (0 bit)
access : read-write

CS0SCINV : Serial Clock Invert bit of Serial Chip Select 0
bits : 6 - 5 (0 bit)
access : read-write

CS0CSLVL : Serial Chip Select 0 Level Setting bit
bits : 7 - 6 (0 bit)
access : read-write


CSIO_SCSFR3

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x38 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CSIO_SCSFR3 CSIO_SCSFR3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CS3L CS3BDS CS3SPI CS3SCINV CS3CSLVL

CS3L : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 0 - 2 (3 bit)
access : read-write

CS3BDS : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 4 - 3 (0 bit)
access : read-write

CS3SPI : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 5 - 4 (0 bit)
access : read-write

CS3SCINV : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 6 - 5 (0 bit)
access : read-write

CS3CSLVL : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 7 - 6 (0 bit)
access : read-write


CSIO_TBYTE0

Transfer Byte Register 0
address_offset : 0x3C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_TBYTE0 CSIO_TBYTE0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

CSIO_TBYTE1

Transfer Byte Register 1
address_offset : 0x3D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_TBYTE1 CSIO_TBYTE1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

UART_ESCR

Extended Communication Control Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_ESCR UART_ESCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 L P PEN INV ESBL FLWEN

L : Data length select bit
bits : 0 - 1 (2 bit)
access : read-write

P : Parity select bit (only functions in operation mode 0)
bits : 3 - 2 (0 bit)
access : read-write

PEN : Parity enable bit (only functions in operation mode 0)
bits : 4 - 3 (0 bit)
access : read-write

INV : Inverted serial data format bit
bits : 5 - 4 (0 bit)
access : read-write

ESBL : Extension stop bit length select bit
bits : 6 - 5 (0 bit)
access : read-write

FLWEN : Flow control enable bit
bits : 7 - 6 (0 bit)
access : read-write


CSIO_ESCR

Extended Communication Control Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_ESCR CSIO_ESCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 L WT CSFE L3 SOP

L : Bit0-2 of Data length select bits
bits : 0 - 1 (2 bit)
access : read-write

WT : Data transmit/received wait select bits
bits : 3 - 3 (1 bit)
access : read-write

CSFE : Serial Chip Select Format enable bit
bits : 5 - 4 (0 bit)
access : read-write

L3 : Bit3 of Data length select bits
bits : 6 - 5 (0 bit)
access : read-write

SOP : Serial output pin set bit
bits : 7 - 6 (0 bit)
access : read-write


LIN_ESCR

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_ESCR LIN_ESCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DEL LBL LBIE ESBL

DEL : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 0 - 0 (1 bit)
access : read-write

LBL : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 2 - 2 (1 bit)
access : read-write

LBIE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 4 - 3 (0 bit)
access : read-write

ESBL : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 6 - 5 (0 bit)
access : read-write


I2C_IBSR

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_IBSR I2C_IBSR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BB SPC RSC AL TRX RSA RACK FBT

BB : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 0 - -1 (0 bit)
access : read-only

SPC : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 1 - 0 (0 bit)
access : read-write

RSC : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 2 - 1 (0 bit)
access : read-write

AL : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 3 - 2 (0 bit)
access : read-only

TRX : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 4 - 3 (0 bit)
access : read-only

RSA : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 5 - 4 (0 bit)
access : read-only

RACK : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 6 - 5 (0 bit)
access : read-only

FBT : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 7 - 6 (0 bit)
access : read-only


CSIO_TBYTE2

Transfer Byte Register 2
address_offset : 0x40 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_TBYTE2 CSIO_TBYTE2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

CSIO_TBYTE3

Transfer Byte Register 3
address_offset : 0x41 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_TBYTE3 CSIO_TBYTE3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

UART_SSR

Serial Status Register
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_SSR UART_SSR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TBI TDRE RDRF ORE FRE PE REC

TBI : Transmit bus idle flag
bits : 0 - -1 (0 bit)
access : read-only

TDRE : Transmit data empty flag bit
bits : 1 - 0 (0 bit)
access : read-only

RDRF : Received data full flag bit
bits : 2 - 1 (0 bit)
access : read-only

ORE : Overrun error flag bit
bits : 3 - 2 (0 bit)
access : read-only

FRE : Framing error flag bit
bits : 4 - 3 (0 bit)
access : read-only

PE : Parity error flag bit
bits : 5 - 4 (0 bit)
access : read-only

REC : Received error flag clear bit
bits : 7 - 6 (0 bit)
access : read-write


CSIO_SSR

Serial Status Register
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SSR CSIO_SSR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TBI TDRE RDRF ORE REC

TBI : Transmit bus idle flag bit
bits : 0 - -1 (0 bit)
access : read-only

TDRE : Transmit data empty flag bit
bits : 1 - 0 (0 bit)
access : read-only

RDRF : Received data full flag bit
bits : 2 - 1 (0 bit)
access : read-only

ORE : Overrun error flag bit
bits : 3 - 2 (0 bit)
access : read-only

REC : Received error flag clear bit
bits : 7 - 6 (0 bit)
access : read-write


LIN_SSR

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_SSR LIN_SSR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TBI TDRE RDRF ORE FRE LBD REC

TBI : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 0 - -1 (0 bit)
access : read-only

TDRE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 1 - 0 (0 bit)
access : read-only

RDRF : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 2 - 1 (0 bit)
access : read-only

ORE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 3 - 2 (0 bit)
access : read-only

FRE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 4 - 3 (0 bit)
access : read-only

LBD : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 5 - 4 (0 bit)
access : read-write

REC : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 7 - 6 (0 bit)
access : read-write


I2C_SSR

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_SSR I2C_SSR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TBI TDRE RDRF ORE TBIE DMA TSET REC

TBI : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 0 - -1 (0 bit)
access : read-only

TDRE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 1 - 0 (0 bit)
access : read-only

RDRF : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 2 - 1 (0 bit)
access : read-only

ORE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 3 - 2 (0 bit)
access : read-only

TBIE : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 4 - 3 (0 bit)
access : read-write

DMA : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 5 - 4 (0 bit)
access : read-write

TSET : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 6 - 5 (0 bit)
access : read-write

REC : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 7 - 6 (0 bit)
access : read-write


UART_RDR

Received Data Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_RDR UART_RDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data
bits : 0 - 7 (8 bit)
access : read-only


UART_TDR

Transmit Data Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : write-only
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_TDR UART_TDR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data
bits : 0 - 7 (8 bit)
access : write-only


CSIO_RDR

Received Data Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_RDR CSIO_RDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data
bits : 0 - 14 (15 bit)
access : read-only


CSIO_TDR

Transmit Data Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : write-only
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_TDR CSIO_TDR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data
bits : 0 - 14 (15 bit)
access : write-only


LIN_RDR

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_RDR LIN_RDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data
bits : 0 - 6 (7 bit)
access : read-only


LIN_TDR

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : write-only
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_TDR LIN_TDR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data
bits : 0 - 6 (7 bit)
access : write-only


I2C_RDR

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_RDR I2C_RDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data
bits : 0 - 6 (7 bit)
access : read-only


I2C_TDR

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : write-only
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_TDR I2C_TDR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data
bits : 0 - 6 (7 bit)
access : write-only


UART_BGR

Baud Rate Generator Registers
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_BGR UART_BGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BGR0 BGR1 EXT

BGR0 : Baud Rate Generator Register 0
bits : 0 - 6 (7 bit)
access : read-write

BGR1 : Baud Rate Generator Register 1
bits : 8 - 13 (6 bit)
access : read-write

EXT : External clock select bit
bits : 15 - 14 (0 bit)
access : read-write


CSIO_BGR

Baud Rate Generator Registers
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_BGR CSIO_BGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BGR0 BGR1

BGR0 : Baud Rate Generator Register 0
bits : 0 - 6 (7 bit)
access : read-write

BGR1 : Baud Rate Generator Register 1
bits : 8 - 13 (6 bit)
access : read-write


LIN_BGR

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_BGR LIN_BGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BGR0 BGR1 EXT

BGR0 : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 0 - 6 (7 bit)
access : read-write

BGR1 : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 8 - 13 (6 bit)
access : read-write

EXT : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 15 - 14 (0 bit)
access : read-write


I2C_BGR

ERROR!!!!!!!!!!!!!!!!!!!!
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_BGR I2C_BGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BGR0 BGR1

BGR0 : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 0 - 6 (7 bit)
access : read-write

BGR1 : ERROR!!!!!!!!!!!!!!!!!!!!
bits : 8 - 13 (6 bit)
access : read-write



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