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I2C

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

I2C0_CR (CR)

I2C_CR

I2C0_SHPGR (SHPGR)

I2C_SHPGR

I2C0_SLPGR (SLPGR)

I2C_SLPGR

I2C0_DR (DR)

I2C_DR

I2C0_TAR (TAR)

I2C_TAR

I2C0_ADDMR (ADDMR)

I2C_ADDMR

I2C0_ADDSR (ADDSR)

I2C_ADDSR

I2C0_TOUT (TOUT)

I2C_TOUT

I2C0_IER (IER)

I2C_IER

I2C0_ADDR (ADDR)

I2C_ADDR

I2C0_SR (SR)

I2C_SR


I2C0_CR (CR)

I2C0_CR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C0_CR I2C0_CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AA STOP GCEN I2CEN ADRM TXDMAE RXDMAE DMANACK ENTOUT RESERVED

AA : AA
bits : 0 - 0 (1 bit)
access : read-write

STOP : STOP
bits : 1 - 2 (2 bit)
access : read-write

GCEN : GCEN
bits : 2 - 4 (3 bit)
access : read-write

I2CEN : I2CEN
bits : 3 - 6 (4 bit)
access : read-write

ADRM : ADRM
bits : 7 - 14 (8 bit)
access : read-write

TXDMAE : TXDMAE
bits : 8 - 16 (9 bit)
access : read-write

RXDMAE : RXDMAE
bits : 9 - 18 (10 bit)
access : read-write

DMANACK : DMANACK
bits : 10 - 20 (11 bit)
access : read-write

ENTOUT : ENTOUT
bits : 12 - 24 (13 bit)
access : read-write

RESERVED : Reserved.
bits : 13 - 44 (32 bit)
access : read-write


I2C_CR

I2C_CR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C_CR I2C_CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AA STOP GCEN I2CEN ADRM TXDMAE RXDMAE DMANACK ENTOUT

AA : AA
bits : 0 - 0 (1 bit)
access : read-write

STOP : STOP
bits : 1 - 2 (2 bit)
access : read-write

GCEN : GCEN
bits : 2 - 4 (3 bit)
access : read-write

I2CEN : I2CEN
bits : 3 - 6 (4 bit)
access : read-write

ADRM : ADRM
bits : 7 - 14 (8 bit)
access : read-write

TXDMAE : TXDMAE
bits : 8 - 16 (9 bit)
access : read-write

RXDMAE : RXDMAE
bits : 9 - 18 (10 bit)
access : read-write

DMANACK : DMANACK
bits : 10 - 20 (11 bit)
access : read-write

ENTOUT : ENTOUT
bits : 12 - 24 (13 bit)
access : read-write


I2C0_SHPGR (SHPGR)

I2C0_SHPGR
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C0_SHPGR I2C0_SHPGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SHPG RESERVED

SHPG : SHPG
bits : 0 - 15 (16 bit)
access : read-write

RESERVED : Reserved.
bits : 16 - 47 (32 bit)
access : read-write


I2C_SHPGR

I2C_SHPGR
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C_SHPGR I2C_SHPGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SHPG

SHPG : SHPG
bits : 0 - 15 (16 bit)
access : read-write


I2C0_SLPGR (SLPGR)

I2C0_SLPGR
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C0_SLPGR I2C0_SLPGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLPG RESERVED

SLPG : SLPG
bits : 0 - 15 (16 bit)
access : read-write

RESERVED : Reserved.
bits : 16 - 47 (32 bit)
access : read-write


I2C_SLPGR

I2C_SLPGR
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C_SLPGR I2C_SLPGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLPG

SLPG : SLPG
bits : 0 - 15 (16 bit)
access : read-write


I2C0_DR (DR)

I2C0_DR
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C0_DR I2C0_DR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA RESERVED

DATA : DATA
bits : 0 - 7 (8 bit)
access : read-write

RESERVED : Reserved.
bits : 8 - 39 (32 bit)
access : read-write


I2C_DR

I2C_DR
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C_DR I2C_DR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : DATA
bits : 0 - 7 (8 bit)
access : read-write


I2C0_TAR (TAR)

I2C0_TAR
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C0_TAR I2C0_TAR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TAR RWD RESERVED

TAR : TAR
bits : 0 - 9 (10 bit)
access : read-write

RWD : RWD
bits : 10 - 20 (11 bit)
access : read-write

RESERVED : Reserved.
bits : 11 - 42 (32 bit)
access : read-write


I2C_TAR

I2C_TAR
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C_TAR I2C_TAR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TAR RWD

TAR : TAR
bits : 0 - 9 (10 bit)
access : read-write

RWD : RWD
bits : 10 - 20 (11 bit)
access : read-write


I2C0_ADDMR (ADDMR)

I2C0_ADDMR
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C0_ADDMR I2C0_ADDMR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDMR RESERVED

ADDMR : ADDMR
bits : 0 - 9 (10 bit)
access : read-write

RESERVED : Reserved.
bits : 10 - 41 (32 bit)
access : read-write


I2C_ADDMR

I2C_ADDMR
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C_ADDMR I2C_ADDMR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDMR

ADDMR : ADDMR
bits : 0 - 9 (10 bit)
access : read-write


I2C0_ADDSR (ADDSR)

I2C0_ADDSR
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C0_ADDSR I2C0_ADDSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDSR RESERVED

ADDSR : ADDSR
bits : 0 - 9 (10 bit)
access : read-write

RESERVED : Reserved.
bits : 10 - 41 (32 bit)
access : read-write


I2C_ADDSR

I2C_ADDSR
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C_ADDSR I2C_ADDSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDSR

ADDSR : ADDSR
bits : 0 - 9 (10 bit)
access : read-write


I2C0_TOUT (TOUT)

I2C0_TOUT
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C0_TOUT I2C0_TOUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TOUT PSC RESERVED

TOUT : TOUT
bits : 0 - 15 (16 bit)
access : read-write

PSC : PSC
bits : 16 - 34 (19 bit)
access : read-write

RESERVED : Reserved.
bits : 19 - 50 (32 bit)
access : read-write


I2C_TOUT

I2C_TOUT
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C_TOUT I2C_TOUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TOUT PSC

TOUT : TOUT
bits : 0 - 15 (16 bit)
access : read-write

PSC : PSC
bits : 16 - 34 (19 bit)
access : read-write


I2C0_IER (IER)

I2C0_IER
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C0_IER I2C0_IER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STAIE STOIE ADRSIE GCSIE ARBLOSIE RXNACKIE BUSERRIE TOUTIE RXDNEIE TXDEIE RXBFIE RESERVED

STAIE : STAIE
bits : 0 - 0 (1 bit)
access : read-write

STOIE : STOIE
bits : 1 - 2 (2 bit)
access : read-write

ADRSIE : ADRSIE
bits : 2 - 4 (3 bit)
access : read-write

GCSIE : GCSIE
bits : 3 - 6 (4 bit)
access : read-write

ARBLOSIE : ARBLOSIE
bits : 8 - 16 (9 bit)
access : read-write

RXNACKIE : RXNACKIE
bits : 9 - 18 (10 bit)
access : read-write

BUSERRIE : BUSERRIE
bits : 10 - 20 (11 bit)
access : read-write

TOUTIE : TOUTIE
bits : 11 - 22 (12 bit)
access : read-write

RXDNEIE : RXDNEIE
bits : 16 - 32 (17 bit)
access : read-write

TXDEIE : TXDEIE
bits : 17 - 34 (18 bit)
access : read-write

RXBFIE : RXBFIE
bits : 18 - 36 (19 bit)
access : read-write

RESERVED : Reserved.
bits : 19 - 50 (32 bit)
access : read-write


I2C_IER

I2C_IER
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C_IER I2C_IER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STAIE STOIE ADRSIE GCSIE ARBLOSIE RXNACKIE BUSERRIE TOUTIE RXDNEIE TXDEIE RXBFIE

STAIE : STAIE
bits : 0 - 0 (1 bit)
access : read-write

STOIE : STOIE
bits : 1 - 2 (2 bit)
access : read-write

ADRSIE : ADRSIE
bits : 2 - 4 (3 bit)
access : read-write

GCSIE : GCSIE
bits : 3 - 6 (4 bit)
access : read-write

ARBLOSIE : ARBLOSIE
bits : 8 - 16 (9 bit)
access : read-write

RXNACKIE : RXNACKIE
bits : 9 - 18 (10 bit)
access : read-write

BUSERRIE : BUSERRIE
bits : 10 - 20 (11 bit)
access : read-write

TOUTIE : TOUTIE
bits : 11 - 22 (12 bit)
access : read-write

RXDNEIE : RXDNEIE
bits : 16 - 32 (17 bit)
access : read-write

TXDEIE : TXDEIE
bits : 17 - 34 (18 bit)
access : read-write

RXBFIE : RXBFIE
bits : 18 - 36 (19 bit)
access : read-write


I2C0_ADDR (ADDR)

I2C0_ADDR
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C0_ADDR I2C0_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR RESERVED

ADDR : ADDR
bits : 0 - 9 (10 bit)
access : read-write

RESERVED : Reserved.
bits : 10 - 41 (32 bit)
access : read-write


I2C_ADDR

I2C_ADDR
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C_ADDR I2C_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR

ADDR : ADDR
bits : 0 - 9 (10 bit)
access : read-write


I2C0_SR (SR)

I2C0_SR
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C0_SR I2C0_SR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STA STO ADRS GCS ARBLOS RXNACK BUSERR TOUTF RXDNE TXDE RXBF BUSBUSY MASTER TXNRX RESERVED

STA : STA
bits : 0 - 0 (1 bit)
access : read-write

STO : STO
bits : 1 - 2 (2 bit)
access : read-write

ADRS : ADRS
bits : 2 - 4 (3 bit)
access : read-write

GCS : GCS
bits : 3 - 6 (4 bit)
access : read-write

ARBLOS : ARBLOS
bits : 8 - 16 (9 bit)
access : read-write

RXNACK : RXNACK
bits : 9 - 18 (10 bit)
access : read-write

BUSERR : BUSERR
bits : 10 - 20 (11 bit)
access : read-write

TOUTF : TOUTF
bits : 11 - 22 (12 bit)
access : read-write

RXDNE : RXDNE
bits : 16 - 32 (17 bit)
access : read-write

TXDE : TXDE
bits : 17 - 34 (18 bit)
access : read-write

RXBF : RXBF
bits : 18 - 36 (19 bit)
access : read-write

BUSBUSY : BUSBUSY
bits : 19 - 38 (20 bit)
access : read-write

MASTER : MASTER
bits : 20 - 40 (21 bit)
access : read-write

TXNRX : TXNRX
bits : 21 - 42 (22 bit)
access : read-write

RESERVED : Reserved.
bits : 22 - 53 (32 bit)
access : read-write


I2C_SR

I2C_SR
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C_SR I2C_SR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STA STO ADRS GCS ARBLOS RXNACK BUSERR TOUTF RXDNE TXDE RXBF BUSBUSY MASTER TXNRX

STA : STA
bits : 0 - 0 (1 bit)
access : read-write

STO : STO
bits : 1 - 2 (2 bit)
access : read-write

ADRS : ADRS
bits : 2 - 4 (3 bit)
access : read-write

GCS : GCS
bits : 3 - 6 (4 bit)
access : read-write

ARBLOS : ARBLOS
bits : 8 - 16 (9 bit)
access : read-write

RXNACK : RXNACK
bits : 9 - 18 (10 bit)
access : read-write

BUSERR : BUSERR
bits : 10 - 20 (11 bit)
access : read-write

TOUTF : TOUTF
bits : 11 - 22 (12 bit)
access : read-write

RXDNE : RXDNE
bits : 16 - 32 (17 bit)
access : read-write

TXDE : TXDE
bits : 17 - 34 (18 bit)
access : read-write

RXBF : RXBF
bits : 18 - 36 (19 bit)
access : read-write

BUSBUSY : BUSBUSY
bits : 19 - 38 (20 bit)
access : read-write

MASTER : MASTER
bits : 20 - 40 (21 bit)
access : read-write

TXNRX : TXNRX
bits : 21 - 42 (22 bit)
access : read-write



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