WTCR

WTR : Clear Watchdog Timer Set this bit will clear the Watchdog timer. 0= Writing 0 to this bit has no effect 1= Reset the contents of the Watchdog timer NOTE: This bit will auto clear after few clock cycle
bits : 0 - 0 (1 bit)
access : read-write

WTRE : Watchdog Timer Reset Enable Setting this bit will enable the Watchdog timer reset function. 0= Disable Watchdog timer reset function 1= Enable Watchdog timer reset function
bits : 1 - 1 (1 bit)
access : read-write

WTRF : Watchdog Timer Reset Flag When the Watchdog timer initiates a reset, the hardware will set this bit. This flag can be read by software to determine the source of reset. Software is responsible to clear it manually by writing 1 to it. If WTRE is disabled, then the Watchdog timer has no effect on this bit. 0= Watchdog timer reset does not occur 1= Watchdog timer reset occurs NOTE: This bit is cleared by writing 1 to this bit.
bits : 2 - 2 (1 bit)
access : read-write

WTIF : Watchdog Timer Interrupt Flag If the Watchdog timer interrupt is enabled, then the hardware will set this bit to indicate that the Watchdog timer interrupt has occurred. If the Watchdog timer interrupt is not enabled, then this bit indicates that a timeout period has elapsed. 0= Watchdog timer interrupt does not occur 1= Watchdog timer interrupt occurs NOTE: Write 1 to clear this bit to zero.
bits : 3 - 3 (1 bit)
access : read-write

WTWKE : Watchdog Timer Wakeup Function Enable bit 0 = Disable Watchdog timer Wakeup CPU function. 1 = Enable the Wakeup function that Watchdog timer timeout can wake up CPU from power-down mode.
bits : 4 - 4 (1 bit)
access : read-write

WTWKF : Watchdog Timer Wakeup Flag If Watchdog timer causes CPU wakes up from power-down mode, this bit will be set to high. It must be cleared by software with a write 1 to this bit. 1 = CPU wake up from sleep or power-down mode by Watchdog timeout. 0 = Watchdog timer does not cause CPU wakeup. NOTE: Write 1 to clear this bit to zero.
bits : 5 - 5 (1 bit)
access : read-write

WTIE : Watchdog Timer Interrupt Enable 0= Disable the Watchdog timer interrupt 1= Enable the Watchdog timer interrupt
bits : 6 - 6 (1 bit)
access : read-write

WTE : Watchdog Timer Enable 0= Disable the Watchdog timer (This action will reset the internal counter) 1= Enable the Watchdog timer
bits : 7 - 7 (1 bit)
access : read-write

WTIS : Watchdog Timer Interval Select (write protection bit) These three bits select the timeout interval for the Watchdog timer. WTIS Timeout Interval Selection Interrupt Period WTR Timeout Interval (WDT_CLK=12MHz) 000 2^4 * WDT_CLK (2^4 + 1024) * WDT_CLK 1.33 us ~ 86.67 us 001 2^6 * WDT_CLK (2^6 + 1024) * WDT_CLK 5.33 us ~ 90.67 us 010 2^8 * WDT_CLK (2^8 + 1024) * WDT_CLK 21.33 us ~ 106.67 us 011 2^10 * WDT_CLK (2^10 + 1024) * WDT_CLK 85.33 us ~ 170.67 us 100 2^12 * WDT_CLK (2^12 + 1024) * WDT_CLK 341.33 us ~ 426.67 us 101 2^14 * WDT_CLK (2^14 + 1024) * WDT_CLK 1.36 ms ~ 1.45 ms 110 2^16 * WDT_CLK (2^16 + 1024) * WDT_CLK 5.46 ms ~ 5.55 ms 111 2^18 * WDT_CLK (2^18 + 1024) * WDT_CLK 21.84 ms ~ 21.93 ms
bits : 8 - 10 (3 bit)
access : read-write