\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
Reset control. If a bit is set it means the peripheral is in reset. 0 means the peripheral's reset is deasserted.
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
adc :
bits : 0 - 0 (1 bit)
access : read-write
busctrl :
bits : 1 - 1 (1 bit)
access : read-write
dma :
bits : 2 - 2 (1 bit)
access : read-write
i2c0 :
bits : 3 - 3 (1 bit)
access : read-write
i2c1 :
bits : 4 - 4 (1 bit)
access : read-write
io_bank0 :
bits : 5 - 5 (1 bit)
access : read-write
io_qspi :
bits : 6 - 6 (1 bit)
access : read-write
jtag :
bits : 7 - 7 (1 bit)
access : read-write
pads_bank0 :
bits : 8 - 8 (1 bit)
access : read-write
pads_qspi :
bits : 9 - 9 (1 bit)
access : read-write
pio0 :
bits : 10 - 10 (1 bit)
access : read-write
pio1 :
bits : 11 - 11 (1 bit)
access : read-write
pll_sys :
bits : 12 - 12 (1 bit)
access : read-write
pll_usb :
bits : 13 - 13 (1 bit)
access : read-write
pwm :
bits : 14 - 14 (1 bit)
access : read-write
rtc :
bits : 15 - 15 (1 bit)
access : read-write
spi0 :
bits : 16 - 16 (1 bit)
access : read-write
spi1 :
bits : 17 - 17 (1 bit)
access : read-write
syscfg :
bits : 18 - 18 (1 bit)
access : read-write
sysinfo :
bits : 19 - 19 (1 bit)
access : read-write
tbman :
bits : 20 - 20 (1 bit)
access : read-write
timer :
bits : 21 - 21 (1 bit)
access : read-write
uart0 :
bits : 22 - 22 (1 bit)
access : read-write
uart1 :
bits : 23 - 23 (1 bit)
access : read-write
usbctrl :
bits : 24 - 24 (1 bit)
access : read-write
Watchdog select. If a bit is set then the watchdog will reset this peripheral when the watchdog fires.
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
adc :
bits : 0 - 0 (1 bit)
access : read-write
busctrl :
bits : 1 - 1 (1 bit)
access : read-write
dma :
bits : 2 - 2 (1 bit)
access : read-write
i2c0 :
bits : 3 - 3 (1 bit)
access : read-write
i2c1 :
bits : 4 - 4 (1 bit)
access : read-write
io_bank0 :
bits : 5 - 5 (1 bit)
access : read-write
io_qspi :
bits : 6 - 6 (1 bit)
access : read-write
jtag :
bits : 7 - 7 (1 bit)
access : read-write
pads_bank0 :
bits : 8 - 8 (1 bit)
access : read-write
pads_qspi :
bits : 9 - 9 (1 bit)
access : read-write
pio0 :
bits : 10 - 10 (1 bit)
access : read-write
pio1 :
bits : 11 - 11 (1 bit)
access : read-write
pll_sys :
bits : 12 - 12 (1 bit)
access : read-write
pll_usb :
bits : 13 - 13 (1 bit)
access : read-write
pwm :
bits : 14 - 14 (1 bit)
access : read-write
rtc :
bits : 15 - 15 (1 bit)
access : read-write
spi0 :
bits : 16 - 16 (1 bit)
access : read-write
spi1 :
bits : 17 - 17 (1 bit)
access : read-write
syscfg :
bits : 18 - 18 (1 bit)
access : read-write
sysinfo :
bits : 19 - 19 (1 bit)
access : read-write
tbman :
bits : 20 - 20 (1 bit)
access : read-write
timer :
bits : 21 - 21 (1 bit)
access : read-write
uart0 :
bits : 22 - 22 (1 bit)
access : read-write
uart1 :
bits : 23 - 23 (1 bit)
access : read-write
usbctrl :
bits : 24 - 24 (1 bit)
access : read-write
Reset done. If a bit is set then a reset done signal has been returned by the peripheral. This indicates that the peripheral's registers are ready to be accessed.
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
adc :
bits : 0 - 0 (1 bit)
access : read-only
busctrl :
bits : 1 - 1 (1 bit)
access : read-only
dma :
bits : 2 - 2 (1 bit)
access : read-only
i2c0 :
bits : 3 - 3 (1 bit)
access : read-only
i2c1 :
bits : 4 - 4 (1 bit)
access : read-only
io_bank0 :
bits : 5 - 5 (1 bit)
access : read-only
io_qspi :
bits : 6 - 6 (1 bit)
access : read-only
jtag :
bits : 7 - 7 (1 bit)
access : read-only
pads_bank0 :
bits : 8 - 8 (1 bit)
access : read-only
pads_qspi :
bits : 9 - 9 (1 bit)
access : read-only
pio0 :
bits : 10 - 10 (1 bit)
access : read-only
pio1 :
bits : 11 - 11 (1 bit)
access : read-only
pll_sys :
bits : 12 - 12 (1 bit)
access : read-only
pll_usb :
bits : 13 - 13 (1 bit)
access : read-only
pwm :
bits : 14 - 14 (1 bit)
access : read-only
rtc :
bits : 15 - 15 (1 bit)
access : read-only
spi0 :
bits : 16 - 16 (1 bit)
access : read-only
spi1 :
bits : 17 - 17 (1 bit)
access : read-only
syscfg :
bits : 18 - 18 (1 bit)
access : read-only
sysinfo :
bits : 19 - 19 (1 bit)
access : read-only
tbman :
bits : 20 - 20 (1 bit)
access : read-only
timer :
bits : 21 - 21 (1 bit)
access : read-only
uart0 :
bits : 22 - 22 (1 bit)
access : read-only
uart1 :
bits : 23 - 23 (1 bit)
access : read-only
usbctrl :
bits : 24 - 24 (1 bit)
access : read-only
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