\n

IO_BANK0

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

GPIO0_STATUS

GPIO2_STATUS

PROC0_INTE0

PROC0_INTE1

PROC0_INTE2

PROC0_INTE3

PROC0_INTF0

PROC0_INTF1

PROC0_INTF2

PROC0_INTF3

PROC0_INTS0

PROC0_INTS1

PROC0_INTS2

PROC0_INTS3

PROC1_INTE0

PROC1_INTE1

PROC1_INTE2

PROC1_INTE3

GPIO2_CTRL

PROC1_INTF0

PROC1_INTF1

PROC1_INTF2

PROC1_INTF3

PROC1_INTS0

PROC1_INTS1

PROC1_INTS2

PROC1_INTS3

DORMANT_WAKE_INTE0

DORMANT_WAKE_INTE1

DORMANT_WAKE_INTE2

DORMANT_WAKE_INTE3

DORMANT_WAKE_INTF0

DORMANT_WAKE_INTF1

DORMANT_WAKE_INTF2

DORMANT_WAKE_INTF3

GPIO3_STATUS

DORMANT_WAKE_INTS0

DORMANT_WAKE_INTS1

DORMANT_WAKE_INTS2

DORMANT_WAKE_INTS3

GPIO3_CTRL

GPIO4_STATUS

GPIO4_CTRL

GPIO5_STATUS

GPIO5_CTRL

GPIO6_STATUS

GPIO6_CTRL

GPIO7_STATUS

GPIO7_CTRL

GPIO0_CTRL

GPIO8_STATUS

GPIO8_CTRL

GPIO9_STATUS

GPIO9_CTRL

GPIO10_STATUS

GPIO10_CTRL

GPIO11_STATUS

GPIO11_CTRL

GPIO12_STATUS

GPIO12_CTRL

GPIO13_STATUS

GPIO13_CTRL

GPIO14_STATUS

GPIO14_CTRL

GPIO15_STATUS

GPIO15_CTRL

GPIO1_STATUS

GPIO16_STATUS

GPIO16_CTRL

GPIO17_STATUS

GPIO17_CTRL

GPIO18_STATUS

GPIO18_CTRL

GPIO19_STATUS

GPIO19_CTRL

GPIO20_STATUS

GPIO20_CTRL

GPIO21_STATUS

GPIO21_CTRL

GPIO22_STATUS

GPIO22_CTRL

GPIO23_STATUS

GPIO23_CTRL

GPIO1_CTRL

GPIO24_STATUS

GPIO24_CTRL

GPIO25_STATUS

GPIO25_CTRL

GPIO26_STATUS

GPIO26_CTRL

GPIO27_STATUS

GPIO27_CTRL

GPIO28_STATUS

GPIO28_CTRL

GPIO29_STATUS

GPIO29_CTRL

INTR0

INTR1

INTR2

INTR3


GPIO0_STATUS

GPIO status
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO0_STATUS GPIO0_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO2_STATUS

GPIO status
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO2_STATUS GPIO2_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


PROC0_INTE0

Interrupt Enable for proc0
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC0_INTE0 PROC0_INTE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO0_LEVEL_LOW GPIO0_LEVEL_HIGH GPIO0_EDGE_LOW GPIO0_EDGE_HIGH GPIO1_LEVEL_LOW GPIO1_LEVEL_HIGH GPIO1_EDGE_LOW GPIO1_EDGE_HIGH GPIO2_LEVEL_LOW GPIO2_LEVEL_HIGH GPIO2_EDGE_LOW GPIO2_EDGE_HIGH GPIO3_LEVEL_LOW GPIO3_LEVEL_HIGH GPIO3_EDGE_LOW GPIO3_EDGE_HIGH GPIO4_LEVEL_LOW GPIO4_LEVEL_HIGH GPIO4_EDGE_LOW GPIO4_EDGE_HIGH GPIO5_LEVEL_LOW GPIO5_LEVEL_HIGH GPIO5_EDGE_LOW GPIO5_EDGE_HIGH GPIO6_LEVEL_LOW GPIO6_LEVEL_HIGH GPIO6_EDGE_LOW GPIO6_EDGE_HIGH GPIO7_LEVEL_LOW GPIO7_LEVEL_HIGH GPIO7_EDGE_LOW GPIO7_EDGE_HIGH

GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write

GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write

GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write

GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write

GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


PROC0_INTE1

Interrupt Enable for proc0
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC0_INTE1 PROC0_INTE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO8_LEVEL_LOW GPIO8_LEVEL_HIGH GPIO8_EDGE_LOW GPIO8_EDGE_HIGH GPIO9_LEVEL_LOW GPIO9_LEVEL_HIGH GPIO9_EDGE_LOW GPIO9_EDGE_HIGH GPIO10_LEVEL_LOW GPIO10_LEVEL_HIGH GPIO10_EDGE_LOW GPIO10_EDGE_HIGH GPIO11_LEVEL_LOW GPIO11_LEVEL_HIGH GPIO11_EDGE_LOW GPIO11_EDGE_HIGH GPIO12_LEVEL_LOW GPIO12_LEVEL_HIGH GPIO12_EDGE_LOW GPIO12_EDGE_HIGH GPIO13_LEVEL_LOW GPIO13_LEVEL_HIGH GPIO13_EDGE_LOW GPIO13_EDGE_HIGH GPIO14_LEVEL_LOW GPIO14_LEVEL_HIGH GPIO14_EDGE_LOW GPIO14_EDGE_HIGH GPIO15_LEVEL_LOW GPIO15_LEVEL_HIGH GPIO15_EDGE_LOW GPIO15_EDGE_HIGH

GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write

GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write

GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write

GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write

GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


PROC0_INTE2

Interrupt Enable for proc0
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC0_INTE2 PROC0_INTE2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO16_LEVEL_LOW GPIO16_LEVEL_HIGH GPIO16_EDGE_LOW GPIO16_EDGE_HIGH GPIO17_LEVEL_LOW GPIO17_LEVEL_HIGH GPIO17_EDGE_LOW GPIO17_EDGE_HIGH GPIO18_LEVEL_LOW GPIO18_LEVEL_HIGH GPIO18_EDGE_LOW GPIO18_EDGE_HIGH GPIO19_LEVEL_LOW GPIO19_LEVEL_HIGH GPIO19_EDGE_LOW GPIO19_EDGE_HIGH GPIO20_LEVEL_LOW GPIO20_LEVEL_HIGH GPIO20_EDGE_LOW GPIO20_EDGE_HIGH GPIO21_LEVEL_LOW GPIO21_LEVEL_HIGH GPIO21_EDGE_LOW GPIO21_EDGE_HIGH GPIO22_LEVEL_LOW GPIO22_LEVEL_HIGH GPIO22_EDGE_LOW GPIO22_EDGE_HIGH GPIO23_LEVEL_LOW GPIO23_LEVEL_HIGH GPIO23_EDGE_LOW GPIO23_EDGE_HIGH

GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write

GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write

GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write

GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write

GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


PROC0_INTE3

Interrupt Enable for proc0
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC0_INTE3 PROC0_INTE3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO24_LEVEL_LOW GPIO24_LEVEL_HIGH GPIO24_EDGE_LOW GPIO24_EDGE_HIGH GPIO25_LEVEL_LOW GPIO25_LEVEL_HIGH GPIO25_EDGE_LOW GPIO25_EDGE_HIGH GPIO26_LEVEL_LOW GPIO26_LEVEL_HIGH GPIO26_EDGE_LOW GPIO26_EDGE_HIGH GPIO27_LEVEL_LOW GPIO27_LEVEL_HIGH GPIO27_EDGE_LOW GPIO27_EDGE_HIGH GPIO28_LEVEL_LOW GPIO28_LEVEL_HIGH GPIO28_EDGE_LOW GPIO28_EDGE_HIGH GPIO29_LEVEL_LOW GPIO29_LEVEL_HIGH GPIO29_EDGE_LOW GPIO29_EDGE_HIGH

GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write


PROC0_INTF0

Interrupt Force for proc0
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC0_INTF0 PROC0_INTF0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO0_LEVEL_LOW GPIO0_LEVEL_HIGH GPIO0_EDGE_LOW GPIO0_EDGE_HIGH GPIO1_LEVEL_LOW GPIO1_LEVEL_HIGH GPIO1_EDGE_LOW GPIO1_EDGE_HIGH GPIO2_LEVEL_LOW GPIO2_LEVEL_HIGH GPIO2_EDGE_LOW GPIO2_EDGE_HIGH GPIO3_LEVEL_LOW GPIO3_LEVEL_HIGH GPIO3_EDGE_LOW GPIO3_EDGE_HIGH GPIO4_LEVEL_LOW GPIO4_LEVEL_HIGH GPIO4_EDGE_LOW GPIO4_EDGE_HIGH GPIO5_LEVEL_LOW GPIO5_LEVEL_HIGH GPIO5_EDGE_LOW GPIO5_EDGE_HIGH GPIO6_LEVEL_LOW GPIO6_LEVEL_HIGH GPIO6_EDGE_LOW GPIO6_EDGE_HIGH GPIO7_LEVEL_LOW GPIO7_LEVEL_HIGH GPIO7_EDGE_LOW GPIO7_EDGE_HIGH

GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write

GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write

GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write

GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write

GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


PROC0_INTF1

Interrupt Force for proc0
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC0_INTF1 PROC0_INTF1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO8_LEVEL_LOW GPIO8_LEVEL_HIGH GPIO8_EDGE_LOW GPIO8_EDGE_HIGH GPIO9_LEVEL_LOW GPIO9_LEVEL_HIGH GPIO9_EDGE_LOW GPIO9_EDGE_HIGH GPIO10_LEVEL_LOW GPIO10_LEVEL_HIGH GPIO10_EDGE_LOW GPIO10_EDGE_HIGH GPIO11_LEVEL_LOW GPIO11_LEVEL_HIGH GPIO11_EDGE_LOW GPIO11_EDGE_HIGH GPIO12_LEVEL_LOW GPIO12_LEVEL_HIGH GPIO12_EDGE_LOW GPIO12_EDGE_HIGH GPIO13_LEVEL_LOW GPIO13_LEVEL_HIGH GPIO13_EDGE_LOW GPIO13_EDGE_HIGH GPIO14_LEVEL_LOW GPIO14_LEVEL_HIGH GPIO14_EDGE_LOW GPIO14_EDGE_HIGH GPIO15_LEVEL_LOW GPIO15_LEVEL_HIGH GPIO15_EDGE_LOW GPIO15_EDGE_HIGH

GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write

GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write

GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write

GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write

GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


PROC0_INTF2

Interrupt Force for proc0
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC0_INTF2 PROC0_INTF2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO16_LEVEL_LOW GPIO16_LEVEL_HIGH GPIO16_EDGE_LOW GPIO16_EDGE_HIGH GPIO17_LEVEL_LOW GPIO17_LEVEL_HIGH GPIO17_EDGE_LOW GPIO17_EDGE_HIGH GPIO18_LEVEL_LOW GPIO18_LEVEL_HIGH GPIO18_EDGE_LOW GPIO18_EDGE_HIGH GPIO19_LEVEL_LOW GPIO19_LEVEL_HIGH GPIO19_EDGE_LOW GPIO19_EDGE_HIGH GPIO20_LEVEL_LOW GPIO20_LEVEL_HIGH GPIO20_EDGE_LOW GPIO20_EDGE_HIGH GPIO21_LEVEL_LOW GPIO21_LEVEL_HIGH GPIO21_EDGE_LOW GPIO21_EDGE_HIGH GPIO22_LEVEL_LOW GPIO22_LEVEL_HIGH GPIO22_EDGE_LOW GPIO22_EDGE_HIGH GPIO23_LEVEL_LOW GPIO23_LEVEL_HIGH GPIO23_EDGE_LOW GPIO23_EDGE_HIGH

GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write

GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write

GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write

GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write

GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


PROC0_INTF3

Interrupt Force for proc0
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC0_INTF3 PROC0_INTF3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO24_LEVEL_LOW GPIO24_LEVEL_HIGH GPIO24_EDGE_LOW GPIO24_EDGE_HIGH GPIO25_LEVEL_LOW GPIO25_LEVEL_HIGH GPIO25_EDGE_LOW GPIO25_EDGE_HIGH GPIO26_LEVEL_LOW GPIO26_LEVEL_HIGH GPIO26_EDGE_LOW GPIO26_EDGE_HIGH GPIO27_LEVEL_LOW GPIO27_LEVEL_HIGH GPIO27_EDGE_LOW GPIO27_EDGE_HIGH GPIO28_LEVEL_LOW GPIO28_LEVEL_HIGH GPIO28_EDGE_LOW GPIO28_EDGE_HIGH GPIO29_LEVEL_LOW GPIO29_LEVEL_HIGH GPIO29_EDGE_LOW GPIO29_EDGE_HIGH

GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write


PROC0_INTS0

Interrupt status after masking & forcing for proc0
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC0_INTS0 PROC0_INTS0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO0_LEVEL_LOW GPIO0_LEVEL_HIGH GPIO0_EDGE_LOW GPIO0_EDGE_HIGH GPIO1_LEVEL_LOW GPIO1_LEVEL_HIGH GPIO1_EDGE_LOW GPIO1_EDGE_HIGH GPIO2_LEVEL_LOW GPIO2_LEVEL_HIGH GPIO2_EDGE_LOW GPIO2_EDGE_HIGH GPIO3_LEVEL_LOW GPIO3_LEVEL_HIGH GPIO3_EDGE_LOW GPIO3_EDGE_HIGH GPIO4_LEVEL_LOW GPIO4_LEVEL_HIGH GPIO4_EDGE_LOW GPIO4_EDGE_HIGH GPIO5_LEVEL_LOW GPIO5_LEVEL_HIGH GPIO5_EDGE_LOW GPIO5_EDGE_HIGH GPIO6_LEVEL_LOW GPIO6_LEVEL_HIGH GPIO6_EDGE_LOW GPIO6_EDGE_HIGH GPIO7_LEVEL_LOW GPIO7_LEVEL_HIGH GPIO7_EDGE_LOW GPIO7_EDGE_HIGH

GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only

GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only

GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only

GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only

GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only

GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only

GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only

GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only

GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only

GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only

GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only

GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only

GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only

GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only

GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only

GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only

GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only

GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only

GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only

GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only

GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only

GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only

GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only

GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only

GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only

GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only

GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only

GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only

GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only

GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only

GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only

GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only


PROC0_INTS1

Interrupt status after masking & forcing for proc0
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC0_INTS1 PROC0_INTS1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO8_LEVEL_LOW GPIO8_LEVEL_HIGH GPIO8_EDGE_LOW GPIO8_EDGE_HIGH GPIO9_LEVEL_LOW GPIO9_LEVEL_HIGH GPIO9_EDGE_LOW GPIO9_EDGE_HIGH GPIO10_LEVEL_LOW GPIO10_LEVEL_HIGH GPIO10_EDGE_LOW GPIO10_EDGE_HIGH GPIO11_LEVEL_LOW GPIO11_LEVEL_HIGH GPIO11_EDGE_LOW GPIO11_EDGE_HIGH GPIO12_LEVEL_LOW GPIO12_LEVEL_HIGH GPIO12_EDGE_LOW GPIO12_EDGE_HIGH GPIO13_LEVEL_LOW GPIO13_LEVEL_HIGH GPIO13_EDGE_LOW GPIO13_EDGE_HIGH GPIO14_LEVEL_LOW GPIO14_LEVEL_HIGH GPIO14_EDGE_LOW GPIO14_EDGE_HIGH GPIO15_LEVEL_LOW GPIO15_LEVEL_HIGH GPIO15_EDGE_LOW GPIO15_EDGE_HIGH

GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only

GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only

GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only

GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only

GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only

GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only

GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only

GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only

GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only

GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only

GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only

GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only

GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only

GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only

GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only

GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only

GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only

GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only

GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only

GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only

GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only

GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only

GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only

GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only

GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only

GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only

GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only

GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only

GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only

GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only

GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only

GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only


PROC0_INTS2

Interrupt status after masking & forcing for proc0
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC0_INTS2 PROC0_INTS2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO16_LEVEL_LOW GPIO16_LEVEL_HIGH GPIO16_EDGE_LOW GPIO16_EDGE_HIGH GPIO17_LEVEL_LOW GPIO17_LEVEL_HIGH GPIO17_EDGE_LOW GPIO17_EDGE_HIGH GPIO18_LEVEL_LOW GPIO18_LEVEL_HIGH GPIO18_EDGE_LOW GPIO18_EDGE_HIGH GPIO19_LEVEL_LOW GPIO19_LEVEL_HIGH GPIO19_EDGE_LOW GPIO19_EDGE_HIGH GPIO20_LEVEL_LOW GPIO20_LEVEL_HIGH GPIO20_EDGE_LOW GPIO20_EDGE_HIGH GPIO21_LEVEL_LOW GPIO21_LEVEL_HIGH GPIO21_EDGE_LOW GPIO21_EDGE_HIGH GPIO22_LEVEL_LOW GPIO22_LEVEL_HIGH GPIO22_EDGE_LOW GPIO22_EDGE_HIGH GPIO23_LEVEL_LOW GPIO23_LEVEL_HIGH GPIO23_EDGE_LOW GPIO23_EDGE_HIGH

GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only

GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only

GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only

GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only

GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only

GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only

GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only

GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only

GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only

GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only

GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only

GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only

GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only

GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only

GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only

GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only

GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only

GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only

GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only

GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only

GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only

GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only

GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only

GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only

GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only

GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only

GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only

GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only

GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only

GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only

GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only

GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only


PROC0_INTS3

Interrupt status after masking & forcing for proc0
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC0_INTS3 PROC0_INTS3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO24_LEVEL_LOW GPIO24_LEVEL_HIGH GPIO24_EDGE_LOW GPIO24_EDGE_HIGH GPIO25_LEVEL_LOW GPIO25_LEVEL_HIGH GPIO25_EDGE_LOW GPIO25_EDGE_HIGH GPIO26_LEVEL_LOW GPIO26_LEVEL_HIGH GPIO26_EDGE_LOW GPIO26_EDGE_HIGH GPIO27_LEVEL_LOW GPIO27_LEVEL_HIGH GPIO27_EDGE_LOW GPIO27_EDGE_HIGH GPIO28_LEVEL_LOW GPIO28_LEVEL_HIGH GPIO28_EDGE_LOW GPIO28_EDGE_HIGH GPIO29_LEVEL_LOW GPIO29_LEVEL_HIGH GPIO29_EDGE_LOW GPIO29_EDGE_HIGH

GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only

GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only

GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only

GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only

GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only

GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only

GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only

GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only

GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only

GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only

GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only

GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only

GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only

GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only

GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only

GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only

GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only

GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only

GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only

GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only

GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only

GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only

GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only

GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only


PROC1_INTE0

Interrupt Enable for proc1
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC1_INTE0 PROC1_INTE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO0_LEVEL_LOW GPIO0_LEVEL_HIGH GPIO0_EDGE_LOW GPIO0_EDGE_HIGH GPIO1_LEVEL_LOW GPIO1_LEVEL_HIGH GPIO1_EDGE_LOW GPIO1_EDGE_HIGH GPIO2_LEVEL_LOW GPIO2_LEVEL_HIGH GPIO2_EDGE_LOW GPIO2_EDGE_HIGH GPIO3_LEVEL_LOW GPIO3_LEVEL_HIGH GPIO3_EDGE_LOW GPIO3_EDGE_HIGH GPIO4_LEVEL_LOW GPIO4_LEVEL_HIGH GPIO4_EDGE_LOW GPIO4_EDGE_HIGH GPIO5_LEVEL_LOW GPIO5_LEVEL_HIGH GPIO5_EDGE_LOW GPIO5_EDGE_HIGH GPIO6_LEVEL_LOW GPIO6_LEVEL_HIGH GPIO6_EDGE_LOW GPIO6_EDGE_HIGH GPIO7_LEVEL_LOW GPIO7_LEVEL_HIGH GPIO7_EDGE_LOW GPIO7_EDGE_HIGH

GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write

GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write

GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write

GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write

GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


PROC1_INTE1

Interrupt Enable for proc1
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC1_INTE1 PROC1_INTE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO8_LEVEL_LOW GPIO8_LEVEL_HIGH GPIO8_EDGE_LOW GPIO8_EDGE_HIGH GPIO9_LEVEL_LOW GPIO9_LEVEL_HIGH GPIO9_EDGE_LOW GPIO9_EDGE_HIGH GPIO10_LEVEL_LOW GPIO10_LEVEL_HIGH GPIO10_EDGE_LOW GPIO10_EDGE_HIGH GPIO11_LEVEL_LOW GPIO11_LEVEL_HIGH GPIO11_EDGE_LOW GPIO11_EDGE_HIGH GPIO12_LEVEL_LOW GPIO12_LEVEL_HIGH GPIO12_EDGE_LOW GPIO12_EDGE_HIGH GPIO13_LEVEL_LOW GPIO13_LEVEL_HIGH GPIO13_EDGE_LOW GPIO13_EDGE_HIGH GPIO14_LEVEL_LOW GPIO14_LEVEL_HIGH GPIO14_EDGE_LOW GPIO14_EDGE_HIGH GPIO15_LEVEL_LOW GPIO15_LEVEL_HIGH GPIO15_EDGE_LOW GPIO15_EDGE_HIGH

GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write

GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write

GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write

GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write

GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


PROC1_INTE2

Interrupt Enable for proc1
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC1_INTE2 PROC1_INTE2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO16_LEVEL_LOW GPIO16_LEVEL_HIGH GPIO16_EDGE_LOW GPIO16_EDGE_HIGH GPIO17_LEVEL_LOW GPIO17_LEVEL_HIGH GPIO17_EDGE_LOW GPIO17_EDGE_HIGH GPIO18_LEVEL_LOW GPIO18_LEVEL_HIGH GPIO18_EDGE_LOW GPIO18_EDGE_HIGH GPIO19_LEVEL_LOW GPIO19_LEVEL_HIGH GPIO19_EDGE_LOW GPIO19_EDGE_HIGH GPIO20_LEVEL_LOW GPIO20_LEVEL_HIGH GPIO20_EDGE_LOW GPIO20_EDGE_HIGH GPIO21_LEVEL_LOW GPIO21_LEVEL_HIGH GPIO21_EDGE_LOW GPIO21_EDGE_HIGH GPIO22_LEVEL_LOW GPIO22_LEVEL_HIGH GPIO22_EDGE_LOW GPIO22_EDGE_HIGH GPIO23_LEVEL_LOW GPIO23_LEVEL_HIGH GPIO23_EDGE_LOW GPIO23_EDGE_HIGH

GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write

GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write

GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write

GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write

GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


PROC1_INTE3

Interrupt Enable for proc1
address_offset : 0x13C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC1_INTE3 PROC1_INTE3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO24_LEVEL_LOW GPIO24_LEVEL_HIGH GPIO24_EDGE_LOW GPIO24_EDGE_HIGH GPIO25_LEVEL_LOW GPIO25_LEVEL_HIGH GPIO25_EDGE_LOW GPIO25_EDGE_HIGH GPIO26_LEVEL_LOW GPIO26_LEVEL_HIGH GPIO26_EDGE_LOW GPIO26_EDGE_HIGH GPIO27_LEVEL_LOW GPIO27_LEVEL_HIGH GPIO27_EDGE_LOW GPIO27_EDGE_HIGH GPIO28_LEVEL_LOW GPIO28_LEVEL_HIGH GPIO28_EDGE_LOW GPIO28_EDGE_HIGH GPIO29_LEVEL_LOW GPIO29_LEVEL_HIGH GPIO29_EDGE_LOW GPIO29_EDGE_HIGH

GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write


GPIO2_CTRL

GPIO control including function select and overrides.
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO2_CTRL GPIO2_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : jtag_tdi

None

1 : spi0_sclk

None

2 : uart0_cts

None

3 : i2c1_sda

None

4 : pwm_a_1

None

5 : sio_2

None

6 : pio0_2

None

7 : pio1_2

None

9 : usb_muxing_vbus_en

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


PROC1_INTF0

Interrupt Force for proc1
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC1_INTF0 PROC1_INTF0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO0_LEVEL_LOW GPIO0_LEVEL_HIGH GPIO0_EDGE_LOW GPIO0_EDGE_HIGH GPIO1_LEVEL_LOW GPIO1_LEVEL_HIGH GPIO1_EDGE_LOW GPIO1_EDGE_HIGH GPIO2_LEVEL_LOW GPIO2_LEVEL_HIGH GPIO2_EDGE_LOW GPIO2_EDGE_HIGH GPIO3_LEVEL_LOW GPIO3_LEVEL_HIGH GPIO3_EDGE_LOW GPIO3_EDGE_HIGH GPIO4_LEVEL_LOW GPIO4_LEVEL_HIGH GPIO4_EDGE_LOW GPIO4_EDGE_HIGH GPIO5_LEVEL_LOW GPIO5_LEVEL_HIGH GPIO5_EDGE_LOW GPIO5_EDGE_HIGH GPIO6_LEVEL_LOW GPIO6_LEVEL_HIGH GPIO6_EDGE_LOW GPIO6_EDGE_HIGH GPIO7_LEVEL_LOW GPIO7_LEVEL_HIGH GPIO7_EDGE_LOW GPIO7_EDGE_HIGH

GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write

GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write

GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write

GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write

GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


PROC1_INTF1

Interrupt Force for proc1
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC1_INTF1 PROC1_INTF1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO8_LEVEL_LOW GPIO8_LEVEL_HIGH GPIO8_EDGE_LOW GPIO8_EDGE_HIGH GPIO9_LEVEL_LOW GPIO9_LEVEL_HIGH GPIO9_EDGE_LOW GPIO9_EDGE_HIGH GPIO10_LEVEL_LOW GPIO10_LEVEL_HIGH GPIO10_EDGE_LOW GPIO10_EDGE_HIGH GPIO11_LEVEL_LOW GPIO11_LEVEL_HIGH GPIO11_EDGE_LOW GPIO11_EDGE_HIGH GPIO12_LEVEL_LOW GPIO12_LEVEL_HIGH GPIO12_EDGE_LOW GPIO12_EDGE_HIGH GPIO13_LEVEL_LOW GPIO13_LEVEL_HIGH GPIO13_EDGE_LOW GPIO13_EDGE_HIGH GPIO14_LEVEL_LOW GPIO14_LEVEL_HIGH GPIO14_EDGE_LOW GPIO14_EDGE_HIGH GPIO15_LEVEL_LOW GPIO15_LEVEL_HIGH GPIO15_EDGE_LOW GPIO15_EDGE_HIGH

GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write

GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write

GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write

GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write

GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


PROC1_INTF2

Interrupt Force for proc1
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC1_INTF2 PROC1_INTF2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO16_LEVEL_LOW GPIO16_LEVEL_HIGH GPIO16_EDGE_LOW GPIO16_EDGE_HIGH GPIO17_LEVEL_LOW GPIO17_LEVEL_HIGH GPIO17_EDGE_LOW GPIO17_EDGE_HIGH GPIO18_LEVEL_LOW GPIO18_LEVEL_HIGH GPIO18_EDGE_LOW GPIO18_EDGE_HIGH GPIO19_LEVEL_LOW GPIO19_LEVEL_HIGH GPIO19_EDGE_LOW GPIO19_EDGE_HIGH GPIO20_LEVEL_LOW GPIO20_LEVEL_HIGH GPIO20_EDGE_LOW GPIO20_EDGE_HIGH GPIO21_LEVEL_LOW GPIO21_LEVEL_HIGH GPIO21_EDGE_LOW GPIO21_EDGE_HIGH GPIO22_LEVEL_LOW GPIO22_LEVEL_HIGH GPIO22_EDGE_LOW GPIO22_EDGE_HIGH GPIO23_LEVEL_LOW GPIO23_LEVEL_HIGH GPIO23_EDGE_LOW GPIO23_EDGE_HIGH

GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write

GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write

GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write

GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write

GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


PROC1_INTF3

Interrupt Force for proc1
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC1_INTF3 PROC1_INTF3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO24_LEVEL_LOW GPIO24_LEVEL_HIGH GPIO24_EDGE_LOW GPIO24_EDGE_HIGH GPIO25_LEVEL_LOW GPIO25_LEVEL_HIGH GPIO25_EDGE_LOW GPIO25_EDGE_HIGH GPIO26_LEVEL_LOW GPIO26_LEVEL_HIGH GPIO26_EDGE_LOW GPIO26_EDGE_HIGH GPIO27_LEVEL_LOW GPIO27_LEVEL_HIGH GPIO27_EDGE_LOW GPIO27_EDGE_HIGH GPIO28_LEVEL_LOW GPIO28_LEVEL_HIGH GPIO28_EDGE_LOW GPIO28_EDGE_HIGH GPIO29_LEVEL_LOW GPIO29_LEVEL_HIGH GPIO29_EDGE_LOW GPIO29_EDGE_HIGH

GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write


PROC1_INTS0

Interrupt status after masking & forcing for proc1
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC1_INTS0 PROC1_INTS0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO0_LEVEL_LOW GPIO0_LEVEL_HIGH GPIO0_EDGE_LOW GPIO0_EDGE_HIGH GPIO1_LEVEL_LOW GPIO1_LEVEL_HIGH GPIO1_EDGE_LOW GPIO1_EDGE_HIGH GPIO2_LEVEL_LOW GPIO2_LEVEL_HIGH GPIO2_EDGE_LOW GPIO2_EDGE_HIGH GPIO3_LEVEL_LOW GPIO3_LEVEL_HIGH GPIO3_EDGE_LOW GPIO3_EDGE_HIGH GPIO4_LEVEL_LOW GPIO4_LEVEL_HIGH GPIO4_EDGE_LOW GPIO4_EDGE_HIGH GPIO5_LEVEL_LOW GPIO5_LEVEL_HIGH GPIO5_EDGE_LOW GPIO5_EDGE_HIGH GPIO6_LEVEL_LOW GPIO6_LEVEL_HIGH GPIO6_EDGE_LOW GPIO6_EDGE_HIGH GPIO7_LEVEL_LOW GPIO7_LEVEL_HIGH GPIO7_EDGE_LOW GPIO7_EDGE_HIGH

GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only

GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only

GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only

GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only

GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only

GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only

GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only

GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only

GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only

GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only

GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only

GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only

GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only

GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only

GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only

GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only

GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only

GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only

GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only

GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only

GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only

GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only

GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only

GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only

GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only

GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only

GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only

GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only

GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only

GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only

GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only

GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only


PROC1_INTS1

Interrupt status after masking & forcing for proc1
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC1_INTS1 PROC1_INTS1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO8_LEVEL_LOW GPIO8_LEVEL_HIGH GPIO8_EDGE_LOW GPIO8_EDGE_HIGH GPIO9_LEVEL_LOW GPIO9_LEVEL_HIGH GPIO9_EDGE_LOW GPIO9_EDGE_HIGH GPIO10_LEVEL_LOW GPIO10_LEVEL_HIGH GPIO10_EDGE_LOW GPIO10_EDGE_HIGH GPIO11_LEVEL_LOW GPIO11_LEVEL_HIGH GPIO11_EDGE_LOW GPIO11_EDGE_HIGH GPIO12_LEVEL_LOW GPIO12_LEVEL_HIGH GPIO12_EDGE_LOW GPIO12_EDGE_HIGH GPIO13_LEVEL_LOW GPIO13_LEVEL_HIGH GPIO13_EDGE_LOW GPIO13_EDGE_HIGH GPIO14_LEVEL_LOW GPIO14_LEVEL_HIGH GPIO14_EDGE_LOW GPIO14_EDGE_HIGH GPIO15_LEVEL_LOW GPIO15_LEVEL_HIGH GPIO15_EDGE_LOW GPIO15_EDGE_HIGH

GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only

GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only

GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only

GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only

GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only

GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only

GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only

GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only

GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only

GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only

GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only

GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only

GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only

GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only

GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only

GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only

GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only

GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only

GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only

GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only

GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only

GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only

GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only

GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only

GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only

GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only

GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only

GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only

GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only

GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only

GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only

GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only


PROC1_INTS2

Interrupt status after masking & forcing for proc1
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC1_INTS2 PROC1_INTS2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO16_LEVEL_LOW GPIO16_LEVEL_HIGH GPIO16_EDGE_LOW GPIO16_EDGE_HIGH GPIO17_LEVEL_LOW GPIO17_LEVEL_HIGH GPIO17_EDGE_LOW GPIO17_EDGE_HIGH GPIO18_LEVEL_LOW GPIO18_LEVEL_HIGH GPIO18_EDGE_LOW GPIO18_EDGE_HIGH GPIO19_LEVEL_LOW GPIO19_LEVEL_HIGH GPIO19_EDGE_LOW GPIO19_EDGE_HIGH GPIO20_LEVEL_LOW GPIO20_LEVEL_HIGH GPIO20_EDGE_LOW GPIO20_EDGE_HIGH GPIO21_LEVEL_LOW GPIO21_LEVEL_HIGH GPIO21_EDGE_LOW GPIO21_EDGE_HIGH GPIO22_LEVEL_LOW GPIO22_LEVEL_HIGH GPIO22_EDGE_LOW GPIO22_EDGE_HIGH GPIO23_LEVEL_LOW GPIO23_LEVEL_HIGH GPIO23_EDGE_LOW GPIO23_EDGE_HIGH

GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only

GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only

GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only

GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only

GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only

GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only

GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only

GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only

GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only

GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only

GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only

GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only

GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only

GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only

GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only

GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only

GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only

GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only

GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only

GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only

GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only

GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only

GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only

GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only

GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only

GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only

GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only

GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only

GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only

GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only

GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only

GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only


PROC1_INTS3

Interrupt status after masking & forcing for proc1
address_offset : 0x15C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROC1_INTS3 PROC1_INTS3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO24_LEVEL_LOW GPIO24_LEVEL_HIGH GPIO24_EDGE_LOW GPIO24_EDGE_HIGH GPIO25_LEVEL_LOW GPIO25_LEVEL_HIGH GPIO25_EDGE_LOW GPIO25_EDGE_HIGH GPIO26_LEVEL_LOW GPIO26_LEVEL_HIGH GPIO26_EDGE_LOW GPIO26_EDGE_HIGH GPIO27_LEVEL_LOW GPIO27_LEVEL_HIGH GPIO27_EDGE_LOW GPIO27_EDGE_HIGH GPIO28_LEVEL_LOW GPIO28_LEVEL_HIGH GPIO28_EDGE_LOW GPIO28_EDGE_HIGH GPIO29_LEVEL_LOW GPIO29_LEVEL_HIGH GPIO29_EDGE_LOW GPIO29_EDGE_HIGH

GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only

GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only

GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only

GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only

GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only

GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only

GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only

GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only

GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only

GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only

GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only

GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only

GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only

GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only

GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only

GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only

GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only

GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only

GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only

GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only

GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only

GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only

GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only

GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only


DORMANT_WAKE_INTE0

Interrupt Enable for dormant_wake
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DORMANT_WAKE_INTE0 DORMANT_WAKE_INTE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO0_LEVEL_LOW GPIO0_LEVEL_HIGH GPIO0_EDGE_LOW GPIO0_EDGE_HIGH GPIO1_LEVEL_LOW GPIO1_LEVEL_HIGH GPIO1_EDGE_LOW GPIO1_EDGE_HIGH GPIO2_LEVEL_LOW GPIO2_LEVEL_HIGH GPIO2_EDGE_LOW GPIO2_EDGE_HIGH GPIO3_LEVEL_LOW GPIO3_LEVEL_HIGH GPIO3_EDGE_LOW GPIO3_EDGE_HIGH GPIO4_LEVEL_LOW GPIO4_LEVEL_HIGH GPIO4_EDGE_LOW GPIO4_EDGE_HIGH GPIO5_LEVEL_LOW GPIO5_LEVEL_HIGH GPIO5_EDGE_LOW GPIO5_EDGE_HIGH GPIO6_LEVEL_LOW GPIO6_LEVEL_HIGH GPIO6_EDGE_LOW GPIO6_EDGE_HIGH GPIO7_LEVEL_LOW GPIO7_LEVEL_HIGH GPIO7_EDGE_LOW GPIO7_EDGE_HIGH

GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write

GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write

GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write

GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write

GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


DORMANT_WAKE_INTE1

Interrupt Enable for dormant_wake
address_offset : 0x164 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DORMANT_WAKE_INTE1 DORMANT_WAKE_INTE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO8_LEVEL_LOW GPIO8_LEVEL_HIGH GPIO8_EDGE_LOW GPIO8_EDGE_HIGH GPIO9_LEVEL_LOW GPIO9_LEVEL_HIGH GPIO9_EDGE_LOW GPIO9_EDGE_HIGH GPIO10_LEVEL_LOW GPIO10_LEVEL_HIGH GPIO10_EDGE_LOW GPIO10_EDGE_HIGH GPIO11_LEVEL_LOW GPIO11_LEVEL_HIGH GPIO11_EDGE_LOW GPIO11_EDGE_HIGH GPIO12_LEVEL_LOW GPIO12_LEVEL_HIGH GPIO12_EDGE_LOW GPIO12_EDGE_HIGH GPIO13_LEVEL_LOW GPIO13_LEVEL_HIGH GPIO13_EDGE_LOW GPIO13_EDGE_HIGH GPIO14_LEVEL_LOW GPIO14_LEVEL_HIGH GPIO14_EDGE_LOW GPIO14_EDGE_HIGH GPIO15_LEVEL_LOW GPIO15_LEVEL_HIGH GPIO15_EDGE_LOW GPIO15_EDGE_HIGH

GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write

GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write

GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write

GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write

GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


DORMANT_WAKE_INTE2

Interrupt Enable for dormant_wake
address_offset : 0x168 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DORMANT_WAKE_INTE2 DORMANT_WAKE_INTE2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO16_LEVEL_LOW GPIO16_LEVEL_HIGH GPIO16_EDGE_LOW GPIO16_EDGE_HIGH GPIO17_LEVEL_LOW GPIO17_LEVEL_HIGH GPIO17_EDGE_LOW GPIO17_EDGE_HIGH GPIO18_LEVEL_LOW GPIO18_LEVEL_HIGH GPIO18_EDGE_LOW GPIO18_EDGE_HIGH GPIO19_LEVEL_LOW GPIO19_LEVEL_HIGH GPIO19_EDGE_LOW GPIO19_EDGE_HIGH GPIO20_LEVEL_LOW GPIO20_LEVEL_HIGH GPIO20_EDGE_LOW GPIO20_EDGE_HIGH GPIO21_LEVEL_LOW GPIO21_LEVEL_HIGH GPIO21_EDGE_LOW GPIO21_EDGE_HIGH GPIO22_LEVEL_LOW GPIO22_LEVEL_HIGH GPIO22_EDGE_LOW GPIO22_EDGE_HIGH GPIO23_LEVEL_LOW GPIO23_LEVEL_HIGH GPIO23_EDGE_LOW GPIO23_EDGE_HIGH

GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write

GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write

GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write

GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write

GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


DORMANT_WAKE_INTE3

Interrupt Enable for dormant_wake
address_offset : 0x16C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DORMANT_WAKE_INTE3 DORMANT_WAKE_INTE3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO24_LEVEL_LOW GPIO24_LEVEL_HIGH GPIO24_EDGE_LOW GPIO24_EDGE_HIGH GPIO25_LEVEL_LOW GPIO25_LEVEL_HIGH GPIO25_EDGE_LOW GPIO25_EDGE_HIGH GPIO26_LEVEL_LOW GPIO26_LEVEL_HIGH GPIO26_EDGE_LOW GPIO26_EDGE_HIGH GPIO27_LEVEL_LOW GPIO27_LEVEL_HIGH GPIO27_EDGE_LOW GPIO27_EDGE_HIGH GPIO28_LEVEL_LOW GPIO28_LEVEL_HIGH GPIO28_EDGE_LOW GPIO28_EDGE_HIGH GPIO29_LEVEL_LOW GPIO29_LEVEL_HIGH GPIO29_EDGE_LOW GPIO29_EDGE_HIGH

GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write


DORMANT_WAKE_INTF0

Interrupt Force for dormant_wake
address_offset : 0x170 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DORMANT_WAKE_INTF0 DORMANT_WAKE_INTF0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO0_LEVEL_LOW GPIO0_LEVEL_HIGH GPIO0_EDGE_LOW GPIO0_EDGE_HIGH GPIO1_LEVEL_LOW GPIO1_LEVEL_HIGH GPIO1_EDGE_LOW GPIO1_EDGE_HIGH GPIO2_LEVEL_LOW GPIO2_LEVEL_HIGH GPIO2_EDGE_LOW GPIO2_EDGE_HIGH GPIO3_LEVEL_LOW GPIO3_LEVEL_HIGH GPIO3_EDGE_LOW GPIO3_EDGE_HIGH GPIO4_LEVEL_LOW GPIO4_LEVEL_HIGH GPIO4_EDGE_LOW GPIO4_EDGE_HIGH GPIO5_LEVEL_LOW GPIO5_LEVEL_HIGH GPIO5_EDGE_LOW GPIO5_EDGE_HIGH GPIO6_LEVEL_LOW GPIO6_LEVEL_HIGH GPIO6_EDGE_LOW GPIO6_EDGE_HIGH GPIO7_LEVEL_LOW GPIO7_LEVEL_HIGH GPIO7_EDGE_LOW GPIO7_EDGE_HIGH

GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write

GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write

GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write

GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write

GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


DORMANT_WAKE_INTF1

Interrupt Force for dormant_wake
address_offset : 0x174 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DORMANT_WAKE_INTF1 DORMANT_WAKE_INTF1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO8_LEVEL_LOW GPIO8_LEVEL_HIGH GPIO8_EDGE_LOW GPIO8_EDGE_HIGH GPIO9_LEVEL_LOW GPIO9_LEVEL_HIGH GPIO9_EDGE_LOW GPIO9_EDGE_HIGH GPIO10_LEVEL_LOW GPIO10_LEVEL_HIGH GPIO10_EDGE_LOW GPIO10_EDGE_HIGH GPIO11_LEVEL_LOW GPIO11_LEVEL_HIGH GPIO11_EDGE_LOW GPIO11_EDGE_HIGH GPIO12_LEVEL_LOW GPIO12_LEVEL_HIGH GPIO12_EDGE_LOW GPIO12_EDGE_HIGH GPIO13_LEVEL_LOW GPIO13_LEVEL_HIGH GPIO13_EDGE_LOW GPIO13_EDGE_HIGH GPIO14_LEVEL_LOW GPIO14_LEVEL_HIGH GPIO14_EDGE_LOW GPIO14_EDGE_HIGH GPIO15_LEVEL_LOW GPIO15_LEVEL_HIGH GPIO15_EDGE_LOW GPIO15_EDGE_HIGH

GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write

GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write

GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write

GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write

GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


DORMANT_WAKE_INTF2

Interrupt Force for dormant_wake
address_offset : 0x178 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DORMANT_WAKE_INTF2 DORMANT_WAKE_INTF2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO16_LEVEL_LOW GPIO16_LEVEL_HIGH GPIO16_EDGE_LOW GPIO16_EDGE_HIGH GPIO17_LEVEL_LOW GPIO17_LEVEL_HIGH GPIO17_EDGE_LOW GPIO17_EDGE_HIGH GPIO18_LEVEL_LOW GPIO18_LEVEL_HIGH GPIO18_EDGE_LOW GPIO18_EDGE_HIGH GPIO19_LEVEL_LOW GPIO19_LEVEL_HIGH GPIO19_EDGE_LOW GPIO19_EDGE_HIGH GPIO20_LEVEL_LOW GPIO20_LEVEL_HIGH GPIO20_EDGE_LOW GPIO20_EDGE_HIGH GPIO21_LEVEL_LOW GPIO21_LEVEL_HIGH GPIO21_EDGE_LOW GPIO21_EDGE_HIGH GPIO22_LEVEL_LOW GPIO22_LEVEL_HIGH GPIO22_EDGE_LOW GPIO22_EDGE_HIGH GPIO23_LEVEL_LOW GPIO23_LEVEL_HIGH GPIO23_EDGE_LOW GPIO23_EDGE_HIGH

GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-write

GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-write

GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-write

GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-write

GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


DORMANT_WAKE_INTF3

Interrupt Force for dormant_wake
address_offset : 0x17C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DORMANT_WAKE_INTF3 DORMANT_WAKE_INTF3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO24_LEVEL_LOW GPIO24_LEVEL_HIGH GPIO24_EDGE_LOW GPIO24_EDGE_HIGH GPIO25_LEVEL_LOW GPIO25_LEVEL_HIGH GPIO25_EDGE_LOW GPIO25_EDGE_HIGH GPIO26_LEVEL_LOW GPIO26_LEVEL_HIGH GPIO26_EDGE_LOW GPIO26_EDGE_HIGH GPIO27_LEVEL_LOW GPIO27_LEVEL_HIGH GPIO27_EDGE_LOW GPIO27_EDGE_HIGH GPIO28_LEVEL_LOW GPIO28_LEVEL_HIGH GPIO28_EDGE_LOW GPIO28_EDGE_HIGH GPIO29_LEVEL_LOW GPIO29_LEVEL_HIGH GPIO29_EDGE_LOW GPIO29_EDGE_HIGH

GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-write

GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-write

GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-write

GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-write

GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-write

GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-write

GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-write

GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-write

GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-write

GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-write

GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-write

GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-write

GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write


GPIO3_STATUS

GPIO status
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO3_STATUS GPIO3_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


DORMANT_WAKE_INTS0

Interrupt status after masking & forcing for dormant_wake
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DORMANT_WAKE_INTS0 DORMANT_WAKE_INTS0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO0_LEVEL_LOW GPIO0_LEVEL_HIGH GPIO0_EDGE_LOW GPIO0_EDGE_HIGH GPIO1_LEVEL_LOW GPIO1_LEVEL_HIGH GPIO1_EDGE_LOW GPIO1_EDGE_HIGH GPIO2_LEVEL_LOW GPIO2_LEVEL_HIGH GPIO2_EDGE_LOW GPIO2_EDGE_HIGH GPIO3_LEVEL_LOW GPIO3_LEVEL_HIGH GPIO3_EDGE_LOW GPIO3_EDGE_HIGH GPIO4_LEVEL_LOW GPIO4_LEVEL_HIGH GPIO4_EDGE_LOW GPIO4_EDGE_HIGH GPIO5_LEVEL_LOW GPIO5_LEVEL_HIGH GPIO5_EDGE_LOW GPIO5_EDGE_HIGH GPIO6_LEVEL_LOW GPIO6_LEVEL_HIGH GPIO6_EDGE_LOW GPIO6_EDGE_HIGH GPIO7_LEVEL_LOW GPIO7_LEVEL_HIGH GPIO7_EDGE_LOW GPIO7_EDGE_HIGH

GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only

GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only

GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only

GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only

GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only

GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only

GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only

GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only

GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only

GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only

GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only

GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only

GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only

GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only

GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only

GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only

GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only

GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only

GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only

GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only

GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only

GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only

GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only

GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only

GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only

GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only

GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only

GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only

GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only

GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only

GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only

GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only


DORMANT_WAKE_INTS1

Interrupt status after masking & forcing for dormant_wake
address_offset : 0x184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DORMANT_WAKE_INTS1 DORMANT_WAKE_INTS1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO8_LEVEL_LOW GPIO8_LEVEL_HIGH GPIO8_EDGE_LOW GPIO8_EDGE_HIGH GPIO9_LEVEL_LOW GPIO9_LEVEL_HIGH GPIO9_EDGE_LOW GPIO9_EDGE_HIGH GPIO10_LEVEL_LOW GPIO10_LEVEL_HIGH GPIO10_EDGE_LOW GPIO10_EDGE_HIGH GPIO11_LEVEL_LOW GPIO11_LEVEL_HIGH GPIO11_EDGE_LOW GPIO11_EDGE_HIGH GPIO12_LEVEL_LOW GPIO12_LEVEL_HIGH GPIO12_EDGE_LOW GPIO12_EDGE_HIGH GPIO13_LEVEL_LOW GPIO13_LEVEL_HIGH GPIO13_EDGE_LOW GPIO13_EDGE_HIGH GPIO14_LEVEL_LOW GPIO14_LEVEL_HIGH GPIO14_EDGE_LOW GPIO14_EDGE_HIGH GPIO15_LEVEL_LOW GPIO15_LEVEL_HIGH GPIO15_EDGE_LOW GPIO15_EDGE_HIGH

GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only

GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only

GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only

GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only

GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only

GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only

GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only

GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only

GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only

GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only

GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only

GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only

GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only

GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only

GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only

GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only

GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only

GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only

GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only

GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only

GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only

GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only

GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only

GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only

GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only

GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only

GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only

GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only

GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only

GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only

GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only

GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only


DORMANT_WAKE_INTS2

Interrupt status after masking & forcing for dormant_wake
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DORMANT_WAKE_INTS2 DORMANT_WAKE_INTS2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO16_LEVEL_LOW GPIO16_LEVEL_HIGH GPIO16_EDGE_LOW GPIO16_EDGE_HIGH GPIO17_LEVEL_LOW GPIO17_LEVEL_HIGH GPIO17_EDGE_LOW GPIO17_EDGE_HIGH GPIO18_LEVEL_LOW GPIO18_LEVEL_HIGH GPIO18_EDGE_LOW GPIO18_EDGE_HIGH GPIO19_LEVEL_LOW GPIO19_LEVEL_HIGH GPIO19_EDGE_LOW GPIO19_EDGE_HIGH GPIO20_LEVEL_LOW GPIO20_LEVEL_HIGH GPIO20_EDGE_LOW GPIO20_EDGE_HIGH GPIO21_LEVEL_LOW GPIO21_LEVEL_HIGH GPIO21_EDGE_LOW GPIO21_EDGE_HIGH GPIO22_LEVEL_LOW GPIO22_LEVEL_HIGH GPIO22_EDGE_LOW GPIO22_EDGE_HIGH GPIO23_LEVEL_LOW GPIO23_LEVEL_HIGH GPIO23_EDGE_LOW GPIO23_EDGE_HIGH

GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only

GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only

GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only

GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only

GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only

GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only

GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only

GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only

GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only

GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only

GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only

GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only

GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only

GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only

GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only

GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only

GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only

GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only

GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only

GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only

GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only

GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only

GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only

GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only

GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only

GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only

GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-only

GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-only

GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only

GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only

GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-only

GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-only


DORMANT_WAKE_INTS3

Interrupt status after masking & forcing for dormant_wake
address_offset : 0x18C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DORMANT_WAKE_INTS3 DORMANT_WAKE_INTS3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO24_LEVEL_LOW GPIO24_LEVEL_HIGH GPIO24_EDGE_LOW GPIO24_EDGE_HIGH GPIO25_LEVEL_LOW GPIO25_LEVEL_HIGH GPIO25_EDGE_LOW GPIO25_EDGE_HIGH GPIO26_LEVEL_LOW GPIO26_LEVEL_HIGH GPIO26_EDGE_LOW GPIO26_EDGE_HIGH GPIO27_LEVEL_LOW GPIO27_LEVEL_HIGH GPIO27_EDGE_LOW GPIO27_EDGE_HIGH GPIO28_LEVEL_LOW GPIO28_LEVEL_HIGH GPIO28_EDGE_LOW GPIO28_EDGE_HIGH GPIO29_LEVEL_LOW GPIO29_LEVEL_HIGH GPIO29_EDGE_LOW GPIO29_EDGE_HIGH

GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only

GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only

GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-only

GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-only

GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only

GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only

GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-only

GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-only

GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only

GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only

GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-only

GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-only

GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only

GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only

GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-only

GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-only

GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only

GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only

GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-only

GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-only

GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only

GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only

GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-only

GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-only


GPIO3_CTRL

GPIO control including function select and overrides.
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO3_CTRL GPIO3_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : jtag_tdo

None

1 : spi0_tx

None

2 : uart0_rts

None

3 : i2c1_scl

None

4 : pwm_b_1

None

5 : sio_3

None

6 : pio0_3

None

7 : pio1_3

None

9 : usb_muxing_overcurr_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO4_STATUS

GPIO status
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO4_STATUS GPIO4_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO4_CTRL

GPIO control including function select and overrides.
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO4_CTRL GPIO4_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi0_rx

None

2 : uart1_tx

None

3 : i2c0_sda

None

4 : pwm_a_2

None

5 : sio_4

None

6 : pio0_4

None

7 : pio1_4

None

9 : usb_muxing_vbus_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO5_STATUS

GPIO status
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO5_STATUS GPIO5_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO5_CTRL

GPIO control including function select and overrides.
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO5_CTRL GPIO5_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi0_ss_n

None

2 : uart1_rx

None

3 : i2c0_scl

None

4 : pwm_b_2

None

5 : sio_5

None

6 : pio0_5

None

7 : pio1_5

None

9 : usb_muxing_vbus_en

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO6_STATUS

GPIO status
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO6_STATUS GPIO6_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO6_CTRL

GPIO control including function select and overrides.
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO6_CTRL GPIO6_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi0_sclk

None

2 : uart1_cts

None

3 : i2c1_sda

None

4 : pwm_a_3

None

5 : sio_6

None

6 : pio0_6

None

7 : pio1_6

None

8 : usb_muxing_extphy_softcon

None

9 : usb_muxing_overcurr_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO7_STATUS

GPIO status
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO7_STATUS GPIO7_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO7_CTRL

GPIO control including function select and overrides.
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO7_CTRL GPIO7_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi0_tx

None

2 : uart1_rts

None

3 : i2c1_scl

None

4 : pwm_b_3

None

5 : sio_7

None

6 : pio0_7

None

7 : pio1_7

None

8 : usb_muxing_extphy_oe_n

None

9 : usb_muxing_vbus_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO0_CTRL

GPIO control including function select and overrides.
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO0_CTRL GPIO0_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : jtag_tck

None

1 : spi0_rx

None

2 : uart0_tx

None

3 : i2c0_sda

None

4 : pwm_a_0

None

5 : sio_0

None

6 : pio0_0

None

7 : pio1_0

None

9 : usb_muxing_overcurr_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO8_STATUS

GPIO status
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO8_STATUS GPIO8_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO8_CTRL

GPIO control including function select and overrides.
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO8_CTRL GPIO8_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi1_rx

None

2 : uart1_tx

None

3 : i2c0_sda

None

4 : pwm_a_4

None

5 : sio_8

None

6 : pio0_8

None

7 : pio1_8

None

8 : usb_muxing_extphy_rcv

None

9 : usb_muxing_vbus_en

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO9_STATUS

GPIO status
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO9_STATUS GPIO9_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO9_CTRL

GPIO control including function select and overrides.
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO9_CTRL GPIO9_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi1_ss_n

None

2 : uart1_rx

None

3 : i2c0_scl

None

4 : pwm_b_4

None

5 : sio_9

None

6 : pio0_9

None

7 : pio1_9

None

8 : usb_muxing_extphy_vp

None

9 : usb_muxing_overcurr_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO10_STATUS

GPIO status
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO10_STATUS GPIO10_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO10_CTRL

GPIO control including function select and overrides.
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO10_CTRL GPIO10_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi1_sclk

None

2 : uart1_cts

None

3 : i2c1_sda

None

4 : pwm_a_5

None

5 : sio_10

None

6 : pio0_10

None

7 : pio1_10

None

8 : usb_muxing_extphy_vm

None

9 : usb_muxing_vbus_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO11_STATUS

GPIO status
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO11_STATUS GPIO11_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO11_CTRL

GPIO control including function select and overrides.
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO11_CTRL GPIO11_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi1_tx

None

2 : uart1_rts

None

3 : i2c1_scl

None

4 : pwm_b_5

None

5 : sio_11

None

6 : pio0_11

None

7 : pio1_11

None

8 : usb_muxing_extphy_suspnd

None

9 : usb_muxing_vbus_en

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO12_STATUS

GPIO status
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO12_STATUS GPIO12_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO12_CTRL

GPIO control including function select and overrides.
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO12_CTRL GPIO12_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi1_rx

None

2 : uart0_tx

None

3 : i2c0_sda

None

4 : pwm_a_6

None

5 : sio_12

None

6 : pio0_12

None

7 : pio1_12

None

8 : usb_muxing_extphy_speed

None

9 : usb_muxing_overcurr_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO13_STATUS

GPIO status
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO13_STATUS GPIO13_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO13_CTRL

GPIO control including function select and overrides.
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO13_CTRL GPIO13_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi1_ss_n

None

2 : uart0_rx

None

3 : i2c0_scl

None

4 : pwm_b_6

None

5 : sio_13

None

6 : pio0_13

None

7 : pio1_13

None

8 : usb_muxing_extphy_vpo

None

9 : usb_muxing_vbus_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO14_STATUS

GPIO status
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO14_STATUS GPIO14_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO14_CTRL

GPIO control including function select and overrides.
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO14_CTRL GPIO14_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi1_sclk

None

2 : uart0_cts

None

3 : i2c1_sda

None

4 : pwm_a_7

None

5 : sio_14

None

6 : pio0_14

None

7 : pio1_14

None

8 : usb_muxing_extphy_vmo

None

9 : usb_muxing_vbus_en

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO15_STATUS

GPIO status
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO15_STATUS GPIO15_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO15_CTRL

GPIO control including function select and overrides.
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO15_CTRL GPIO15_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi1_tx

None

2 : uart0_rts

None

3 : i2c1_scl

None

4 : pwm_b_7

None

5 : sio_15

None

6 : pio0_15

None

7 : pio1_15

None

8 : usb_muxing_digital_dp

None

9 : usb_muxing_overcurr_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO1_STATUS

GPIO status
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO1_STATUS GPIO1_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO16_STATUS

GPIO status
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO16_STATUS GPIO16_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO16_CTRL

GPIO control including function select and overrides.
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO16_CTRL GPIO16_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi0_rx

None

2 : uart0_tx

None

3 : i2c0_sda

None

4 : pwm_a_0

None

5 : sio_16

None

6 : pio0_16

None

7 : pio1_16

None

8 : usb_muxing_digital_dm

None

9 : usb_muxing_vbus_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO17_STATUS

GPIO status
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO17_STATUS GPIO17_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO17_CTRL

GPIO control including function select and overrides.
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO17_CTRL GPIO17_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi0_ss_n

None

2 : uart0_rx

None

3 : i2c0_scl

None

4 : pwm_b_0

None

5 : sio_17

None

6 : pio0_17

None

7 : pio1_17

None

9 : usb_muxing_vbus_en

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO18_STATUS

GPIO status
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO18_STATUS GPIO18_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO18_CTRL

GPIO control including function select and overrides.
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO18_CTRL GPIO18_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi0_sclk

None

2 : uart0_cts

None

3 : i2c1_sda

None

4 : pwm_a_1

None

5 : sio_18

None

6 : pio0_18

None

7 : pio1_18

None

9 : usb_muxing_overcurr_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO19_STATUS

GPIO status
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO19_STATUS GPIO19_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO19_CTRL

GPIO control including function select and overrides.
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO19_CTRL GPIO19_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi0_tx

None

2 : uart0_rts

None

3 : i2c1_scl

None

4 : pwm_b_1

None

5 : sio_19

None

6 : pio0_19

None

7 : pio1_19

None

9 : usb_muxing_vbus_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO20_STATUS

GPIO status
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO20_STATUS GPIO20_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO20_CTRL

GPIO control including function select and overrides.
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO20_CTRL GPIO20_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi0_rx

None

2 : uart1_tx

None

3 : i2c0_sda

None

4 : pwm_a_2

None

5 : sio_20

None

6 : pio0_20

None

7 : pio1_20

None

8 : clocks_gpin_0

None

9 : usb_muxing_vbus_en

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO21_STATUS

GPIO status
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO21_STATUS GPIO21_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO21_CTRL

GPIO control including function select and overrides.
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO21_CTRL GPIO21_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi0_ss_n

None

2 : uart1_rx

None

3 : i2c0_scl

None

4 : pwm_b_2

None

5 : sio_21

None

6 : pio0_21

None

7 : pio1_21

None

8 : clocks_gpout_0

None

9 : usb_muxing_overcurr_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO22_STATUS

GPIO status
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO22_STATUS GPIO22_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO22_CTRL

GPIO control including function select and overrides.
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO22_CTRL GPIO22_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi0_sclk

None

2 : uart1_cts

None

3 : i2c1_sda

None

4 : pwm_a_3

None

5 : sio_22

None

6 : pio0_22

None

7 : pio1_22

None

8 : clocks_gpin_1

None

9 : usb_muxing_vbus_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO23_STATUS

GPIO status
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO23_STATUS GPIO23_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO23_CTRL

GPIO control including function select and overrides.
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO23_CTRL GPIO23_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi0_tx

None

2 : uart1_rts

None

3 : i2c1_scl

None

4 : pwm_b_3

None

5 : sio_23

None

6 : pio0_23

None

7 : pio1_23

None

8 : clocks_gpout_1

None

9 : usb_muxing_vbus_en

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO1_CTRL

GPIO control including function select and overrides.
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO1_CTRL GPIO1_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : jtag_tms

None

1 : spi0_ss_n

None

2 : uart0_rx

None

3 : i2c0_scl

None

4 : pwm_b_0

None

5 : sio_1

None

6 : pio0_1

None

7 : pio1_1

None

9 : usb_muxing_vbus_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO24_STATUS

GPIO status
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO24_STATUS GPIO24_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO24_CTRL

GPIO control including function select and overrides.
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO24_CTRL GPIO24_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi1_rx

None

2 : uart1_tx

None

3 : i2c0_sda

None

4 : pwm_a_4

None

5 : sio_24

None

6 : pio0_24

None

7 : pio1_24

None

8 : clocks_gpout_2

None

9 : usb_muxing_overcurr_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO25_STATUS

GPIO status
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO25_STATUS GPIO25_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO25_CTRL

GPIO control including function select and overrides.
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO25_CTRL GPIO25_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi1_ss_n

None

2 : uart1_rx

None

3 : i2c0_scl

None

4 : pwm_b_4

None

5 : sio_25

None

6 : pio0_25

None

7 : pio1_25

None

8 : clocks_gpout_3

None

9 : usb_muxing_vbus_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO26_STATUS

GPIO status
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO26_STATUS GPIO26_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO26_CTRL

GPIO control including function select and overrides.
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO26_CTRL GPIO26_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi1_sclk

None

2 : uart1_cts

None

3 : i2c1_sda

None

4 : pwm_a_5

None

5 : sio_26

None

6 : pio0_26

None

7 : pio1_26

None

9 : usb_muxing_vbus_en

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO27_STATUS

GPIO status
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO27_STATUS GPIO27_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO27_CTRL

GPIO control including function select and overrides.
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO27_CTRL GPIO27_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi1_tx

None

2 : uart1_rts

None

3 : i2c1_scl

None

4 : pwm_b_5

None

5 : sio_27

None

6 : pio0_27

None

7 : pio1_27

None

9 : usb_muxing_overcurr_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO28_STATUS

GPIO status
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO28_STATUS GPIO28_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO28_CTRL

GPIO control including function select and overrides.
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO28_CTRL GPIO28_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi1_rx

None

2 : uart0_tx

None

3 : i2c0_sda

None

4 : pwm_a_6

None

5 : sio_28

None

6 : pio0_28

None

7 : pio1_28

None

9 : usb_muxing_vbus_detect

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


GPIO29_STATUS

GPIO status
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO29_STATUS GPIO29_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTFROMPERI OUTTOPAD OEFROMPERI OETOPAD INFROMPAD INTOPERI IRQFROMPAD IRQTOPROC

OUTFROMPERI : output signal from selected peripheral, before register override is applied
bits : 8 - 8 (1 bit)
access : read-only

OUTTOPAD : output signal to pad after register override is applied
bits : 9 - 9 (1 bit)
access : read-only

OEFROMPERI : output enable from selected peripheral, before register override is applied
bits : 12 - 12 (1 bit)
access : read-only

OETOPAD : output enable to pad after register override is applied
bits : 13 - 13 (1 bit)
access : read-only

INFROMPAD : input signal from pad, before override is applied
bits : 17 - 17 (1 bit)
access : read-only

INTOPERI : input signal to peripheral, after override is applied
bits : 19 - 19 (1 bit)
access : read-only

IRQFROMPAD : interrupt from pad before override is applied
bits : 24 - 24 (1 bit)
access : read-only

IRQTOPROC : interrupt to processors, after override is applied
bits : 26 - 26 (1 bit)
access : read-only


GPIO29_CTRL

GPIO control including function select and overrides.
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO29_CTRL GPIO29_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNCSEL OUTOVER OEOVER INOVER IRQOVER

FUNCSEL : 0-31 -> selects pin function according to the gpio table 31 == NULL
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

1 : spi1_ss_n

None

2 : uart0_rx

None

3 : i2c0_scl

None

4 : pwm_b_6

None

5 : sio_29

None

6 : pio0_29

None

7 : pio1_29

None

9 : usb_muxing_vbus_en

None

31 : null

None

End of enumeration elements list.

OUTOVER :
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output from peripheral signal selected by funcsel

1 : INVERT

drive output from inverse of peripheral signal selected by funcsel

2 : LOW

drive output low

3 : HIGH

drive output high

End of enumeration elements list.

OEOVER :
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

drive output enable from peripheral signal selected by funcsel

1 : INVERT

drive output enable from inverse of peripheral signal selected by funcsel

2 : DISABLE

disable output

3 : ENABLE

enable output

End of enumeration elements list.

INOVER :
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the peri input

1 : INVERT

invert the peri input

2 : LOW

drive peri input low

3 : HIGH

drive peri input high

End of enumeration elements list.

IRQOVER :
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : NORMAL

don't invert the interrupt

1 : INVERT

invert the interrupt

2 : LOW

drive interrupt low

3 : HIGH

drive interrupt high

End of enumeration elements list.


INTR0

Raw Interrupts
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTR0 INTR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO0_LEVEL_LOW GPIO0_LEVEL_HIGH GPIO0_EDGE_LOW GPIO0_EDGE_HIGH GPIO1_LEVEL_LOW GPIO1_LEVEL_HIGH GPIO1_EDGE_LOW GPIO1_EDGE_HIGH GPIO2_LEVEL_LOW GPIO2_LEVEL_HIGH GPIO2_EDGE_LOW GPIO2_EDGE_HIGH GPIO3_LEVEL_LOW GPIO3_LEVEL_HIGH GPIO3_EDGE_LOW GPIO3_EDGE_HIGH GPIO4_LEVEL_LOW GPIO4_LEVEL_HIGH GPIO4_EDGE_LOW GPIO4_EDGE_HIGH GPIO5_LEVEL_LOW GPIO5_LEVEL_HIGH GPIO5_EDGE_LOW GPIO5_EDGE_HIGH GPIO6_LEVEL_LOW GPIO6_LEVEL_HIGH GPIO6_EDGE_LOW GPIO6_EDGE_HIGH GPIO7_LEVEL_LOW GPIO7_LEVEL_HIGH GPIO7_EDGE_LOW GPIO7_EDGE_HIGH

GPIO0_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only

GPIO0_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only

GPIO0_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO0_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO1_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only

GPIO1_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only

GPIO1_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO1_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO2_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only

GPIO2_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only

GPIO2_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO2_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO3_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only

GPIO3_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only

GPIO3_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO3_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO4_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only

GPIO4_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only

GPIO4_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO4_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO5_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only

GPIO5_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only

GPIO5_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO5_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO6_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only

GPIO6_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only

GPIO6_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO6_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO7_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only

GPIO7_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only

GPIO7_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO7_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


INTR1

Raw Interrupts
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTR1 INTR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO8_LEVEL_LOW GPIO8_LEVEL_HIGH GPIO8_EDGE_LOW GPIO8_EDGE_HIGH GPIO9_LEVEL_LOW GPIO9_LEVEL_HIGH GPIO9_EDGE_LOW GPIO9_EDGE_HIGH GPIO10_LEVEL_LOW GPIO10_LEVEL_HIGH GPIO10_EDGE_LOW GPIO10_EDGE_HIGH GPIO11_LEVEL_LOW GPIO11_LEVEL_HIGH GPIO11_EDGE_LOW GPIO11_EDGE_HIGH GPIO12_LEVEL_LOW GPIO12_LEVEL_HIGH GPIO12_EDGE_LOW GPIO12_EDGE_HIGH GPIO13_LEVEL_LOW GPIO13_LEVEL_HIGH GPIO13_EDGE_LOW GPIO13_EDGE_HIGH GPIO14_LEVEL_LOW GPIO14_LEVEL_HIGH GPIO14_EDGE_LOW GPIO14_EDGE_HIGH GPIO15_LEVEL_LOW GPIO15_LEVEL_HIGH GPIO15_EDGE_LOW GPIO15_EDGE_HIGH

GPIO8_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only

GPIO8_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only

GPIO8_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO8_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO9_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only

GPIO9_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only

GPIO9_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO9_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO10_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only

GPIO10_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only

GPIO10_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO10_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO11_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only

GPIO11_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only

GPIO11_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO11_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO12_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only

GPIO12_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only

GPIO12_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO12_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO13_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only

GPIO13_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only

GPIO13_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO13_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO14_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only

GPIO14_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only

GPIO14_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO14_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO15_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only

GPIO15_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only

GPIO15_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO15_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


INTR2

Raw Interrupts
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTR2 INTR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO16_LEVEL_LOW GPIO16_LEVEL_HIGH GPIO16_EDGE_LOW GPIO16_EDGE_HIGH GPIO17_LEVEL_LOW GPIO17_LEVEL_HIGH GPIO17_EDGE_LOW GPIO17_EDGE_HIGH GPIO18_LEVEL_LOW GPIO18_LEVEL_HIGH GPIO18_EDGE_LOW GPIO18_EDGE_HIGH GPIO19_LEVEL_LOW GPIO19_LEVEL_HIGH GPIO19_EDGE_LOW GPIO19_EDGE_HIGH GPIO20_LEVEL_LOW GPIO20_LEVEL_HIGH GPIO20_EDGE_LOW GPIO20_EDGE_HIGH GPIO21_LEVEL_LOW GPIO21_LEVEL_HIGH GPIO21_EDGE_LOW GPIO21_EDGE_HIGH GPIO22_LEVEL_LOW GPIO22_LEVEL_HIGH GPIO22_EDGE_LOW GPIO22_EDGE_HIGH GPIO23_LEVEL_LOW GPIO23_LEVEL_HIGH GPIO23_EDGE_LOW GPIO23_EDGE_HIGH

GPIO16_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only

GPIO16_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only

GPIO16_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO16_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO17_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only

GPIO17_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only

GPIO17_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO17_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO18_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only

GPIO18_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only

GPIO18_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO18_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO19_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only

GPIO19_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only

GPIO19_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO19_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO20_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only

GPIO20_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only

GPIO20_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO20_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO21_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only

GPIO21_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only

GPIO21_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO21_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write

GPIO22_LEVEL_LOW :
bits : 24 - 24 (1 bit)
access : read-only

GPIO22_LEVEL_HIGH :
bits : 25 - 25 (1 bit)
access : read-only

GPIO22_EDGE_LOW :
bits : 26 - 26 (1 bit)
access : read-write

GPIO22_EDGE_HIGH :
bits : 27 - 27 (1 bit)
access : read-write

GPIO23_LEVEL_LOW :
bits : 28 - 28 (1 bit)
access : read-only

GPIO23_LEVEL_HIGH :
bits : 29 - 29 (1 bit)
access : read-only

GPIO23_EDGE_LOW :
bits : 30 - 30 (1 bit)
access : read-write

GPIO23_EDGE_HIGH :
bits : 31 - 31 (1 bit)
access : read-write


INTR3

Raw Interrupts
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTR3 INTR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO24_LEVEL_LOW GPIO24_LEVEL_HIGH GPIO24_EDGE_LOW GPIO24_EDGE_HIGH GPIO25_LEVEL_LOW GPIO25_LEVEL_HIGH GPIO25_EDGE_LOW GPIO25_EDGE_HIGH GPIO26_LEVEL_LOW GPIO26_LEVEL_HIGH GPIO26_EDGE_LOW GPIO26_EDGE_HIGH GPIO27_LEVEL_LOW GPIO27_LEVEL_HIGH GPIO27_EDGE_LOW GPIO27_EDGE_HIGH GPIO28_LEVEL_LOW GPIO28_LEVEL_HIGH GPIO28_EDGE_LOW GPIO28_EDGE_HIGH GPIO29_LEVEL_LOW GPIO29_LEVEL_HIGH GPIO29_EDGE_LOW GPIO29_EDGE_HIGH

GPIO24_LEVEL_LOW :
bits : 0 - 0 (1 bit)
access : read-only

GPIO24_LEVEL_HIGH :
bits : 1 - 1 (1 bit)
access : read-only

GPIO24_EDGE_LOW :
bits : 2 - 2 (1 bit)
access : read-write

GPIO24_EDGE_HIGH :
bits : 3 - 3 (1 bit)
access : read-write

GPIO25_LEVEL_LOW :
bits : 4 - 4 (1 bit)
access : read-only

GPIO25_LEVEL_HIGH :
bits : 5 - 5 (1 bit)
access : read-only

GPIO25_EDGE_LOW :
bits : 6 - 6 (1 bit)
access : read-write

GPIO25_EDGE_HIGH :
bits : 7 - 7 (1 bit)
access : read-write

GPIO26_LEVEL_LOW :
bits : 8 - 8 (1 bit)
access : read-only

GPIO26_LEVEL_HIGH :
bits : 9 - 9 (1 bit)
access : read-only

GPIO26_EDGE_LOW :
bits : 10 - 10 (1 bit)
access : read-write

GPIO26_EDGE_HIGH :
bits : 11 - 11 (1 bit)
access : read-write

GPIO27_LEVEL_LOW :
bits : 12 - 12 (1 bit)
access : read-only

GPIO27_LEVEL_HIGH :
bits : 13 - 13 (1 bit)
access : read-only

GPIO27_EDGE_LOW :
bits : 14 - 14 (1 bit)
access : read-write

GPIO27_EDGE_HIGH :
bits : 15 - 15 (1 bit)
access : read-write

GPIO28_LEVEL_LOW :
bits : 16 - 16 (1 bit)
access : read-only

GPIO28_LEVEL_HIGH :
bits : 17 - 17 (1 bit)
access : read-only

GPIO28_EDGE_LOW :
bits : 18 - 18 (1 bit)
access : read-write

GPIO28_EDGE_HIGH :
bits : 19 - 19 (1 bit)
access : read-write

GPIO29_LEVEL_LOW :
bits : 20 - 20 (1 bit)
access : read-only

GPIO29_LEVEL_HIGH :
bits : 21 - 21 (1 bit)
access : read-only

GPIO29_EDGE_LOW :
bits : 22 - 22 (1 bit)
access : read-write

GPIO29_EDGE_HIGH :
bits : 23 - 23 (1 bit)
access : read-write



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