\n
AON Clock Configuration Register
address_offset : 0x70 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
div :
bits : 0 - -1 (0 bit)
trim :
bits : 16 - 36 (21 bit)
enable :
bits : 30 - 29 (0 bit)
ready :
bits : 31 - 30 (0 bit)
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