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PWM Configuration Register
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
scale :
bits : 0 - -1 (0 bit)
sticky :
bits : 8 - 7 (0 bit)
zerocmp :
bits : 9 - 8 (0 bit)
deglitch :
bits : 10 - 9 (0 bit)
enalways :
bits : 12 - 11 (0 bit)
enoneshot :
bits : 13 - 12 (0 bit)
cmp0center :
bits : 16 - 15 (0 bit)
cmp1center :
bits : 17 - 16 (0 bit)
cmp2center :
bits : 18 - 17 (0 bit)
cmp3center :
bits : 19 - 18 (0 bit)
cmp0gang :
bits : 24 - 23 (0 bit)
cmp1gang :
bits : 25 - 24 (0 bit)
cmp2gang :
bits : 26 - 25 (0 bit)
cmp3gang :
bits : 27 - 26 (0 bit)
cmp0ip :
bits : 28 - 27 (0 bit)
cmp1ip :
bits : 29 - 28 (0 bit)
cmp2ip :
bits : 30 - 29 (0 bit)
cmp3ip :
bits : 31 - 30 (0 bit)
Scaled Halfword Counter Register
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Compare Register
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
value :
bits : 0 - -1 (0 bit)
Compare Register
address_offset : 0x24 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
value :
bits : 0 - -1 (0 bit)
Compare Register
address_offset : 0x28 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
value :
bits : 0 - -1 (0 bit)
Compare Register
address_offset : 0x2C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
value :
bits : 0 - -1 (0 bit)
Counter Register
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
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